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| author | Patrick Williams <iawillia@us.ibm.com> | 2013-01-08 16:57:44 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-01-14 11:46:24 -0600 |
| commit | a84e7bc7992030e3866bc04b2e4d335b621f636d (patch) | |
| tree | 679c14c913a1961599cd7abe30db0a3bc0d38911 /src/kernel | |
| parent | f6b05b2ec7cc68eb02d639ef33a04a8c31353e57 (diff) | |
| download | talos-hostboot-a84e7bc7992030e3866bc04b2e4d335b621f636d.tar.gz talos-hostboot-a84e7bc7992030e3866bc04b2e4d335b621f636d.zip | |
Support RPR register.
For P8 the priority of different threads has no effect unless the
relative priority register is programmed to tell the relative
scheduling weight of the different priorities.
We will now be programming the RPR to give 32x performance boost
to "high" priority threads relative to "low" priority. This
means that when a thread is waiting on another, and thus has low
priority, it will get 32x less dispatch cycles then the thread
it is waiting on.
Change-Id: I0d1d1052b12ab8bd5612aa4580cd85b5c238f885
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2888
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/kernel')
| -rw-r--r-- | src/kernel/cpumgr.C | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/kernel/cpumgr.C b/src/kernel/cpumgr.C index 47edb8ca2..a3e855c1c 100644 --- a/src/kernel/cpumgr.C +++ b/src/kernel/cpumgr.C @@ -5,7 +5,7 @@ /* */ /* IBM CONFIDENTIAL */ /* */ -/* COPYRIGHT International Business Machines Corp. 2010,2012 */ +/* COPYRIGHT International Business Machines Corp. 2010,2013 */ /* */ /* p1 */ /* */ @@ -132,7 +132,7 @@ void CpuManager::requestShutdown(uint64_t i_status) HeapManager::stats(); #endif - + } void activeMainWork() @@ -288,6 +288,7 @@ void CpuManager::activateCPU(cpu_t * i_cpu) msr |= 0x1000; // TODO: RTC: 51148 - Simics workaround for SW170137. kassert(WAKEUP_MSR_VALUE == msr); setLPCR(WAKEUP_LPCR_VALUE); + setRPR(WAKEUP_RPR_VALUE); } void CpuManager::deactivateCPU(cpu_t * i_cpu) @@ -352,8 +353,12 @@ void CpuManager::executePeriodics(cpu_t * i_cpu) public: void masterPreWork() { + setThreadPriorityVeryHigh(); + HeapManager::coalesce(); PageManager::coalesce(); + + setThreadPriorityHigh(); } }; |
