Support RPR register.

    For P8 the priority of different threads has no effect unless the
    relative priority register is programmed to tell the relative
    scheduling weight of the different priorities.

    We will now be  programming the RPR to give 32x performance boost
    to "high" priority threads relative to "low" priority.  This
    means that when a thread is waiting on another, and thus has low
    priority, it will get 32x less dispatch cycles then the thread
    it is waiting on.

Change-Id: I0d1d1052b12ab8bd5612aa4580cd85b5c238f885
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2888
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 36 insertions, 4 deletions

diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index cb1ff4fd5..e8e6701bb 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2012              */
+/* COPYRIGHT International Business Machines Corp. 2011,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -175,6 +175,13 @@ inline void setDEC(uint64_t _dec)
 }
 
 ALWAYS_INLINE
+inline void setRPR(uint64_t _rpr)
+{
+    register uint64_t rpr = _rpr;
+    asm volatile("mtspr 186, %0" :: "r"(rpr));
+}
+
+ALWAYS_INLINE
 inline void sync()
 {
     asm volatile("sync" ::: "memory");
@@ -258,6 +265,13 @@ inline void setThreadPriorityHigh()
 }
 
 ALWAYS_INLINE
+inline void setThreadPriorityVeryHigh()
+{
+    asm volatile("or 7,7,7");
+}
+
+
+ALWAYS_INLINE
 inline void dcbf(void* _ptr)
 {
     register void* ptr = _ptr;
diff --git a/src/include/kernel/cpumgr.H b/src/include/kernel/cpumgr.H
index f55bf0ff5..264583b5f 100644
--- a/src/include/kernel/cpumgr.H
+++ b/src/include/kernel/cpumgr.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2010,2012              */
+/* COPYRIGHT International Business Machines Corp. 2010,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -170,6 +170,19 @@ class CpuManager
          */
         static const uint64_t WAKEUP_LPCR_VALUE =   0x0000000000007008;
 
+        /** Desired value for RPR after wakeup.
+         *
+         *      Priority     Us    PHYP
+         *      Very Low      0      0
+         *      Low           1      1    <--- hostboot "low"
+         *      Med Low       3      3
+         *      Med          32      7    <--- hostboot "high"
+         *      Med High     33     15
+         *      High         34     31
+         *      Very High    63     63
+         */
+        static const uint64_t WAKEUP_RPR_VALUE =    0x0001032021223F;
+
     protected:
         CpuManager();
         ~CpuManager() {}
diff --git a/src/kernel/cpumgr.C b/src/kernel/cpumgr.C
index 47edb8ca2..a3e855c1c 100644
--- a/src/kernel/cpumgr.C
+++ b/src/kernel/cpumgr.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2010,2012              */
+/* COPYRIGHT International Business Machines Corp. 2010,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -132,7 +132,7 @@ void CpuManager::requestShutdown(uint64_t i_status)
                     HeapManager::stats();
                 #endif
 
-              
+
             }
 
             void activeMainWork()
@@ -288,6 +288,7 @@ void CpuManager::activateCPU(cpu_t * i_cpu)
     msr |= 0x1000; // TODO: RTC: 51148 - Simics workaround for SW170137.
     kassert(WAKEUP_MSR_VALUE == msr);
     setLPCR(WAKEUP_LPCR_VALUE);
+    setRPR(WAKEUP_RPR_VALUE);
 }
 
 void CpuManager::deactivateCPU(cpu_t * i_cpu)
@@ -352,8 +353,12 @@ void CpuManager::executePeriodics(cpu_t * i_cpu)
                 public:
                     void masterPreWork()
                     {
+                        setThreadPriorityVeryHigh();
+
                         HeapManager::coalesce();
                         PageManager::coalesce();
+
+                        setThreadPriorityHigh();
                     }
             };