xip_customize: GPTR/overlays stage 1 support

Updated to poll Nimbus DD level and whether there's support
for overlays in the XIP interface.

Further, updated to add three extra args in xip_customize API, two
of which are to support a third ring work buffer for the overlays
handling. This has necessitated making changes to hcode_image_build
(HIB) API as well.

Note that the calling codes of xip_customize and HIB need to be
updated to supply the additional args in their APIs.

Note that this code stage 1 will work for Nimbus DD2 with Gptr
rings in Mvpd, and no Gptr rings in the HW image.  It will, however,
not work if there's content in .overlays or if there's Gptr rings
already in the .rings section. Thus, the stage 1 code here will
work with a DD2 image (i.e., that does NOT have Gptr rings in
.rings in HW image) as long as noone has put any real Gptr
initfiles in for processing (which would result in ring content
in .overlays). We must ensure that the stage 2 code of xip_customize
gets merged on the HB side to enable processing of .overlays content
before we actually add any Gptr initfiles for the .overlays section
into EKB.

Change-Id: I3d6ab8a9add239c92819613dcae21ef5faf0a1c5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40591
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40898
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Dean Sanner <dsanner@us.ibm.com>

1 files changed, 6 insertions, 3 deletions

diff --git a/src/include/usr/sbe/sbe_update.H b/src/include/usr/sbe/sbe_update.H
index 9280ab55b..1d5a6a784 100644
--- a/src/include/usr/sbe/sbe_update.H
+++ b/src/include/usr/sbe/sbe_update.H
@@ -139,15 +139,17 @@ namespace SBE
     //
     // 256K - 316K  = Ring buf1
     // 316K - 376K  = Ring buf2
-    // 376K - 632K  = Ring Section buf
+    // 376k - 436k  = Ring buf3
+    // 436K - 692K  = Ring Section buf
     // ---- ALT use 256K-632K for SBE ECC image
-    // 632K - 888K  = SBE + HBBL image
+    // 692K - 948K  = SBE + HBBL image
     enum {
         FIXED_SEEPROM_WORK_SPACE = 256 * 1024,
         SBE_IMG_VADDR = VMM_VADDR_SBE_UPDATE,
         RING_BUF1_VADDR = FIXED_SEEPROM_WORK_SPACE + SBE_IMG_VADDR,
         RING_BUF2_VADDR = RING_BUF1_VADDR + MAX_RING_BUF_SIZE,
-        RING_SEC_VADDR  = RING_BUF2_VADDR + MAX_RING_BUF_SIZE,
+        RING_BUF3_VADDR = RING_BUF2_VADDR + MAX_RING_BUF_SIZE,
+        RING_SEC_VADDR  = RING_BUF3_VADDR + MAX_RING_BUF_SIZE,
         //NOTE: recycling the same memory space for different
         //steps in the process.
         SBE_ECC_IMG_VADDR = RING_BUF1_VADDR,
@@ -431,6 +433,7 @@ namespace SBE
      * @return errlHndl_t    Error log handle on failure.
      */
     errlHndl_t procCustomizeSbeImg(TARGETING::Target* i_target,
+                                   void* i_hwImgPtr,
                                    void* i_sbeImgPtr,
                                    size_t i_maxImgSize,
                                    void* io_imgPtr,