Add HCDB Support for eeprom cache process

While parsing the EEPROMs of the system as part of the EECACHE process
if we detect a part has been replaced, removed, or added then we must
call markTargetChanged to notify hwas to take appropriate actions.
This commit also introduces the new preloaded EECACHE section for simics.

Change-Id: I9f2a8a62d5c6f9a6c66a0c0c7ed5ed86f7d94aec
RTC: 211109
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78762
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 17 insertions, 6 deletions

diff --git a/src/include/usr/i2c/eeprom_const.H b/src/include/usr/i2c/eeprom_const.H
index ea09c4330..055aa2172 100644
--- a/src/include/usr/i2c/eeprom_const.H
+++ b/src/include/usr/i2c/eeprom_const.H
@@ -124,7 +124,10 @@ union eepromRecordHeader
         uint32_t cache_copy_size;   // Size of data saved in cache (in KB)
         uint32_t internal_offset;   // offset from start of EECACHE section where cached
                                     // data exists
-        uint8_t  cached_copy_valid; // if == 0 , cached data is invalid
+        uint8_t  cached_copy_valid : 1,   // This bit is set when we think the contents of the
+                                          // cache is valid.
+                 unused            : 7;
+
     } PACKED completeRecord;
 
     struct uniqueRecord
@@ -238,16 +241,24 @@ struct EepromInfo_t
 /**
  * @brief Define a set of information that describes the
           different virtual addresses associated with a given
-          cache entry
+          cache entry along with a byte telling us if there has been
+          an update detected on the eeprom this boot
  */
-struct RecordAddresses_t
+struct EeepromEntryMetaData_t
 {
     uint64_t header_entry_address;
     uint64_t cache_entry_address;
+    uint8_t  mark_target_changed;  // This byte is set after we detect a target has changed.
+                                   // Either removed, replaced, or added we don't care. But
+                                   // we need to use this bits so future targets associated
+                                   // with this eeprom can know they need to notify HWAS that
+                                   // they have been changed. This bit should get cleared after
+                                   // all eeproms have been cached.
 
-    RecordAddresses_t()
+    EeepromEntryMetaData_t()
       : header_entry_address(0),
-        cache_entry_address(0)
+        cache_entry_address(0),
+        mark_target_changed(0)
     {
     }
 };
diff --git a/src/include/usr/i2c/eepromddreasoncodes.H b/src/include/usr/i2c/eepromddreasoncodes.H
index df71e4be4..c08935ab4 100644
--- a/src/include/usr/i2c/eepromddreasoncodes.H
+++ b/src/include/usr/i2c/eepromddreasoncodes.H
@@ -90,7 +90,7 @@ enum eepromReasonCode
                                                                        // been installed on the system.
     EEPROM_CACHE_NOT_FOUND_IN_MAP           = EEPROM_COMP_ID | 0x0F,   // An entry we thought would be in the global map that keeps track of
                                                                        // what eeproms have been cached was not found
-    EEPROM_CACHE_NOT_FOUND_IN_PNOR           = EEPROM_COMP_ID | 0x10,  // An entry we thought would be in the the EECACHE section of PNOR seems
+    EEPROM_CACHE_NOT_FOUND_IN_PNOR          = EEPROM_COMP_ID | 0x10,   // An entry we thought would be in the the EECACHE section of PNOR seems
                                                                        // to be missing
 };