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authorDan Crowell <dcrowell@us.ibm.com>2015-12-14 09:30:28 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-02-29 16:29:48 -0500
commitbee7f1cbcd5bf18acc539c9c9b6a14960dadea3d (patch)
tree2b7f1c777e10bc41101d7515e96122b3fd8cd1dc /src/include/arch
parent1fe31da7eeae17f43b6908f9eccf30d6a8b355dd (diff)
downloadtalos-hostboot-bee7f1cbcd5bf18acc539c9c9b6a14960dadea3d.tar.gz
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Update constants and comments for P9 PIR format
Implemented a set of macros and constants that can be used everywhere to translate a PIR into its component parts and pull out individual pieces of data from a complete PIR. Also added and updated the references to the old ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID. Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e RTC: 88055 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/arch')
-rw-r--r--src/include/arch/pirformat.H167
1 files changed, 167 insertions, 0 deletions
diff --git a/src/include/arch/pirformat.H b/src/include/arch/pirformat.H
new file mode 100644
index 000000000..90d164f93
--- /dev/null
+++ b/src/include/arch/pirformat.H
@@ -0,0 +1,167 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/include/arch/pirformat.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/* A variety of PIR/PID formatting utilities */
+
+#ifndef _PIRFORMAT_H
+#define _PIRFORMAT_H
+
+/**
+ * @brief Format of Processor Id Register (PIR) for P9
+ *
+ * GGGGCCCPPPPPTT where
+ * G = group, C = chip, P = proc, T = thread
+ */
+struct PIR_t
+{
+ union
+ {
+ uint32_t word;
+
+ struct
+ {
+ // Normal Core Mode
+ uint32_t reserved:18; // 00:17 = unused
+ uint32_t groupId:4; // 18:21 = group id
+ uint32_t chipId:3; // 22:24 = chip id
+ uint32_t coreId:5; // 25:29 = core id (normal core)
+ uint32_t threadId:2; // 30:31 = thread id (normal core)
+ } PACKED;
+
+ struct
+ {
+ // Fused Core Mode
+ uint32_t reservedFused:18; // 00:17 = unused
+ uint32_t groupIdFused:4; // 18:21 = group id
+ uint32_t chipIdFused:3; // 22:24 = chip id
+ uint32_t coreIdFused:4; // 25:28 = core id (fused core)
+ uint32_t threadIdFused:3; // 29:31 = thread id (fused core)
+ } PACKED;
+ };
+ PIR_t(uint32_t i_word = 0) : word(i_word) {}
+
+ PIR_t(uint32_t i_groupId, uint32_t i_chipId,
+ uint32_t i_coreId, uint32_t i_thread = 0) :
+ reserved(0),
+ groupId(i_groupId), chipId(i_chipId),
+ coreId(i_coreId), threadId(i_thread) {}
+
+ PIR_t operator= (uint32_t i_word)
+ {
+ word = i_word;
+ return word;
+ }
+
+ bool operator< (const PIR_t& r) const
+ {
+ return word < r.word;
+ }
+
+ // Some more handy constants
+ enum
+ {
+ // Normal (non-fused) mode
+ BITS_IN_GROUP = 4,
+ BITS_IN_CHIP = 3,
+ BITS_IN_CORE = 5,
+ BITS_IN_THREAD = 2,
+
+ BITS_AFTER_THREAD = 0,
+ BITS_AFTER_CORE = BITS_AFTER_THREAD+BITS_IN_THREAD,
+ BITS_AFTER_CHIP = BITS_AFTER_CORE+BITS_IN_CORE,
+ BITS_AFTER_GROUP = BITS_AFTER_CHIP+BITS_IN_CHIP,
+
+ GROUP_MASK = 0x00003C00,
+ CHIP_MASK = 0x00000380,
+ CORE_MASK = 0x0000007C,
+ THREAD_MASK = 0x00000003,
+ VALID_BITS = 0x00003FFF,
+
+
+ // Fused mode
+ BITS_IN_CORE_FUSED = 5,
+ BITS_IN_THREAD_FUSED = 3,
+
+ GROUP_MASK_FUSED = 0x00003C00,
+ CHIP_MASK_FUSED = 0x00000380,
+ CORE_MASK_FUSED = 0x00000078,
+ THREAD_MASK_FUSED = 0x00000007,
+ };
+
+ // Some handy functions
+ inline static uint32_t groupFromPir( uint32_t i_pir ) {
+ return (static_cast<PIR_t>(i_pir)).groupId;
+ }
+ inline static uint32_t chipFromPir( uint32_t i_pir ) {
+ return (static_cast<PIR_t>(i_pir)).chipId;
+ }
+ inline static uint32_t coreFromPir( uint32_t i_pir ) {
+ return (static_cast<PIR_t>(i_pir)).coreId;
+ }
+ inline static uint32_t threadFromPir( uint32_t i_pir ) {
+ return (static_cast<PIR_t>(i_pir)).threadId;
+ }
+
+ inline static uint32_t groupFromChipId( uint32_t i_chipId ) {
+ return (i_chipId >> BITS_IN_CHIP);
+ }
+ inline static uint32_t chipFromChipId( uint32_t i_chipId ) {
+ return (i_chipId & (CHIP_MASK >>
+ (BITS_IN_CORE + BITS_IN_THREAD)));
+ }
+
+ inline static uint32_t groupFromCoreId( uint32_t i_chipId ) {
+ return (i_chipId >> (BITS_IN_CHIP+ BITS_IN_CORE));
+ }
+ inline static uint32_t chipFromCoreId( uint32_t i_chipId ) {
+ return (i_chipId >> BITS_IN_CORE);
+ }
+ inline static uint32_t coreFromCoreId( uint32_t i_chipId ) {
+ return (i_chipId & (CORE_MASK >> BITS_IN_THREAD));
+ }
+
+ inline static uint32_t createChipId( uint32_t i_groupId,
+ uint32_t i_chipId ) {
+ return ((i_groupId << BITS_IN_CHIP) | i_chipId);
+ }
+ inline static uint32_t createCoreId( uint32_t i_groupId,
+ uint32_t i_chipId,
+ uint32_t i_coreId )
+ {
+ return ((((i_groupId << BITS_IN_CHIP)
+ | i_chipId)
+ << BITS_IN_CORE) | i_coreId);
+ }
+
+ inline static uint32_t createCoreId( uint32_t i_chipId,
+ uint32_t i_coreId )
+ {
+ return ((i_chipId << BITS_IN_CORE) | i_coreId);
+ }
+
+};
+
+
+#endif /* _PIRFORMAT_H */
+
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