Update constants and comments for P9 PIR format

Implemented a set of macros and constants that can be used
everywhere to translate a PIR into its component parts
and pull out individual pieces of data from a complete
PIR.
Also added and updated the references to the old
ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID.

Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e
RTC: 88055
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

6 files changed, 194 insertions, 63 deletions

diff --git a/src/include/arch/pirformat.H b/src/include/arch/pirformat.H
new file mode 100644
index 000000000..90d164f93
--- /dev/null
+++ b/src/include/arch/pirformat.H
@@ -0,0 +1,167 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/include/arch/pirformat.H $                                */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+/* A variety of PIR/PID formatting utilities */
+
+#ifndef _PIRFORMAT_H
+#define _PIRFORMAT_H
+
+/**
+ * @brief Format of Processor Id Register (PIR) for P9
+ *
+ *  GGGGCCCPPPPPTT where
+ *     G = group, C = chip, P = proc, T = thread
+ */
+struct PIR_t
+{
+    union
+    {
+        uint32_t word;
+
+        struct
+        {
+            // Normal Core Mode
+            uint32_t reserved:18;    // 00:17 = unused
+            uint32_t groupId:4;      // 18:21 = group id
+            uint32_t chipId:3;       // 22:24 = chip id
+            uint32_t coreId:5;       // 25:29 = core id (normal core)
+            uint32_t threadId:2;     // 30:31 = thread id (normal core)
+        } PACKED;
+
+        struct
+        {
+            // Fused Core Mode
+            uint32_t reservedFused:18;    // 00:17 = unused
+            uint32_t groupIdFused:4;      // 18:21 = group id
+            uint32_t chipIdFused:3;       // 22:24 = chip id
+            uint32_t coreIdFused:4;       // 25:28 = core id (fused core)
+            uint32_t threadIdFused:3;     // 29:31 = thread id (fused core)
+        } PACKED;
+    };
+    PIR_t(uint32_t i_word = 0) : word(i_word) {}
+
+    PIR_t(uint32_t i_groupId, uint32_t i_chipId,
+          uint32_t i_coreId, uint32_t i_thread = 0) :
+      reserved(0),
+    groupId(i_groupId), chipId(i_chipId),
+    coreId(i_coreId), threadId(i_thread) {}
+
+    PIR_t operator= (uint32_t i_word)
+    {
+        word = i_word;
+        return word;
+    }
+
+    bool operator< (const PIR_t& r) const
+    {
+        return word < r.word;
+    }
+
+    // Some more handy constants
+    enum
+    {
+        // Normal (non-fused) mode
+        BITS_IN_GROUP = 4,
+        BITS_IN_CHIP = 3,
+        BITS_IN_CORE = 5,
+        BITS_IN_THREAD = 2,
+
+        BITS_AFTER_THREAD = 0,
+        BITS_AFTER_CORE = BITS_AFTER_THREAD+BITS_IN_THREAD,
+        BITS_AFTER_CHIP = BITS_AFTER_CORE+BITS_IN_CORE,
+        BITS_AFTER_GROUP = BITS_AFTER_CHIP+BITS_IN_CHIP,
+
+        GROUP_MASK =  0x00003C00,
+        CHIP_MASK =   0x00000380,
+        CORE_MASK =   0x0000007C,
+        THREAD_MASK = 0x00000003,
+        VALID_BITS =  0x00003FFF,
+
+
+        // Fused mode
+        BITS_IN_CORE_FUSED = 5,
+        BITS_IN_THREAD_FUSED = 3,
+
+        GROUP_MASK_FUSED =  0x00003C00,
+        CHIP_MASK_FUSED =   0x00000380,
+        CORE_MASK_FUSED =   0x00000078,
+        THREAD_MASK_FUSED = 0x00000007,
+    };
+
+    // Some handy functions
+    inline static uint32_t groupFromPir( uint32_t i_pir ) {
+        return (static_cast<PIR_t>(i_pir)).groupId;
+    }
+    inline static uint32_t chipFromPir( uint32_t i_pir ) {
+        return (static_cast<PIR_t>(i_pir)).chipId;
+    }
+    inline static uint32_t coreFromPir( uint32_t i_pir ) {
+        return (static_cast<PIR_t>(i_pir)).coreId;
+    }
+    inline static uint32_t threadFromPir( uint32_t i_pir ) {
+        return (static_cast<PIR_t>(i_pir)).threadId;
+    }
+
+    inline static uint32_t groupFromChipId( uint32_t i_chipId ) {
+        return (i_chipId >> BITS_IN_CHIP);
+    }
+    inline static uint32_t chipFromChipId( uint32_t i_chipId ) {
+        return (i_chipId & (CHIP_MASK >>
+                            (BITS_IN_CORE + BITS_IN_THREAD)));
+    }
+
+    inline static uint32_t groupFromCoreId( uint32_t i_chipId ) {
+        return (i_chipId >> (BITS_IN_CHIP+ BITS_IN_CORE));
+    }
+    inline static uint32_t chipFromCoreId( uint32_t i_chipId ) {
+        return (i_chipId >> BITS_IN_CORE);
+    }
+    inline static uint32_t coreFromCoreId( uint32_t i_chipId ) {
+        return (i_chipId & (CORE_MASK >> BITS_IN_THREAD));
+    }
+
+    inline static uint32_t createChipId( uint32_t i_groupId,
+                                         uint32_t i_chipId ) {
+        return ((i_groupId << BITS_IN_CHIP) | i_chipId);
+    }
+    inline static uint32_t createCoreId( uint32_t i_groupId,
+                                         uint32_t i_chipId,
+                                         uint32_t i_coreId )
+    {
+        return ((((i_groupId << BITS_IN_CHIP)
+                  | i_chipId)
+                 << BITS_IN_CORE) | i_coreId);
+    }
+
+    inline static uint32_t createCoreId( uint32_t i_chipId,
+                                         uint32_t i_coreId )
+    {
+        return ((i_chipId << BITS_IN_CORE) | i_coreId);
+    }
+
+};
+
+
+#endif /* _PIRFORMAT_H */
+
diff --git a/src/include/kernel/intmsghandler.H b/src/include/kernel/intmsghandler.H
index 57044a483..98d8d5288 100644
--- a/src/include/kernel/intmsghandler.H
+++ b/src/include/kernel/intmsghandler.H
@@ -5,7 +5,9 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
+/* Contributors Listed Below - COPYRIGHT 2011,2016                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -28,6 +30,7 @@
 #include <kernel/msghandler.H>
 #include <kernel/msg.H>
 #include <builtins.h>
+#include <arch/pirformat.H>
 
 /**
  * @class InterruptMsgHdlr
@@ -53,17 +56,17 @@ class InterruptMsgHdlr : public MessageHandler
          */
         enum
         {
-            P8_PIR_THREADID_MSK = 0x00000007,
-            P8_PIR_COREID_MSK   = 0x00000078,
-            P8_PIR_CHIPID_MSK   = 0x00000380,
-            P8_PIR_NODEID_MSK   = 0x00001C00,
+            P8_PIR_THREADID_MSK = PIR_t::THREAD_MASK,
+            P8_PIR_COREID_MSK   = PIR_t::CORE_MASK,
+            P8_PIR_CHIPID_MSK   = PIR_t::CHIP_MASK,
+            P8_PIR_NODEID_MSK   = PIR_t::GROUP_MASK,
 
             // Logical Shift Left fields for mmio Base address from PIR.
             // (IP addr bit pos - PIR bit pos)
-            P8_IP_THREADID_LSL = (12-0),
-            P8_IP_COREID_LSL   = (15-3),
-            P8_IP_CHIPID_LSL   = (20-7),
-            P8_IP_NODEID_LSL   = (22-10),
+            P8_IP_THREADID_LSL = (12-PIR_t::BITS_AFTER_CORE),
+            P8_IP_COREID_LSL   = (15-PIR_t::BITS_AFTER_CORE),
+            P8_IP_CHIPID_LSL   = (20-PIR_t::BITS_AFTER_CHIP),
+            P8_IP_NODEID_LSL   = (22-PIR_t::BITS_AFTER_GROUP),
             XIRR_ADDR_OFFSET   = 4,
             MFRR_ADDR_OFFSET   = 12,
 
diff --git a/src/include/usr/hwas/common/deconfigGard.H b/src/include/usr/hwas/common/deconfigGard.H
index 374b6b44f..7c11d8643 100644
--- a/src/include/usr/hwas/common/deconfigGard.H
+++ b/src/include/usr/hwas/common/deconfigGard.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -431,7 +431,7 @@ private:
         // target for this chip
         TARGETING::Target * iv_pThisProc;
         TARGETING::ATTR_HUID_type procHUID;
-        TARGETING::ATTR_FABRIC_NODE_ID_type procFabricNode;
+        TARGETING::ATTR_FABRIC_GROUP_ID_type procFabricGroup;
         TARGETING::ATTR_FABRIC_CHIP_ID_type procFabricChip;
         bool iv_masterCapable;
         bool iv_deconfigured;
diff --git a/src/include/usr/intr/interrupt.H b/src/include/usr/intr/interrupt.H
index b5e41a2d9..1b24c2eed 100644
--- a/src/include/usr/intr/interrupt.H
+++ b/src/include/usr/intr/interrupt.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -36,44 +36,6 @@ namespace TARGETING
 namespace INTR
 {
     /**
-     * cpu PIR register
-     */
-    struct PIR_t
-    {
-        union
-        {
-            uint32_t word;
-            struct
-            {
-                //P8:
-                uint32_t        reserved:19;    //!< zeros
-                uint32_t        nodeId:3;       //!< node (0-3)
-                uint32_t        chipId:3;       //!< chip pos on node (0-5)
-                uint32_t        coreId:4;       //!< Core number (1-6,9-14)?
-                uint32_t        threadId:3;     //!< Thread number (0-7)
-            } PACKED;
-        };
-        PIR_t(uint32_t i_word = 0) : word(i_word) {}
-
-        PIR_t(uint32_t i_nodeId, uint32_t i_chipId,
-              uint32_t i_coreId, uint32_t i_thread = 0) :
-            reserved(0),
-            nodeId(i_nodeId), chipId(i_chipId),
-            coreId(i_coreId), threadId(i_thread) {}
-
-        PIR_t operator= (uint32_t i_word)
-        {
-            word = i_word;
-            return word;
-        }
-
-        bool operator< (const PIR_t& r) const
-        {
-            return word < r.word;
-        }
-    };
-
-    /**
      * External Interrupt Types (XISR)
      * This value is passed in message data[0] on interrupt or shutdown.
      * @note The XISR is 24 bits:
diff --git a/src/include/usr/runtime/rt_targeting.H b/src/include/usr/runtime/rt_targeting.H
index 7559b6170..e26ea5fe4 100644
--- a/src/include/usr/runtime/rt_targeting.H
+++ b/src/include/usr/runtime/rt_targeting.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2014,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -38,20 +38,19 @@ namespace RT_TARG
 
     enum
     {
-        CHIPID_NODE_SHIFT = 3,  //!< CHIPID NODE is 'NNNCCC'b
-        MEMBUF_ID_SHIFT = 4,    //!< CHIPID for MEMBUF is 'NNNCCCMMMM'b
-        UNIT_ID_SHIFT   = 4,    //!< CHIPID for CORE is 'NNNCCCPPPP'b
-        UNIT_ID_MASK    = 0x000003ff, //!< Valid id bits w/o ID_FLAG
-        PROC_ID_TYPE    = 0x00000000, //!< PROC chip id type
-        MEMBUF_ID_TYPE  = 0x80000000, //!< MEMBUF chip id type
-        CORE_ID_TYPE    = 0x40000000, //!< CORE/EX chip id type
-        CHIPID_ID_MASK  = 0xFF000000, //!< TYPE field
+        MEMBUF_ID_SHIFT = 4,    //!< CHIPID for MEMBUF is '<procid>MMMM'b
+        MEMBUF_ID_MASK  = 0x0000000F, //!< valid position bits for MEMBUF
+
+        PROC_TYPE        = 0x00000000, //!< PROC chip id type
+        MEMBUF_TYPE      = 0x80000000, //!< MEMBUF chip id type
+        CORE_TYPE        = 0x40000000, //!< CORE chip id type
+        CHIPID_TYPE_MASK = 0xFF000000, //!< TYPE field
     };
 
 
     /**
      * @brief Convert a TARGETING::Target to an unit ID that can be used
-     * in calls to Sapphire
+     * in calls to the runtime host
      * @param[in] The HB TARGETING::Target
      * @param[out] Sapphire target id
      * @return an error handle on error
diff --git a/src/include/usr/targeting/common/targetservice.H b/src/include/usr/targeting/common/targetservice.H
index 828fe86f3..455502dcf 100644
--- a/src/include/usr/targeting/common/targetservice.H
+++ b/src/include/usr/targeting/common/targetservice.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -79,8 +79,8 @@ namespace TARGETING
     /* Invalid Section Id - to initialize struct variable */
     static const uint8_t INVALID_SECTIONID  = 0xFF;
 
-    // Special "not found" fabric node ID is the data type with all bits set
-    static const ATTR_FABRIC_NODE_ID_type FABRIC_NODE_ID_NOT_FOUND =
+    // Special "not found" fabric group ID is the data type with all bits set
+    static const ATTR_FABRIC_GROUP_ID_type FABRIC_GROUP_ID_NOT_FOUND =
         INVALID_NODE;
 
     /**