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| author | Brian Vanderpool <vanderp@us.ibm.com> | 2016-09-16 12:54:27 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-26 11:32:11 -0400 |
| commit | 33bce25d8d756219bb10aab368e0b3772fb66a3d (patch) | |
| tree | 3bf57a446beefe3bf1472cbdcc8c7b6794e9146e /src/import | |
| parent | aa07e5cb4b5cb7020c946e24f28e225e5feda5a0 (diff) | |
| download | talos-hostboot-33bce25d8d756219bb10aab368e0b3772fb66a3d.tar.gz talos-hostboot-33bce25d8d756219bb10aab368e0b3772fb66a3d.zip | |
Fix polarity usage of clock status bits
Change-Id: I3e8315747b4e2de8efb5ff17e424f640c603230a
RTC:161069
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29856
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Manish K. Chowdhary <manichow@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29859
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
| -rwxr-xr-x[-rw-r--r--] | src/import/chips/p9/procedures/hwp/pm/p9_query_stop_state.C | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_query_stop_state.C b/src/import/chips/p9/procedures/hwp/pm/p9_query_stop_state.C index 02c3a40c1..041f01fa0 100644..100755 --- a/src/import/chips/p9/procedures/hwp/pm/p9_query_stop_state.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_query_stop_state.C @@ -167,6 +167,7 @@ p9_query_stop_state( uint32_t l_quadStopLevel = 0; uint32_t l_exPos = 0; uint32_t l_coreStopLevel[2] = {0, 0}; + uint8_t l_data8; stop_attrs_t l_stop_attrs = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; // Initialize all fields to 1 hw_state_t l_clk_pfet = {0, 0, {0, 0}, {0, 0}, 0, 0, {0, 0}}; // Initialize all fields to 0 @@ -346,8 +347,12 @@ p9_query_stop_state( FAPI_TRY(fapi2::getScom(l_eq_target, EQ_CLOCK_STAT_SL, l_data64), "Error reading data from EQ_CLOCK_STAT_SL"); - l_data64.extractToRight<uint8_t>(l_clk_pfet.l2_hasclocks, eq_clk_l2_pos[l_exPos], 1); - l_data64.extractToRight<uint8_t>(l_clk_pfet.l3_hasclocks, eq_clk_l3_pos[l_exPos], 1); + l_data64.extractToRight<uint8_t>(l_data8, eq_clk_l2_pos[l_exPos], 1); + l_clk_pfet.l2_hasclocks = (l_data8 == 1) ? 0 : 1; // If the bit is 0, clocks are running + + l_data64.extractToRight<uint8_t>(l_data8, eq_clk_l3_pos[l_exPos], 1); + l_clk_pfet.l3_hasclocks = (l_data8 == 1) ? 0 : 1; // If the bit is 0, clocks are running + for (auto l_core_chplt : l_coreChiplets) { @@ -362,9 +367,11 @@ p9_query_stop_state( FAPI_TRY(fapi2::getScom(l_core_chplt, C_CLOCK_STAT_SL, l_data64), "Error reading data from C_CLOCK_STAT_SL"); - l_data64.extractToRight<uint8_t>(l_clk_pfet.c_exec_hasclocks[l_pos], 6, 1); - l_data64.extractToRight<uint8_t>(l_clk_pfet.c_pc_hasclocks[l_pos], 5, 1); + l_data64.extractToRight<uint8_t>(l_data8, 6, 1); + l_clk_pfet.c_exec_hasclocks[l_pos] = (l_data8 == 1) ? 0 : 1; // If the bit is 0, clocks are running + l_data64.extractToRight<uint8_t>(l_data8, 5, 1); + l_clk_pfet.c_pc_hasclocks[l_pos] = (l_data8 == 1) ? 0 : 1; // If the bit is 0, clocks are running } FAPI_DBG("Comparing Stop State vs Actual HW settings"); |
