PLL configuration updates -- permit e2e bypass execution

p9_sbe_attr_setup
p9_setup_sbe_config
  transmit PLL bypass controls through MBOX Scratch 4 bits 16:20
  transmit PLL mux controls through MBOX Scratch 5 bits 12:31

p9_common_poweronoff
  increase polling delays to account for refclock speed

p9_hcd_cache_dpll_setup
  permit DPLL execution in bypass, based on ATTR_DPLL_BYPASS

p9_sbe_npll_setup
  permit NEST PLL execution in bypass, based on ATTR_NEST_MEM_X_O_PCI_BYPASS

p9_mem_pll_setup
  permit MEM PLL execution in bypass, based on ATTR_NEST_MEM_X_O_PCI_BYPASS

p9_sbe_chiplet_pll_setup
  permit X/O/PCI PLL execution in bypass, based on ATTR_NEST_MEM_X_O_PCI_BYPASS

p9_sbe_tp_switch_gears
  skip adjustment of i2c bit divisor, based on ATTR_NEST_MEM_X_O_PCI_BYPASS

p9_sbe_attributes.xml
hb_temp_defaults.xml
  add defaults to enable platform CI

Change-Id: Icba6aee79d90b0280ba4818afd92c344c52f52ef
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28611
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28614
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 44 insertions, 3 deletions

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
index 0e6bc542f..045b93e43 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
@@ -34,6 +34,10 @@
   <description>setup clock mux settings</description>
   <valueType>uint32</valueType>
   <platInit/>
+  <!-- TODO: Story 155081
+       Not supposed to be writeable, PPE needs to resolve this issue in
+       p9_sbe_attr_setup.C -->
+  <writeable/>
 </attribute>
 
 <attribute>
@@ -629,28 +633,65 @@
 <attribute>
     <id>ATTR_CP_FILTER_BYPASS</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>To skip the locking sequence and check for lock of CP PLL</description>
+    <description>To skip the locking sequence and check for lock of CP filter PLL</description>
     <valueType>uint8</valueType>
     <platInit/>
+    <!-- TODO: Story 155081
+         Not supposed to be writeable, PPE needs to resolve this issue in
+         p9_sbe_attr_setup.C -->
+    <writeable/>
 </attribute>
 
 <attribute>
     <id>ATTR_SS_FILTER_BYPASS</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>To skip the locking sequence and check for lock of SS PLL</description>
+    <description>To skip the locking sequence and check for lock of SS filter PLL</description>
     <valueType>uint8</valueType>
     <platInit/>
+    <!-- TODO: Story 155081
+         Not supposed to be writeable, PPE needs to resolve this issue in
+         p9_sbe_attr_setup.C -->
+    <writeable/>
 </attribute>
 
 <attribute>
     <id>ATTR_IO_FILTER_BYPASS</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>To skip the locking sequence and check for lock of IO PLL</description>
+    <description>To skip the locking sequence and check for lock of IO filter PLL</description>
     <valueType>uint8</valueType>
     <platInit/>
+    <!-- TODO: Story 155081
+         Not supposed to be writeable, PPE needs to resolve this issue in
+         p9_sbe_attr_setup.C -->
+    <writeable/>
 </attribute>
 
 <attribute>
+    <id>ATTR_DPLL_BYPASS</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Skip locking sequence and check for lock of DPLL</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <!-- TODO: Story 155081
+         Not supposed to be writeable, PPE needs to resolve this issue in
+         p9_sbe_attr_setup.C -->
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_NEST_MEM_X_O_PCI_BYPASS</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>Skip the locking sequence and check for lock of NEST/MEM/XBUS/OBUS/PCI PLLs</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <!-- TODO: Story 155081
+         Not supposed to be writeable, PPE needs to resolve this issue in
+         p9_sbe_attr_setup.C -->
+    <writeable/>
+</attribute>
+
+
+<attribute>
   <id>ATTR_TARGET_HAS_POWER</id>
   <targetType>TARGET_TYPE_PERV</targetType>
   <description>Functional Target has power</description>