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author | Ben Gass <bgass@us.ibm.com> | 2018-08-31 12:42:39 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-10-18 11:13:33 -0500 |
commit | 7504dc6275e7da30b0ce064b2af983457950aca7 (patch) | |
tree | f63852ca87b66989329431128d1191a6437b509e /src/import/chips/p9/procedures/xml/attribute_info/p9a_omi_setup_bars.xml | |
parent | e5eb14043e5dee87618875f178c5af0c90f5166a (diff) | |
download | talos-hostboot-7504dc6275e7da30b0ce064b2af983457950aca7.tar.gz talos-hostboot-7504dc6275e7da30b0ce064b2af983457950aca7.zip |
Adding p9a_get/put_mmio and explorer_inband
p9a_get/put_mmio implements getMMIO and putMMIO via
the ADU.
explorer_inband implements functions to access MSCC
MMIO registers, MSCC RAM space for commands and
responses, and IBM scom registers via inband/mmio
to Explorer.
Change-Id: I7b0213b1cb426b10f2902e06373295986e01cd9b
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65569
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66608
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9a_omi_setup_bars.xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9a_omi_setup_bars.xml | 83 |
1 files changed, 83 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9a_omi_setup_bars.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9a_omi_setup_bars.xml new file mode 100644 index 000000000..779aec2fc --- /dev/null +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9a_omi_setup_bars.xml @@ -0,0 +1,83 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/p9a_omi_setup_bars.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2018 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<attributes> +<!-- ********************************************************************* --> +<attribute> + <id>ATTR_OMI_INBAND_BAR_ENABLE</id> + <targetType>TARGET_TYPE_OMI</targetType> + <description> DMI inband BAR enable. + Set by platform. + Used by p9c_set_inband_addr. + </description> + <valueType>uint8</valueType> + <enum>DISABLE = 0x0, ENABLE = 0x1</enum> + <platInit/> + <persistRuntime/> +</attribute> +<!-- ********************************************************************* --> +<attribute> + <id>ATTR_OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <targetType>TARGET_TYPE_OMI</targetType> + <description> + OMI inband BAR address offset. + + Set by platform. + + One Axone bar register is set per MC channel for MMIO and another + is set per MC channel for config space. The bar is shared between + both sub-channels each with an OCMB. The upper bit of the bar + size is used to determine which sub-channel is selected. This + means that for two OCMB's their config space is contiguous and + their MMIO space is contiguous. Therefore a single OCMB's MMIO + and config space cannot be contiguous. However, we can still + use one BAR attribute. The p9a_omi_setup_bars procedure can interleave + the config space and MMIO space as shown in the table bellow. + For example, both MMIO and config bar sizes are 2GB. The 2GB + bit becomes the selector for the subchannel. The 4GB bit becomes + the offset applied for MMIO operations. + + + Each OCMB is assigned one base address attribute. + ocmb | BAR ATTRIBUTE | Type | Base reg - end addr | size | sub-ch + +-----+--------------------+------+-----------------------------------------+------+------- + ocmb0 | 0x0006030200000000 | cnfg | 0x0006030200000000 - 0x000603027FFFFFFF | 2GB | 0 + ocmb1 | 0x0006030280000000 | cnfg | 0x0006030280000000 - 0x00060302FFFFFFFF | 2GB | 1 + ocmb0 | N/A | mmio | 0x0006030300000000 - 0x000603037FFFFFFF | 2GB | 0 + ocmb1 | N/A | mmio | 0x0006030380000000 - 0x00060303FFFFFFFF | 2GB | 1 + +-----+--------------------+------+-----------------------------------------+------+------- + ocmb2 | 0x0006030400000000 | cnfg | 0x0006030400000000 - 0x000603047FFFFFFF | 2GB | 0 + ocmb3 | 0x0006030480000000 | cnfg | 0x0006030480000000 - 0x00060304FFFFFFFF | 2GB | 1 + ocmb2 | N/A | mmio | 0x0006030500000000 - 0x000603057FFFFFFF | 2GB | 0 + ocmb3 | N/A | mmio | 0x0006030580000000 - 0x00060305FFFFFFFF | 2GB | 1 + + Used by p9a_omi_setup_bars + </description> + <valueType>uint64</valueType> + <platInit/> + <persistRuntime/> +</attribute> +<!-- ********************************************************************* --> + +</attributes> |