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| author | Chris Yan <fyan@us.ibm.com> | 2016-08-04 15:36:47 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-08-09 14:22:33 -0400 |
| commit | d54c522395bb266a125b4fe1d2a96578f3edd5c4 (patch) | |
| tree | 365ed33b8c09e2f52489f09ab168591455f99c3b /src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml | |
| parent | c3e0a9ea1d0d43892cce1c507782b72dfec66494 (diff) | |
| download | talos-hostboot-d54c522395bb266a125b4fe1d2a96578f3edd5c4.tar.gz talos-hostboot-d54c522395bb266a125b4fe1d2a96578f3edd5c4.zip | |
Update MR and MT VPD. Add support for Impedance CNTL.
Updated fake vpd
Change-Id: Ibdc07d3cbf517d8bd3f5192218205e3680f7eeb6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27889
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27940
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml index db6be426b..33cbaae1d 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mr_attributes.xml @@ -421,7 +421,7 @@ </attribute> <attribute> - <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLK0</id> + <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLKP</id> <targetType>TARGET_TYPE_MCS</targetType> <description> Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock. @@ -432,12 +432,12 @@ <mssUnits>tick</mssUnits> <mssBlobStart>50</mssBlobStart> <mssBlobLength>2</mssBlobLength> - <mssAccessorName>vpd_mr_mc_phase_rot_d0_clk0</mssAccessorName> + <mssAccessorName>vpd_mr_mc_phase_rot_d0_clkp</mssAccessorName> <array>2</array> </attribute> <attribute> - <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLK1</id> + <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D0_CLKN</id> <targetType>TARGET_TYPE_MCS</targetType> <description> Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock. @@ -448,12 +448,12 @@ <mssUnits>tick</mssUnits> <mssBlobStart>52</mssBlobStart> <mssBlobLength>2</mssBlobLength> - <mssAccessorName>vpd_mr_mc_phase_rot_d0_clk1</mssAccessorName> + <mssAccessorName>vpd_mr_mc_phase_rot_d0_clkn</mssAccessorName> <array>2</array> </attribute> <attribute> - <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLK0</id> + <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLKP</id> <targetType>TARGET_TYPE_MCS</targetType> <description> Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock. @@ -464,12 +464,12 @@ <mssUnits>tick</mssUnits> <mssBlobStart>54</mssBlobStart> <mssBlobLength>2</mssBlobLength> - <mssAccessorName>vpd_mr_mc_phase_rot_d1_clk0</mssAccessorName> + <mssAccessorName>vpd_mr_mc_phase_rot_d1_clkp</mssAccessorName> <array>2</array> </attribute> <attribute> - <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLK1</id> + <id>ATTR_MSS_VPD_MR_MC_PHASE_ROT_D1_CLKN</id> <targetType>TARGET_TYPE_MCS</targetType> <description> Phase rotator delay value of Clock for Dimm#_CLK# in ticks. Ticks are 1/128 of one cycle of clock. @@ -480,7 +480,7 @@ <mssUnits>tick</mssUnits> <mssBlobStart>56</mssBlobStart> <mssBlobLength>2</mssBlobLength> - <mssAccessorName>vpd_mr_mc_phase_rot_d1_clk1</mssAccessorName> + <mssAccessorName>vpd_mr_mc_phase_rot_d1_clkn</mssAccessorName> <array>2</array> </attribute> |
