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authorPrem Shanker Jha <premjha2@in.ibm.com>2018-09-25 01:27:30 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-12-14 15:13:33 -0600
commit55a180dc08f9e9a837672ebae03a92dd9bba3ef9 (patch)
tree10b8c4a3e7a2a420720a4af459d3ca06151af3a2 /src/import/chips/p9/procedures/hwp/pm
parent2ad30a4a4e4db7bc8d3b015e408848f70c3014f8 (diff)
downloadtalos-hostboot-55a180dc08f9e9a837672ebae03a92dd9bba3ef9.tar.gz
talos-hostboot-55a180dc08f9e9a837672ebae03a92dd9bba3ef9.zip
Self Save: Fixed bugs pertaining to SPR self save.
Commit fixes some issues with code found during integration test - replacement of addi with xor instruction during self save API. - fixing instruction generation for MFMSR during self save - data struct updates in STOP API - error RC updates for hcode image build - HOMER parser updates. - removed self save support for URMOR and HRMOR - code changes for compilation with OPAL - populating CME Image header with unsecure HOMER address. Key_Cronus_Test=PM_REGRESS Change-Id: I7cedcc466267c4245255d8d75c01ed695e316720 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66580 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66587 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C103
1 files changed, 103 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index 38d4debac..d72c4d7bd 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -58,6 +58,7 @@
#ifdef __CRONUS_VER
#include <string>
#endif
+
using namespace stopImageSection;
extern "C"
@@ -141,6 +142,8 @@ enum
SMF_SELF_REST_SIGN_OFFSET = 0x1300,
SMF_SELF_SIGNATURE = 0x5f534d46,
CORE_REST_WORDS_PER_THREAD = (CORE_RESTORE_SIZE_PER_THREAD >> 2),
+ TWO_MB_ALIGNMENT_CHECK = 0x1FFFFF,
+ SMF_BIT_CHECK = 0x0001000000000000ull,
};
/**
@@ -1355,6 +1358,7 @@ void updateCpmrCmeRegion( Homerlayout_t* i_pChipHomer )
FAPI_INF(" CPMR Phy Add : 0x%016lx", SWIZZLE_8_BYTE(pCmeHdr->g_cme_cpmr_PhyAddr));
FAPI_INF(" Timebase (Hz) : 0x%08X (%d)", SWIZZLE_4_BYTE(pCmeHdr->g_cme_timebase_hz),
SWIZZLE_4_BYTE(pCmeHdr->g_cme_timebase_hz));
+ FAPI_INF(" UnSecure HOMER : 0x%016lx", SWIZZLE_8_BYTE(pCmeHdr->g_cme_unsec_cpmr_PhyAddr));
FAPI_INF("========================= CME Header End ==================================");
FAPI_INF("==========================CPMR Header===========================================");
@@ -4707,6 +4711,98 @@ fapi_try_exit:
//---------------------------------------------------------------------------
+ fapi2::ReturnCode verifySprSelfSave( void * i_pHomer, uint8_t i_fuseMode,
+ P9FuncModel & i_chipFuncModel )
+{
+ #ifdef __SELF_SAVE_TEST
+ uint64_t l_pir = 0;
+ uint32_t l_saveVect = 0;
+ l_saveVect =
+ ( 0x80000000 >> BIT_POS_CIABR ) |
+ ( 0x80000000 >> BIT_POS_DAWR ) |
+ ( 0x80000000 >> BIT_POS_DAWRX ) |
+ ( 0x80000000 >> BIT_POS_HSPRG0) |
+ ( 0x80000000 >> BIT_POS_LDBAR ) |
+ ( 0x80000000 >> BIT_POS_LPCR ) |
+ ( 0x80000000 >> BIT_POS_MSR ) |
+ ( 0x80000000 >> BIT_POS_HID ) |
+ ( 0x80000000 >> BIT_POS_HMEER ) |
+ ( 0x80000000 >> BIT_POS_PTCR ) |
+ ( 0x80000000 >> BIT_POS_SMFCTRL) |
+ ( 0x80000000 >> BIT_POS_USPRG0 ) |
+ ( 0x80000000 >> BIT_POS_USPRG1 ) |
+ ( 0x80000000 >> BIT_POS_PMCR ) ;
+
+ StopReturnCode_t l_rc;
+
+ FAPI_DBG( "Save Vector 0x%08x" , l_saveVect );
+
+ for( uint8_t l_corePos = 0; l_corePos < MAX_CORES_PER_CHIP;
+ l_corePos++ )
+ {
+ if( i_chipFuncModel.isCoreFunctional( l_corePos ) )
+ {
+ for( uint8_t l_threadPos = 0; l_threadPos < MAX_THREADS_PER_CORE;
+ l_threadPos++ )
+ {
+ l_pir = getPirValue( l_corePos, l_threadPos, i_fuseMode );
+ l_rc = stopImageSection::p9_stop_save_cpureg_control( i_pHomer,
+ l_pir, l_saveVect );
+ FAPI_ASSERT( ( !l_rc ),
+ fapi2::SELF_SAVE_API_FAILED()
+ .set_PIR( l_pir )
+ .set_STOP_API_RC( l_rc )
+ .set_CORE_POS( l_corePos )
+ .set_THREAD_POS( l_threadPos ),
+ "Failed To Create SPR Self Save Entry" );
+ }
+ }
+ }
+
+ fapi_try_exit:
+ #endif
+ return fapi2::current_err;
+}
+
+//---------------------------------------------------------------------------
+
+fapi2::ReturnCode populateUnsecureHomerAddress( CONST_FAPI2_PROC& i_procTgt, Homerlayout_t* i_pHomer )
+{
+ uint64_t l_unsecureHomerAdd = 0;
+ uint8_t l_invalidAddress = 0;
+ cmeHeader_t* pCmeHdr =
+ (cmeHeader_t*) & i_pHomer->cpmrRegion.cmeSramRegion[CME_INT_VECTOR_SIZE];
+ FAPI_DBG( ">> populateUnsecureHomerAddress" );
+
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_UNSECURE_HOMER_ADDRESS,
+ i_procTgt,
+ l_unsecureHomerAdd),
+ "Error from FAPI_ATTR_GET for attribute ATTR_UNSECURE_HOMER_ADDRESS");
+ FAPI_INF( "Atrribute ATTR_UNSECURE_HOMER_ADDRESS 0x%016lx", l_unsecureHomerAdd );
+
+ if( l_unsecureHomerAdd & 0x1fffff )
+ {
+ l_invalidAddress = 1;
+ }
+ else if( (l_unsecureHomerAdd & SMF_BIT_CHECK) )
+ {
+ l_invalidAddress = 1;
+ }
+
+ FAPI_ASSERT( ( !l_invalidAddress ),
+ fapi2::BAD_UNSECURE_HOMER_VALUE()
+ .set_UNSECURE_HOMER_ADDRESS( l_unsecureHomerAdd ),
+ "Bad address for unsecure HOMER 0x%016lx", l_unsecureHomerAdd );
+
+ pCmeHdr->g_cme_unsec_cpmr_PhyAddr = SWIZZLE_8_BYTE(l_unsecureHomerAdd);
+
+ fapi_try_exit:
+ FAPI_DBG( "<< populateUnsecureHomerAddress" );
+ return fapi2::current_err;
+}
+
+//--------------------------------------------------------------------------------------------------------
+
fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
void* const i_pImageIn,
void* i_pHomerImage,
@@ -4883,9 +4979,13 @@ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
l_riskLevel, l_qpmrHdr, i_imgType ),
"Failed To Layout Quad Rings" );
+ FAPI_TRY( populateUnsecureHomerAddress( i_procTgt, pChipHomer ),
+ "Failed To Populate Unsecure HOMER Region with sc2 instruction" );
+
//Update CPMR Header with Scan Ring details
updateCpmrCmeRegion( pChipHomer );
+
//Update QPMR Header area in HOMER
updateQpmrHeader( pChipHomer, l_qpmrHdr );
@@ -4934,6 +5034,9 @@ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
FAPI_TRY( addUrmorRestore( i_pHomerImage, fuseModeState, l_chipFuncModel ),
"Failed to create URMOR restore entry" );
+ FAPI_TRY( verifySprSelfSave( i_pHomerImage, fuseModeState, l_chipFuncModel ),
+ "Failed to create SPR self save restore entry" );
+
fapi_try_exit:
FAPI_IMP("<< p9_hcode_image_build" );
return fapi2::current_err;
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