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| author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2019-05-02 12:35:23 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-05-10 16:34:00 -0500 |
| commit | 431fd07bcd5f5e17b73c7e82c71be351b0e333f0 (patch) | |
| tree | 75a143c6240dde76aed62a7efa3ba9421f56cb01 /src/import/chips/p9/procedures/hwp/pm | |
| parent | fe000f81b6492f77e783f72b408260d5346b9757 (diff) | |
| download | talos-hostboot-431fd07bcd5f5e17b73c7e82c71be351b0e333f0.tar.gz talos-hostboot-431fd07bcd5f5e17b73c7e82c71be351b0e333f0.zip | |
PPB: Bug fix in compute VPD points that impact to bias values
- Whenvever there are external freq/volt attribute values
present, we consider those value as an additional
to the base vpd values.It's basically percentage value
that is mentioned in attributes.
The bug was we were getting double the value because
using the wrong variable for the computation.
Change-Id: I5fcbf92b177e7a00fc4b5b3719a48562dbfd0b05
CQ:SW464661
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76879
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76895
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C index 0609ddc8f..0f1a8bdc6 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C @@ -2396,9 +2396,9 @@ void PlatPmPPB::compute_vpd_pts() //BIASED POINTS for (p = 0; p < NUM_OP_POINTS; p++) { - uint32_t l_frequency_mhz = (iv_biased_vpd_pts[p].frequency_mhz); - uint32_t l_vdd_mv = (iv_biased_vpd_pts[p].vdd_mv); - uint32_t l_vcs_mv = (iv_biased_vpd_pts[p].vcs_mv); + uint32_t l_frequency_mhz = (iv_raw_vpd_pts[p].frequency_mhz); + uint32_t l_vdd_mv = (iv_raw_vpd_pts[p].vdd_mv); + uint32_t l_vcs_mv = (iv_raw_vpd_pts[p].vcs_mv); iv_operating_points[VPD_PT_SET_BIASED][p].vdd_mv = bias_adjust_mv(l_vdd_mv, iv_bias[p].vdd_ext_hp); |
