p9_pstates.h breakup

- content needed by all platforms
- cmeqm content created by p9_pstate_parameter_block for CME Hcode
- occ content created by p9_pstate_parameter_block for OCC FW
- pgpe content created by p9_pstate_parameter_block for PGPE Hcode
- API definitions between PGPE Hcode and OCC FW including the current
  shared memory definition.
  -  the IPC commands are update to better match OCC discussions
 - Addressed OCC FW<>PGPE Hcode review / Gerrit comments
- Still have a HB and Jenkins fail with the p9_pm_utils.  Cronus is fine.
- Deleted ../hwp/lib/p9_pstate_parameter_block.C in deference to already
  merged ../hwp/pm/p9_pstate_parameter_block.C
- Update IDDQ member names to be more descriptive to match WOF discussion
- Remove endianess checks in p9_pm_utils.H

Change-Id: I6ab884af08d5598da08bded1707b57c471f2f594
RTC: 163927
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29915
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29917
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

1 files changed, 4 insertions, 42 deletions

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
index e311dcfa6..1e6d797a6 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
@@ -29,7 +29,7 @@
 
 // *HWP HWP Owner       : Amit Kumar <akumar3@us.ibm.com>
 // *HWP Backup HWP Owner: Greg Still <stillgs@us.ibm.com>
-// *HWP FW Owner        : Bilicon Patil <bilpatil@in.ibm.com>
+// *HWP FW Owner        : Prem Jha <premjha2@in.ibm.com>
 // *HWP Team            : PM
 // *HWP Level           : 1
 // *HWP Consumed by     : HS
@@ -46,47 +46,9 @@
 // Common macros
 //------------------------------------------------------------------------------
 
-#define SET_FIR_ACTION(b, x, y)  \
-    action_0.writeBit<b>(x); \
-    action_1.writeBit<b>(y);
-
-#define SET_CHECK_STOP(b){SET_FIR_ACTION(b, 0, 0);}
-#define SET_RECOV_ATTN(b){SET_FIR_ACTION(b, 0, 1);}
-#define SET_RECOV_INTR(b){SET_FIR_ACTION(b, 1, 0);}
-#define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);}
-#define SET_FIR_MASKED(b){mask.setBit<b>();}
-#define CLEAR_FIR_MASK(b){mask.clearBit<b>()}
-
-
-/**
- * @brief  helper function to swizzle given input data
- * @note   swizles bytes to handle endianess issue.
- */
-#if( __BYTE_ORDER == __BIG_ENDIAN )
-
-// NOP if it is a big endian system
-#define RevLe16(WORD) WORD
-#define RevLe32(WORD) WORD
-#define RevLe64(WORD) WORD
-
-#else
-#define RevLe16(WORD) \
-    ( (((WORD) >> 8) & 0x00FF) | (((WORD) << 8) & 0xFF00) )
-
-#define RevLe32(WORD) \
-    ( (((WORD) >> 24) & 0x000000FF) | (((WORD) >>  8) & 0x0000FF00) | \
-      (((WORD) <<  8) & 0x00FF0000) | (((WORD) << 24) & 0xFF000000) )
-
-#define RevLe64(WORD) \
-    ( (((WORD) >> 56) & 0x00000000000000FF) |  \
-      (((WORD) >> 40) & 0x000000000000FF00)| \
-      (((WORD) >> 24) & 0x0000000000FF0000) |  \
-      (((WORD) >>  8) & 0x00000000FF000000) |  \
-      (((WORD) <<  8) & 0x000000FF00000000) |  \
-      (((WORD) << 24) & 0x0000FF0000000000) | \
-      (((WORD) << 40) & 0x00FF000000000000) |  \
-      (((WORD) << 56) & 0xFF00000000000000) )
-#endif
+uint16_t revle16(const uint16_t i_x);
+uint32_t revle32(const uint32_t i_x);
+uint64_t revle64(const uint64_t i_x);
 
 //------------------------------------------------------------------------------
 // Function prototype