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| author | Greg Still <stillgs@us.ibm.com> | 2016-05-11 21:24:01 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-01 14:37:13 -0400 |
| commit | 0990c2c96fc3baed7908e855bacaa854b2210d0b (patch) | |
| tree | 44a203040721415ce8c2e10da82e95025f755034 /src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C | |
| parent | 33138a49f67d942ee5ddc54d7830f1fb51c695a3 (diff) | |
| download | talos-hostboot-0990c2c96fc3baed7908e855bacaa854b2210d0b.tar.gz talos-hostboot-0990c2c96fc3baed7908e855bacaa854b2210d0b.zip | |
p9_block_wakeup_intr Level 2 - fix PPE compilation issue
- Moved ATTR_CHIP_UNIT_POS from core to perv
- Add p9_hcd_common.H to allow for Hostboot CI
Change-Id: I541f11e7312556a9a2f94226b90fd3b04ce83177
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24401
Tested-by: Hostboot CI
Tested-by: Jenkins Server
Tested-by: PPE CI
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24402
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C index 1c825bccd..6b701a53a 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C @@ -22,7 +22,7 @@ /// with an EX chiplet /// // *HWP HWP Owner: Amit Kumar <akumar3@us.ibm.com> -// *HWP FW Owner: Bilicon Patil <bilpatil@in.ibm.com> +// *HWP FW Owner: Prem Jha <premjha1@in.ibm.com> // *HWP Team: PM // *HWP Level: 2 // *HWP Consumed by: FSP:HS @@ -44,6 +44,7 @@ // ---------------------------------------------------------------------- #include <p9_block_wakeup_intr.H> +#include <p9_hcd_common.H> @@ -73,10 +74,15 @@ p9_block_wakeup_intr( // Get the core number uint8_t l_attr_chip_unit_pos = 0; + + fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv = + i_core_target.getParent<fapi2::TARGET_TYPE_PERV>(); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, - i_core_target, + l_perv, l_attr_chip_unit_pos), "fapiGetAttribute of ATTR_CHIP_UNIT_POS failed"); + l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET; // Read for trace { |
