From 0990c2c96fc3baed7908e855bacaa854b2210d0b Mon Sep 17 00:00:00 2001 From: Greg Still Date: Wed, 11 May 2016 21:24:01 -0500 Subject: p9_block_wakeup_intr Level 2 - fix PPE compilation issue - Moved ATTR_CHIP_UNIT_POS from core to perv - Add p9_hcd_common.H to allow for Hostboot CI Change-Id: I541f11e7312556a9a2f94226b90fd3b04ce83177 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24401 Tested-by: Hostboot CI Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Sachin Gupta Reviewed-by: Gregory S. Still Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24402 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C') diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C index 1c825bccd..6b701a53a 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_block_wakeup_intr.C @@ -22,7 +22,7 @@ /// with an EX chiplet /// // *HWP HWP Owner: Amit Kumar -// *HWP FW Owner: Bilicon Patil +// *HWP FW Owner: Prem Jha // *HWP Team: PM // *HWP Level: 2 // *HWP Consumed by: FSP:HS @@ -44,6 +44,7 @@ // ---------------------------------------------------------------------- #include +#include @@ -73,10 +74,15 @@ p9_block_wakeup_intr( // Get the core number uint8_t l_attr_chip_unit_pos = 0; + + fapi2::Target l_perv = + i_core_target.getParent(); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, - i_core_target, + l_perv, l_attr_chip_unit_pos), "fapiGetAttribute of ATTR_CHIP_UNIT_POS failed"); + l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET; // Read for trace { -- cgit v1.2.1