Level 2 HWP p9_mem_pll_initf

Change-Id: Iabd51544e2f1260b628074d835eb3f766678f925
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21793
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21794
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 33 insertions, 46 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_mem_pll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_mem_pll_initf.C
index 6f62b2aa2..064d098cd 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_mem_pll_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_mem_pll_initf.C
@@ -19,7 +19,7 @@
 //------------------------------------------------------------------------------
 /// @file  p9_mem_pll_initf.C
 ///
-/// @brief PLL initfile for MBAs
+/// @brief Scan MC ring bucket based on ATTR_MSS_FREQ.
 //------------------------------------------------------------------------------
 // *HWP HW Owner        : Anusha Reddy Rangareddygari <anusrang@in.ibm.com>
 // *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
@@ -33,63 +33,50 @@
 //## auto_generated
 #include "p9_mem_pll_initf.H"
 
-
-
-fapi2::ReturnCode p9_mem_pll_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
+fapi2::ReturnCode p9_mem_pll_initf(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chiplet)
 {
-    FAPI_INF("Entering ...");
-
-    uint8_t l_sync_mode;
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, i_target_chip, l_sync_mode),
-             "Error from FAPI_ATTR_GET (ATTR_MC_SYNC_MODE)");
+    uint64_t l_read_attr = 0;
+    RingID ringID = mc_pll_bndy_bucket_1;
+    FAPI_INF("Entering p9_mem_pll_initf ...");
 
-    if (l_sync_mode == 0)
+    for (auto l_trgt_chplt : i_target_chiplet.getChildren<fapi2::TARGET_TYPE_MCBIST>
+         (fapi2::TARGET_STATE_FUNCTIONAL))
     {
-        FAPI_DBG("Re-scanning PLL ring to set final frequency");
+        FAPI_INF("get the attribute ATTR_MSS_FREQ");
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_FREQ, l_trgt_chplt, l_read_attr));
 
-        for (auto l_mcbist_target : i_target_chip.getChildren<fapi2::TARGET_TYPE_MCBIST>(fapi2::TARGET_STATE_FUNCTIONAL))
+        switch(l_read_attr)
         {
-            uint64_t l_mss_freq;
-            RingID l_ring_id;
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_FREQ, l_mcbist_target, l_mss_freq),
-                     "Error from FAPI_ATTR_GET (ATTR_MSS_FREQ)");
-
-            switch (l_mss_freq)
-            {
-                case fapi2::ENUM_ATTR_MSS_FREQ_MT1866:
-                    l_ring_id = mc_pll_bndy_bucket_1;
-                    break;
-
-                case fapi2::ENUM_ATTR_MSS_FREQ_MT2133:
-                    l_ring_id = mc_pll_bndy_bucket_2;
-                    break;
+            case fapi2::ENUM_ATTR_MSS_FREQ_MT1866:
+                ringID = mc_pll_bndy_bucket_1;
+                break;
 
-                case fapi2::ENUM_ATTR_MSS_FREQ_MT2400:
-                    l_ring_id = mc_pll_bndy_bucket_3;
-                    break;
+            case fapi2::ENUM_ATTR_MSS_FREQ_MT2133:
+                ringID = mc_pll_bndy_bucket_2;
+                break;
 
-                case fapi2::ENUM_ATTR_MSS_FREQ_MT2666:
-                    l_ring_id = mc_pll_bndy_bucket_4;
-                    break;
+            case fapi2::ENUM_ATTR_MSS_FREQ_MT2400:
+                ringID = mc_pll_bndy_bucket_3;
+                break;
 
-                default:
-                    FAPI_ASSERT(false,
-                                fapi2::P9_MEM_PLL_INITF_UNSUPPORTED_FREQ().
-                                set_TARGET(l_mcbist_target).
-                                set_MSS_FREQ(l_mss_freq),
-                                "Unsupported MSS_FREQ attribute value!");
-            }
+            case fapi2::ENUM_ATTR_MSS_FREQ_MT2666:
+                ringID = mc_pll_bndy_bucket_4;
+                break;
 
-            FAPI_TRY(fapi2::putRing(l_mcbist_target, l_ring_id, fapi2::RING_MODE_SET_PULSE_NSL),
-                     "Error from putRing");
+            default:
+                FAPI_ASSERT(false,
+                            fapi2::MSS_FREQ_VALUE_NOT_VALID()
+                            .set_MSS_FREQ(l_read_attr)
+                            .set_MCBIST_TARGET(l_trgt_chplt),
+                            "Invalid value of ATTR_MSS_FREQ");
         }
-    }
-    else
-    {
-        FAPI_DBG("Skipping PLL re-scan");
+
+        FAPI_TRY(fapi2::putRing(l_trgt_chplt, ringID, fapi2::RING_MODE_SET_PULSE_NSL));
     }
 
+    FAPI_INF("Exiting p9_mem_pll_initf ...");
+
 fapi_try_exit:
-    FAPI_INF("Exiting ...");
     return fapi2::current_err;
 }
+