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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-07-12 23:44:38 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-07-20 12:27:49 -0400 |
| commit | 8bab29a993e022dd7b9f0db80dce14c50e0d64e7 (patch) | |
| tree | 142a4172892877bec72985e24492197b1fa609de /src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C | |
| parent | 8e1184f31a5bd624b0db7b21c3b3cf686ed635e9 (diff) | |
| download | talos-hostboot-8bab29a993e022dd7b9f0db80dce14c50e0d64e7.tar.gz talos-hostboot-8bab29a993e022dd7b9f0db80dce14c50e0d64e7.zip | |
VBU IPL -- update sim PLL configuration
Adjust refclock/PLL configuration to drive all mesh clocks from PLLs
non-IO/wafer configuration (nest PLL bucket #1) -- default for sc/sq/fc
IO/system model configuration (nest PLL bucket #2) -- default for mc
Regression framework updates
Remove dependence on sim-only varosc/refclock HWPs
Scan from HW image (ultimately need to move to SEEPROM)
Add memory attribute HWPs missing from flow
Handle real/broadside scan options
HWP updates
Scan PLL configuration from image
Preserve clock mux attribute programming
First crack at removing unneeded PLL buckets from images/TOR
Add boot support for warm IPL
Change-Id: Ic7f27ab3dfdf258471d91618adc8eae4cadb2e42
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26938
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26939
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C index 17e748769..671aa7620 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_set_fsi_gp_shadow.C @@ -42,6 +42,7 @@ fapi2::ReturnCode p9_set_fsi_gp_shadow(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) { fapi2::buffer<uint8_t> l_read_attr; + fapi2::buffer<uint32_t> l_cfam_data; FAPI_INF("Entering ..."); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE, i_target_chip, @@ -77,13 +78,21 @@ fapi2::ReturnCode p9_set_fsi_gp_shadow(const //Setting ROOT_CTRL5_COPY register value //CFAM.ROOT_CTRL5_COPY = p9SetFsiGpShadow::ROOT_CTRL5_FLUSHVALUE + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL5_COPY_FSI, + l_cfam_data)); + l_cfam_data = (l_cfam_data & p9SetFsiGpShadow::ROOT_CTRL5_MASK) | + p9SetFsiGpShadow::ROOT_CTRL5_FLUSHVALUE; FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL5_COPY_FSI, - p9SetFsiGpShadow::ROOT_CTRL5_FLUSHVALUE)); + l_cfam_data)); //Setting ROOT_CTRL6_COPY register value //CFAM.ROOT_CTRL6_COPY = p9SetFsiGpShadow::ROOT_CTRL6_FLUSHVALUE + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL6_COPY_FSI, + l_cfam_data)); + l_cfam_data = (l_cfam_data & p9SetFsiGpShadow::ROOT_CTRL6_MASK) | + p9SetFsiGpShadow::ROOT_CTRL6_FLUSHVALUE; FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL6_COPY_FSI, - p9SetFsiGpShadow::ROOT_CTRL6_FLUSHVALUE)); + l_cfam_data)); //Setting ROOT_CTRL7_COPY register value //CFAM.ROOT_CTRL7_COPY = p9SetFsiGpShadow::ROOT_CTRL7_FLUSHVALUE @@ -92,8 +101,12 @@ fapi2::ReturnCode p9_set_fsi_gp_shadow(const //Setting ROOT_CTRL8_COPY register value //CFAM.ROOT_CTRL8_COPY = p9SetFsiGpShadow::ROOT_CTRL8_FLUSHVALUE + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL8_COPY_FSI, + l_cfam_data)); + l_cfam_data = (l_cfam_data & p9SetFsiGpShadow::ROOT_CTRL8_MASK) | + p9SetFsiGpShadow::ROOT_CTRL8_FLUSHVALUE; FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL8_COPY_FSI, - p9SetFsiGpShadow::ROOT_CTRL8_FLUSHVALUE)); + l_cfam_data)); //Setting PERV_CTRL0_COPY register value //CFAM.PERV_CTRL0_COPY = p9SetFsiGpShadow::PERV_CTRL0_FLUSHVALUE |
