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author | LiuYangFan <shliuyf@cn.ibm.com> | 2016-03-11 03:04:06 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-01 11:49:17 -0400 |
commit | 28d4903c629357bca036b0fecb3cf3fb8a6e16a9 (patch) | |
tree | 6080589e2ac17680975363f9083cff5bf2dfd279 /src/import/chips/p9/procedures/hwp/perv/p9_ram_putspr.H | |
parent | d26d782b532cce24b36376ad7d4859be7d3cf526 (diff) | |
download | talos-hostboot-28d4903c629357bca036b0fecb3cf3fb8a6e16a9.tar.gz talos-hostboot-28d4903c629357bca036b0fecb3cf3fb8a6e16a9.zip |
L2 RAM procedures.
Changes included:
1. p9_ram_core: the class for base ramming operations (would reside in SBE)
2. p9_spr_name_map: the functions to map SPR name to SPR number (for Cronus use)
3. p9_ram_opcode: the procedure to implement ram an opcode
4. p9_ram_getspr: the procedure to implement get SPR value
5. p9_ram_putspr: the procedure to implement put SPR value
6. p9_ram_getreg: the procedure to implement get GPR/FPR/VSR value
7. p9_ram_putreg: the procedure to implement put GPR/FPR/VSR value
8. p9_ram_wrap: the eCMD wrapper to test the procedures
Change-Id: I34192e0527a61a48b9c1e69036a3411a1e3d9f6d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21933
Tested-by: Jenkins Server
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27571
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv/p9_ram_putspr.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_ram_putspr.H | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_putspr.H b/src/import/chips/p9/procedures/hwp/perv/p9_ram_putspr.H new file mode 100644 index 000000000..c653c6534 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_putspr.H @@ -0,0 +1,69 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: chips/p9/procedures/hwp/perv/p9_ram_putspr.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* EKB Project */ +/* */ +/* COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//----------------------------------------------------------------------------------- +/// +/// @file p9_ram_putspr.H +/// @brief Utility to implement Put SPR Register by ramming +/// +//----------------------------------------------------------------------------------- +// *HWP HWP Owner : Liu Yang Fan <shliuyf@cn.ibm.com> +// *HWP HWP Backup Owner : Gou Peng Fei <shgoupf@cn.ibm.com> +// *HWP FW Owner : Thi Tran <thi@us.ibm.com> +// *HWP Team : Perv +// *HWP Level : 2 +// *HWP Consumed by : None (Cronus test only) +//----------------------------------------------------------------------------------- + +#ifndef _P9_RAM_PUTSPR_H_ +#define _P9_RAM_PUTSPR_H_ + +//----------------------------------------------------------------------------------- +// Includes +//----------------------------------------------------------------------------------- +#include <fapi2.H> +#include <p9_ram_core.H> +#include <p9_spr_name_map.H> + +//function pointer typedef definition for HWP call support +typedef fapi2::ReturnCode (*p9_ram_putspr_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target, + const uint8_t i_thread, + const std::string i_name, + const fapi2::buffer<uint64_t>* i_buffer); + + +extern "C" { +//----------------------------------------------------------------------------------- +// Function prototype +//----------------------------------------------------------------------------------- +/// @brief Implement Put SPR Register by ramming +/// @param[in] i_target => core target +/// @param[in] i_thread => thread number +/// @param[in] i_name => register name +/// @param[in] i_buffer => register value +/// @return FAPI_RC_SUCCESS if the setup completes successfully +// + fapi2::ReturnCode p9_ram_putspr(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target, + const uint8_t i_thread, + const std::string i_name, + const fapi2::buffer<uint64_t>* i_buffer); +} //extern"C" + +#endif //_P9_RAM_PUTSPR_H_ + + |