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authorAndre Marin <aamarin@us.ibm.com>2017-02-21 00:43:35 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-03-01 09:12:37 -0500
commit77b203d67647636e2f67135d84db184432eedf7e (patch)
tree93ec48198d0deecf91dd2629c65e69f0ab33b264 /src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
parent7c5519c9412ffff7178f9ac0b93dd215a6c6b839 (diff)
downloadtalos-hostboot-77b203d67647636e2f67135d84db184432eedf7e.tar.gz
talos-hostboot-77b203d67647636e2f67135d84db184432eedf7e.zip
Simplify spd factory mapping to share among controllers
Also happened to address RTC 163150 and RTC:152390 with this refactoring. Change-Id: Iaba29d96f577c74bda7c3b147c16749eb1d861e5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36766 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36769 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C55
1 files changed, 21 insertions, 34 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
index 0af0b59fe..a8d330355 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
@@ -38,7 +38,6 @@
// std lib
#include <vector>
-#include <map>
// fapi2
#include <fapi2.H>
@@ -74,43 +73,31 @@ extern "C"
FAPI_INF("Populating decoder cache for %s", mss::c_str(l_mcs));
//Factory cache is per MCS
- std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches;
+ std::vector< std::shared_ptr<mss::spd::decoder> > l_factory_caches;
FAPI_TRY( mss::spd::populate_decoder_caches(l_mcs, l_factory_caches),
- "Failed to populate decoder cache");
+ "Failed to populate decoder cache for %s", l_mcs);
// Get dimms for each MCS
- for ( const auto& l_dimm : mss::find_targets<TARGET_TYPE_DIMM> (l_mcs))
+ for ( const auto& l_cache : l_factory_caches )
{
- const auto l_dimm_pos = mss::pos(l_dimm);
-
- // Find decoder factory for this dimm position
- auto l_it = l_factory_caches.find(l_dimm_pos);
- // Check to make sure it's valid
- // TODO - RTC 152390 change factory check
- FAPI_TRY( mss::check::spd::invalid_cache(l_dimm,
- l_it != l_factory_caches.end(),
- l_dimm_pos),
- "Failed to get valid cache");
- {
- uint8_t l_dimm_nominal = 0;
- uint8_t l_dimm_endurant = 0;
-
- // Read nominal and endurant bits from SPD, 0 = 1.2V is not operable and endurant, 1 = 1.2 is valid
- FAPI_TRY( l_it->second->operable_nominal_voltage(l_dimm_nominal) );
- FAPI_TRY( l_it->second->endurant_nominal_voltage(l_dimm_endurant) );
-
- //Check to make sure 1.2 V is both operable and endurant, fail if it is not
- FAPI_ASSERT ( (l_dimm_nominal == mss::spd::OPERABLE) && (l_dimm_endurant == mss::spd::ENDURANT),
- fapi2::MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE().
- set_OPERABLE(l_dimm_nominal).
- set_ENDURANT(l_dimm_endurant).
- set_DIMM_TARGET(l_dimm),
- "%s: DIMM is not operable (%d)"
- " and/or endurant (%d) at 1.2V",
- mss::c_str(l_dimm),
- l_dimm_nominal,
- l_dimm_endurant);
- } // scope
+ uint8_t l_dimm_nominal = 0;
+ uint8_t l_dimm_endurant = 0;
+
+ // Read nominal and endurant bits from SPD, 0 = 1.2V is not operable and endurant, 1 = 1.2 is valid
+ FAPI_TRY( l_cache->operable_nominal_voltage(l_dimm_nominal) );
+ FAPI_TRY( l_cache->endurant_nominal_voltage(l_dimm_endurant) );
+
+ //Check to make sure 1.2 V is both operable and endurant, fail if it is not
+ FAPI_ASSERT ( (l_dimm_nominal == mss::spd::OPERABLE) && (l_dimm_endurant == mss::spd::ENDURANT),
+ fapi2::MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE().
+ set_OPERABLE(l_dimm_nominal).
+ set_ENDURANT(l_dimm_endurant).
+ set_DIMM_TARGET(l_cache->iv_target),
+ "%s: DIMM is not operable (%d)"
+ " and/or endurant (%d) at 1.2V",
+ mss::c_str(l_cache->iv_target),
+ l_dimm_nominal,
+ l_dimm_endurant);
} // l_dimm
// Set the attributes for this MCS, values are in mss_const.H
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