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author | Andre Marin <aamarin@us.ibm.com> | 2017-02-21 00:43:35 -0600 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-01 09:12:37 -0500 |
commit | 77b203d67647636e2f67135d84db184432eedf7e (patch) | |
tree | 93ec48198d0deecf91dd2629c65e69f0ab33b264 /src/import | |
parent | 7c5519c9412ffff7178f9ac0b93dd215a6c6b839 (diff) | |
download | talos-hostboot-77b203d67647636e2f67135d84db184432eedf7e.tar.gz talos-hostboot-77b203d67647636e2f67135d84db184432eedf7e.zip |
Simplify spd factory mapping to share among controllers
Also happened to address RTC 163150 and RTC:152390
with this refactoring.
Change-Id: Iaba29d96f577c74bda7c3b147c16749eb1d861e5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36766
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36769
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
10 files changed, 152 insertions, 250 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index 22bf999d2..39bf1178a 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -205,13 +205,11 @@ static uint64_t ibt_helper(const uint8_t i_ibt) /// /// @brief factory to make an eff_config DIMM object based on dimm kind (type, gen, and revision number) -/// @param[in] i_target dimm target /// @param[in] i_pDecoder the spd::decoder for the dimm target /// @param[out] o_fact_obj a shared pointer of the eff_dimm type /// -fapi2::ReturnCode eff_dimm::eff_dimm_factory (const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::shared_ptr<spd::decoder>& i_pDecoder, - std::shared_ptr<eff_dimm>& o_fact_obj) +fapi2::ReturnCode eff_dimm::eff_dimm_factory ( const std::shared_ptr<spd::decoder>& i_pDecoder, + std::shared_ptr<eff_dimm>& o_fact_obj ) { uint8_t l_type = 0; uint8_t l_gen = 0; @@ -219,13 +217,15 @@ fapi2::ReturnCode eff_dimm::eff_dimm_factory (const fapi2::Target<fapi2::TARGET_ kind_t l_dimm_kind = DEFAULT_KIND; fapi2::ReturnCode l_rc; + const auto& l_dimm = i_pDecoder->iv_target; // Now time to get the three attributes to tell which dimm we're working with. // Dram_gen and dimm_type are set in the SPD factory and we'll call the SPD decoder to get the reg and buff type - FAPI_TRY( eff_dram_gen(i_target, l_gen), "Failed accessing the ATTR_MSS_EFF_DRAM_GEN" ); - FAPI_TRY( eff_dimm_type(i_target, l_type), "Failed accessing the ATTR_MSS_EFF_DIMM_TYPE" ); + FAPI_TRY( eff_dram_gen(l_dimm, l_gen), "Failed eff_dram_gen() accessor for %s", l_dimm ); + FAPI_TRY( eff_dimm_type(l_dimm, l_type), "Failed eff_dimm_type() accessor for %s", + l_dimm ); FAPI_TRY( i_pDecoder->iv_module_decoder->register_and_buffer_type(l_buffer_type), - "Failed decoding register and buffer type" ); + "Failed decoding register and buffer type from SPD for %s", l_dimm ); l_dimm_kind = mss::dimm_kind(l_type, l_gen); @@ -235,7 +235,7 @@ fapi2::ReturnCode eff_dimm::eff_dimm_factory (const fapi2::Target<fapi2::TARGET_ switch (l_buffer_type) { case LRDIMM_DB01: - o_fact_obj = std::make_shared<eff_lrdimm_db01> (i_target, i_pDecoder, l_rc ); + o_fact_obj = std::make_shared<eff_lrdimm_db01>( i_pDecoder, l_rc ); // Assert that l_rc is good and o_fact_object isn't null FAPI_ASSERT( ((l_rc == fapi2::FAPI2_RC_SUCCESS) && (o_fact_obj != nullptr)), @@ -243,14 +243,14 @@ fapi2::ReturnCode eff_dimm::eff_dimm_factory (const fapi2::Target<fapi2::TARGET_ set_DIMM_TYPE(l_type). set_DRAM_GEN(l_gen). set_REG_AND_BUFF_TYPE(l_buffer_type). - set_DIMM_TARGET(i_target), + set_DIMM_TARGET(l_dimm), "Failure creating an eff_dimm object for an LRDIMM DB01 for target %s buff_type %d", - mss::c_str(i_target), + mss::c_str(l_dimm), l_buffer_type); break; case LRDIMM_DB02: - o_fact_obj = std::make_shared<eff_lrdimm_db02> (i_target, i_pDecoder, l_rc); + o_fact_obj = std::make_shared<eff_lrdimm_db02>( i_pDecoder, l_rc ); // Assert that l_rc is good and o_fact_object isn't null FAPI_ASSERT( ((l_rc == fapi2::FAPI2_RC_SUCCESS) && (o_fact_obj != nullptr)), @@ -258,9 +258,9 @@ fapi2::ReturnCode eff_dimm::eff_dimm_factory (const fapi2::Target<fapi2::TARGET_ set_DIMM_TYPE(l_type). set_DRAM_GEN(l_gen). set_REG_AND_BUFF_TYPE(l_buffer_type). - set_DIMM_TARGET(i_target), + set_DIMM_TARGET(l_dimm), "Failure creating an eff_dimm object for an LRDIMM DB02 for target %s buff_type %d", - mss::c_str(i_target), + mss::c_str(l_dimm), l_buffer_type); break; @@ -268,42 +268,42 @@ fapi2::ReturnCode eff_dimm::eff_dimm_factory (const fapi2::Target<fapi2::TARGET_ FAPI_ASSERT(false, fapi2::MSS_INVALID_LRDIMM_DB(). set_DATA_BUFFER_GEN(l_buffer_type). - set_DIMM_TARGET(i_target), + set_DIMM_TARGET(l_dimm), "Error when creating a LRDIMM dimm object due to invalid databuffer type (%d) for target %s", l_buffer_type, - mss::c_str(i_target)); + mss::c_str(l_dimm)); return fapi2::FAPI2_RC_INVALID_PARAMETER; } break; case KIND_RDIMM_DDR4: - o_fact_obj = std::make_shared<eff_rdimm> (i_target, i_pDecoder, l_rc); + o_fact_obj = std::make_shared<eff_rdimm>( i_pDecoder, l_rc ); // Assert that l_rc is good and o_fact_object isn't null FAPI_ASSERT( ((l_rc == fapi2::FAPI2_RC_SUCCESS) && (o_fact_obj != nullptr)), fapi2::MSS_ERROR_CREATING_EFF_CONFIG_DIMM_OBJECT(). set_DIMM_TYPE(l_type). set_DRAM_GEN(l_gen). set_REG_AND_BUFF_TYPE(l_buffer_type). - set_DIMM_TARGET(i_target), + set_DIMM_TARGET(l_dimm), "Failure creating an eff_dimm object for an RDIMM for target %s register type %d", - mss::c_str(i_target), + mss::c_str(l_dimm), l_buffer_type); break; default: - FAPI_ERR("Wrong kind of DIMM plugged in (not DDR4 LRDIMM or RDIMM for target %s", mss::c_str(i_target)); + FAPI_ERR("Wrong kind of DIMM plugged in (not DDR4 LRDIMM or RDIMM for target %s", mss::c_str(l_dimm)); FAPI_ASSERT(false, fapi2::MSS_UNSUPPORTED_DIMM_KIND(). set_DIMM_KIND(l_dimm_kind). set_DIMM_TYPE(l_type). set_DRAM_GEN(l_gen). - set_DIMM_TARGET(i_target), + set_DIMM_TARGET(l_dimm), "Invalid dimm target when passed into eff_config: kind %d, type %d, gen %d for target %s", l_dimm_kind, l_type, l_gen, - mss::c_str(i_target)); + mss::c_str(l_dimm)); } fapi_try_exit: @@ -672,16 +672,10 @@ fapi2::ReturnCode eff_dimm::dram_trfc() // Calculate trfc (in ps) { constexpr int64_t l_trfc_ftb = 0; - int64_t l_ftb = 0; - int64_t l_mtb = 0; - - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb) ); - FAPI_INF( "medium timebase (ps): %ld, fine timebase (ps): %ld, tRFC (MTB): %ld, tRFC(FTB): %ld", - l_mtb, l_ftb, l_trfc_mtb, l_trfc_ftb ); + iv_mtb, iv_ftb, l_trfc_mtb, l_trfc_ftb ); - l_trfc_in_ps = spd::calc_timing_from_timebase(l_trfc_mtb, l_mtb, l_trfc_ftb, l_ftb); + l_trfc_in_ps = spd::calc_timing_from_timebase(l_trfc_mtb, iv_mtb, l_trfc_ftb, iv_ftb); } { @@ -863,26 +857,19 @@ fapi2::ReturnCode eff_dimm::dram_tccd_l() // It is safe to read this from SPD because the correct nck // value will be calulated based on our dimm speed. - // TODO: RTC 163150 Clean up eff_config timing boilerplate { - int64_t l_ftb = 0; - int64_t l_mtb = 0; int64_t l_tccd_mtb = 0; int64_t l_tccd_ftb = 0; - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb), - "Failed medium_timebase() for %s", mss::c_str(iv_dimm) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb), - "Failed fine_timebase() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->min_tccd_l(l_tccd_mtb), "Failed min_tccd_l() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->fine_offset_min_tccd_l(l_tccd_ftb), "Failed fine_offset_min_tccd_l() for %s", mss::c_str(iv_dimm) ); FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tCCD_L (MTB): %ld, tCCD_L(FTB): %ld", - l_mtb, l_ftb, l_tccd_mtb, l_tccd_ftb ); + iv_mtb, iv_ftb, l_tccd_mtb, l_tccd_ftb ); - l_tccd_in_ps = spd::calc_timing_from_timebase(l_tccd_mtb, l_mtb, l_tccd_ftb, l_ftb); + l_tccd_in_ps = spd::calc_timing_from_timebase(l_tccd_mtb, iv_mtb, l_tccd_ftb, iv_ftb); } { @@ -1729,21 +1716,15 @@ fapi2::ReturnCode eff_dimm::dram_twr() { constexpr int64_t l_twr_ftb = 0; int64_t l_twr_mtb = 0; - int64_t l_ftb = 0; - int64_t l_mtb = 0; - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb), - "Failed medium_timebase() for %s", mss::c_str(iv_dimm) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb), - "Failed fine_timebase() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->min_write_recovery_time(l_twr_mtb), "Failed min_write_recovery_time() for %s", mss::c_str(iv_dimm) ); FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tWR (MTB): %ld, tWR(FTB): %ld", - l_mtb, l_ftb, l_twr_mtb, l_twr_ftb); + iv_mtb, iv_ftb, l_twr_mtb, l_twr_ftb); // Calculate twr (in ps) - l_twr_in_ps = spd::calc_timing_from_timebase(l_twr_mtb, l_mtb, l_twr_ftb, l_ftb); + l_twr_in_ps = spd::calc_timing_from_timebase(l_twr_mtb, iv_mtb, l_twr_ftb, iv_ftb); } { @@ -2759,22 +2740,16 @@ fapi2::ReturnCode eff_dimm::dram_trp() { int64_t l_trp_mtb = 0; int64_t l_trp_ftb = 0; - int64_t l_ftb = 0; - int64_t l_mtb = 0; - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb), - "Failed medium_timebase() for %s", mss::c_str(iv_dimm) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb), - "Failed fine_timebase() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->min_row_precharge_delay_time(l_trp_mtb), "Failed min_row_precharge_delay_time() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->fine_offset_min_trp(l_trp_ftb), "Failed fine_offset_min_trp() for %s", mss::c_str(iv_dimm) ); FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tRP (MTB): %ld, tRP(FTB): %ld", - l_mtb, l_ftb, l_trp_mtb, l_trp_ftb); + iv_mtb, iv_ftb, l_trp_mtb, l_trp_ftb); - l_trp_in_ps = spd::calc_timing_from_timebase(l_trp_mtb, l_mtb, l_trp_ftb, l_ftb); + l_trp_in_ps = spd::calc_timing_from_timebase(l_trp_mtb, iv_mtb, l_trp_ftb, iv_ftb); } // SPD spec gives us the minimum... compute our worstcase (maximum) from JEDEC @@ -2826,22 +2801,16 @@ fapi2::ReturnCode eff_dimm::dram_trcd() { int64_t l_trcd_mtb = 0; int64_t l_trcd_ftb = 0; - int64_t l_ftb = 0; - int64_t l_mtb = 0; - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb), - "Failed medium_timebase() for %s", mss::c_str(iv_dimm) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb), - "Failed fine_timebase() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->min_ras_to_cas_delay_time(l_trcd_mtb), "Failed min_ras_to_cas_delay_time() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->fine_offset_min_trcd(l_trcd_ftb), "Failed fine_offset_min_trcd() for %s", mss::c_str(iv_dimm) ); FAPI_INF("medium timebase MTB (ps): %ld, fine timebase FTB (ps): %ld, tRCD (MTB): %ld, tRCD (FTB): %ld", - l_mtb, l_ftb, l_trcd_mtb, l_trcd_ftb); + iv_mtb, iv_ftb, l_trcd_mtb, l_trcd_ftb); - l_trcd_in_ps = spd::calc_timing_from_timebase(l_trcd_mtb, l_mtb, l_trcd_ftb, l_ftb); + l_trcd_in_ps = spd::calc_timing_from_timebase(l_trcd_mtb, iv_mtb, l_trcd_ftb, iv_ftb); } { @@ -2881,22 +2850,16 @@ fapi2::ReturnCode eff_dimm::dram_trc() { int64_t l_trc_mtb = 0; int64_t l_trc_ftb = 0; - int64_t l_ftb = 0; - int64_t l_mtb = 0; - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb), - "Failed medium_timebase() for %s", mss::c_str(iv_dimm) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb), - "Failed fine_timebase() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->min_active_to_active_refresh_delay_time(l_trc_mtb), "Failed min_active_to_active_refresh_delay_time() for %s", mss::c_str(iv_dimm) ); FAPI_TRY( iv_pDecoder->fine_offset_min_trc(l_trc_ftb), "Failed fine_offset_min_trc() for %s", mss::c_str(iv_dimm) ); FAPI_INF("medium timebase MTB (ps): %ld, fine timebase FTB (ps): %ld, tRCmin (MTB): %ld, tRCmin(FTB): %ld", - l_mtb, l_ftb, l_trc_mtb, l_trc_ftb); + iv_mtb, iv_ftb, l_trc_mtb, l_trc_ftb); - l_trc_in_ps = spd::calc_timing_from_timebase(l_trc_mtb, l_mtb, l_trc_ftb, l_ftb); + l_trc_in_ps = spd::calc_timing_from_timebase(l_trc_mtb, iv_mtb, l_trc_ftb, iv_ftb); } { @@ -2937,17 +2900,13 @@ fapi2::ReturnCode eff_dimm::dram_twtr_l() { constexpr int64_t l_twtr_l_ftb = 0; int64_t l_twtr_l_mtb = 0; - int64_t l_ftb = 0; - int64_t l_mtb = 0; - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb) ); FAPI_TRY( iv_pDecoder->min_twtr_l(l_twtr_l_mtb) ); FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tWTR_S (MTB): %ld, tWTR_S (FTB): %ld", - l_mtb, l_ftb, l_twtr_l_mtb, l_twtr_l_ftb ); + iv_mtb, iv_ftb, l_twtr_l_mtb, l_twtr_l_ftb ); - l_twtr_l_in_ps = spd::calc_timing_from_timebase(l_twtr_l_mtb, l_mtb, l_twtr_l_ftb, l_ftb); + l_twtr_l_in_ps = spd::calc_timing_from_timebase(l_twtr_l_mtb, iv_mtb, l_twtr_l_ftb, iv_ftb); } @@ -2988,17 +2947,13 @@ fapi2::ReturnCode eff_dimm::dram_twtr_s() { constexpr int64_t l_twtr_s_ftb = 0; int64_t l_twtr_s_mtb = 0; - int64_t l_ftb = 0; - int64_t l_mtb = 0; - FAPI_TRY( iv_pDecoder->medium_timebase(l_mtb) ); - FAPI_TRY( iv_pDecoder->fine_timebase(l_ftb) ); FAPI_TRY( iv_pDecoder->min_twtr_s(l_twtr_s_mtb) ); FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tWTR_S (MTB): %ld, tWTR_S (FTB): %ld", - l_mtb, l_ftb, l_twtr_s_mtb, l_twtr_s_ftb ); + iv_mtb, iv_ftb, l_twtr_s_mtb, l_twtr_s_ftb ); - l_twtr_s_in_ps = spd::calc_timing_from_timebase(l_twtr_s_mtb, l_mtb, l_twtr_s_ftb, l_ftb); + l_twtr_s_in_ps = spd::calc_timing_from_timebase(l_twtr_s_mtb, iv_mtb, l_twtr_s_ftb, iv_ftb); } { @@ -3094,8 +3049,8 @@ fapi2::ReturnCode eff_dimm::dram_trrd_l() // From the SPD Spec: // At some frequencies, a minimum number of clocks may be required resulting - // in a larger tRRD_Smin value than indicated in the SPD. - // tRRD_S (3DS) is speed bin independent. + // in a larger tRRD_Lmin value than indicated in the SPD. + // tRRD_L (3DS) is speed bin independent. // So we won't read this from SPD and choose the correct value based on mss_freq if( l_stack_type == fapi2::ENUM_ATTR_EFF_PRIM_STACK_TYPE_3DS) diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H index 7f2646ac8..0b2abed57 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H @@ -47,11 +47,13 @@ namespace mss class eff_dimm { protected: - const fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_dimm; + fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_dimm; fapi2::Target<fapi2::TARGET_TYPE_MCA> iv_mca; fapi2::Target<fapi2::TARGET_TYPE_MCS> iv_mcs; - uint64_t iv_port_index; - uint64_t iv_dimm_index; + size_t iv_port_index; + size_t iv_dimm_index; + int64_t iv_ftb; // fine timebase + int64_t iv_mtb; // medium timebase public: uint64_t iv_freq; @@ -70,32 +72,33 @@ class eff_dimm /// /// @brief constructor for the base eff_dimm class - /// @param[in] i_target the dimm target /// @param[in] i_pDecoder the SPD decoder /// @param[out] o_rc fapi2::ReturnCode /// @note also sets class variables for parent MCA/ MCS and for freqs /// - eff_dimm (const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::shared_ptr<spd::decoder>& i_pDecoder, - fapi2::ReturnCode& o_rc) : - iv_dimm (i_target), + eff_dimm( const std::shared_ptr<spd::decoder>& i_pDecoder, + fapi2::ReturnCode& o_rc ): iv_pDecoder(i_pDecoder) { - FAPI_DBG("Constructing EFF_DIMM Object"); + FAPI_DBG("Constructing eff_dimm object"); + iv_dimm = iv_pDecoder->iv_target; iv_mca = find_target<fapi2::TARGET_TYPE_MCA>(iv_dimm); iv_mcs = find_target<fapi2::TARGET_TYPE_MCS>(iv_dimm); iv_port_index = mss::index(iv_mca); iv_dimm_index = mss::index(iv_dimm); - FAPI_TRY( clock_period(i_target, iv_tCK_in_ps), "Failed to calculate clock period (tCK)" ); + FAPI_TRY( iv_pDecoder->medium_timebase(iv_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(iv_ftb) ); + + FAPI_TRY( clock_period(iv_dimm, iv_tCK_in_ps), "Failed to calculate clock period (tCK)" ); FAPI_TRY( mss::mrw_temp_refresh_range(iv_temp_refresh_range), "Failed mrw_temp_refresh_range()" ); FAPI_TRY( mss::mrw_fine_refresh_mode(iv_refresh_mode), "Failed mrw_fine_refresh_mode()" ); - FAPI_TRY( mss::freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), iv_freq)); + FAPI_TRY( mss::freq(find_target<fapi2::TARGET_TYPE_MCBIST>(iv_dimm), iv_freq)); - FAPI_INF("Calculated clock period - tCK (ps): %d for %s", iv_tCK_in_ps, mss::c_str(i_target)); - FAPI_INF("Calculated frequency (ps): %d for %s", iv_freq, mss::c_str(i_target)); + FAPI_INF("Calculated clock period - tCK (ps): %d for %s", iv_tCK_in_ps, mss::c_str(iv_dimm)); + FAPI_INF("Calculated frequency (ps): %d for %s", iv_freq, mss::c_str(iv_dimm)); fapi_try_exit: o_rc = fapi2::current_err; @@ -111,12 +114,10 @@ class eff_dimm /// /// @brief factory to make an eff_config DIMM object based on dimm kind (type, gen, and revision number) - /// @param[in] i_target the dimm target /// @param[in] i_pDecoder the SPD decoder /// @param[out] o_fact_obj a shared pointer of the eff_dimm type /// - static fapi2::ReturnCode eff_dimm_factory (const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::shared_ptr<spd::decoder>& i_pDecoder, + static fapi2::ReturnCode eff_dimm_factory ( const std::shared_ptr<spd::decoder>& i_pDecoder, std::shared_ptr<eff_dimm>& o_fact_obj); /// @@ -824,16 +825,14 @@ class eff_lrdimm : public eff_dimm public: /// /// @brief constructor for the eff_lrdimm class - /// @param[in] i_target the dimm target /// @param[in] i_pDecoder the SPD decoder /// @param[out] o_rc fapi2::ReturnCode /// @note also sets class variables for parent MCA/ MCS and for freqs /// @note calls eff_dimm ctor /// - eff_lrdimm (const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::shared_ptr<spd::decoder>& i_pDecoder, - fapi2::ReturnCode& o_rc): - eff_dimm (i_target, i_pDecoder, o_rc) + eff_lrdimm( const std::shared_ptr<spd::decoder>& i_pDecoder, + fapi2::ReturnCode& o_rc ): + eff_dimm ( i_pDecoder, o_rc ) { FAPI_DBG("Constructing LRDIMM"); } @@ -964,23 +963,22 @@ class eff_lrdimm_db01 : public eff_lrdimm protected: public: //Delete default - eff_lrdimm_db01 () = delete; + eff_lrdimm_db01() = delete; /// /// @brief constructor for the eff_lrdimm_db01 (LRDIMM DataBuffer 1) class - /// @param[in] i_target the dimm target /// @param[in] i_pDecoder the SPD decoder /// @param[out] o_rc fapi2::ReturnCode /// @note also sets class variables for parent MCA/ MCS and for freqs /// @note calls eff_dimm ctor /// - eff_lrdimm_db01 (const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::shared_ptr<spd::decoder>& i_pDecoder, - fapi2::ReturnCode& o_rc) : - eff_lrdimm(i_target, i_pDecoder, o_rc) + eff_lrdimm_db01( const std::shared_ptr<spd::decoder>& i_pDecoder, + fapi2::ReturnCode& o_rc ) : + eff_lrdimm( i_pDecoder, o_rc ) { FAPI_DBG("Constructing LRDIMM_DB01"); } + /// /// @brief default destructor /// @@ -1025,16 +1023,14 @@ class eff_lrdimm_db02 : public eff_lrdimm /// /// @brief constructor for the eff_lrdimm_db02 (LRDIMM DataBuffer 2) class - /// @param[in] i_target the dimm target /// @param[in] i_pDecoder the SPD decoder /// @param[out] o_rc fapi2::ReturnCode /// @note also sets class variables for parent MCA/ MCS and for freqs /// @note calls eff_dimm ctor /// - eff_lrdimm_db02 (const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::shared_ptr<spd::decoder>& i_pDecoder, - fapi2::ReturnCode& o_rc) : - eff_lrdimm(i_target, i_pDecoder, o_rc) + eff_lrdimm_db02( const std::shared_ptr<spd::decoder>& i_pDecoder, + fapi2::ReturnCode& o_rc ) : + eff_lrdimm( i_pDecoder, o_rc ) { FAPI_DBG("Constructing LRDIMM_DB02"); } @@ -1080,16 +1076,14 @@ class eff_rdimm : public eff_dimm /// /// @brief constructor for the eff_rdimm_db01 (LRDIMM DataBuffer 1) class - /// @param[in] i_target the dimm target /// @param[in] i_pDecoder the SPD decoder /// @param[out] o_rc fapi2::ReturnCode /// @note also sets class variables for parent MCA/ MCS and for freqs /// @note calls eff_dimm ctor /// - eff_rdimm (const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::shared_ptr<spd::decoder>& i_pDecoder, - fapi2::ReturnCode& o_rc) : - eff_dimm(i_target, i_pDecoder, o_rc) + eff_rdimm( const std::shared_ptr<spd::decoder>& i_pDecoder, + fapi2::ReturnCode& o_rc ) : + eff_dimm( i_pDecoder, o_rc ) { FAPI_DBG("Constructing RDIMM"); } diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C index edbf87451..1e288a860 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C @@ -65,59 +65,46 @@ namespace mss /// @brief Class constructor that retrieves required SPD data held by internal state /// @param[in] i_target the controller target /// @param[in] i_caches decoder caches +/// @param[out] o_rc returns FAPI2_RC_SUCCESS if constructor initialzed successfully /// cas_latency::cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, - const std::map<uint32_t, std::shared_ptr<spd::decoder> >& i_caches, - fapi2::ReturnCode& o_rc): + const std::vector< std::shared_ptr<spd::decoder> >& i_caches, + fapi2::ReturnCode& o_rc ): iv_dimm_list_empty(false), iv_target(i_target), iv_largest_taamin(0), iv_proposed_tck(0), iv_common_cl(UINT64_MAX) // Masks out supported CLs { - const auto l_dimm_list = find_targets<TARGET_TYPE_DIMM>(iv_target); - if(l_dimm_list.empty()) + if( i_caches.empty() ) { - FAPI_INF("cas latency ctor seeing no DIMM on %s", mss::c_str(iv_target)); + FAPI_INF("cas latency ctor seeing no SPD caches for %s", mss::c_str(i_target) ); iv_dimm_list_empty = true; return; } - for ( const auto& l_dimm : l_dimm_list ) + for ( const auto& l_cache : i_caches ) { - const auto l_dimm_pos = pos(l_dimm); - - // Find decoder factory for this dimm position - // Can't be const auto because HB needs to implement - // something - AAM - auto l_it = i_caches.find(l_dimm_pos); - FAPI_TRY( check::spd::invalid_cache(l_dimm, - l_it != i_caches.end(), - l_dimm_pos), - "%s. Failed to get valid cache", mss::c_str(iv_target) ); - - { - // Retrive timing values from the SPD - uint64_t l_taa_min_in_ps = 0; - uint64_t l_tckmax_in_ps = 0; - uint64_t l_tck_min_in_ps = 0; - - FAPI_TRY( get_taamin(l_it->second, l_taa_min_in_ps), - "%s. Failed to get tAAmin", mss::c_str(iv_target) ); - FAPI_TRY( get_tckmax(l_it->second, l_tckmax_in_ps), - "%s. Failed to get tCKmax", mss::c_str(iv_target) ); - FAPI_TRY( get_tckmin(l_it->second, l_tck_min_in_ps), - "%s. Failed to get tCKmin", mss::c_str(iv_target) ); - - // Determine largest tAAmin value - iv_largest_taamin = std::max(iv_largest_taamin, l_taa_min_in_ps); - - // Determine a proposed tCK value that is greater than or equal tCKmin - // But less than tCKmax - iv_proposed_tck = std::max(iv_proposed_tck, l_tck_min_in_ps); - iv_proposed_tck = std::min(iv_proposed_tck, l_tckmax_in_ps); - } + // Retrive timing values from the SPD + uint64_t l_taa_min_in_ps = 0; + uint64_t l_tckmax_in_ps = 0; + uint64_t l_tck_min_in_ps = 0; + + FAPI_TRY( get_taamin(l_cache, l_taa_min_in_ps), + "%s. Failed to get tAAmin", mss::c_str(iv_target) ); + FAPI_TRY( get_tckmax(l_cache, l_tckmax_in_ps), + "%s. Failed to get tCKmax", mss::c_str(iv_target) ); + FAPI_TRY( get_tckmin(l_cache, l_tck_min_in_ps), + "%s. Failed to get tCKmin", mss::c_str(iv_target) ); + + // Determine largest tAAmin value + iv_largest_taamin = std::max(iv_largest_taamin, l_taa_min_in_ps); + + // Determine a proposed tCK value that is greater than or equal tCKmin + // But less than tCKmax + iv_proposed_tck = std::max(iv_proposed_tck, l_tck_min_in_ps); + iv_proposed_tck = std::min(iv_proposed_tck, l_tckmax_in_ps); // Collecting stack type // If I have at least one 3DS DIMM connected I have @@ -125,7 +112,7 @@ cas_latency::cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, if( iv_is_3ds != loading::IS_3DS) { uint8_t l_stack_type = 0; - FAPI_TRY( l_it->second->prim_sdram_signal_loading(l_stack_type) ); + FAPI_TRY( l_cache->prim_sdram_signal_loading(l_stack_type) ); // Is there a more algorithmic efficient approach? - AAM iv_is_3ds = (l_stack_type == fapi2::ENUM_ATTR_EFF_PRIM_STACK_TYPE_3DS) ? @@ -135,13 +122,13 @@ cas_latency::cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, { // Retrieve dimm supported cas latencies from SPD uint64_t l_dimm_supported_cl = 0; - FAPI_TRY( l_it->second->supported_cas_latencies(l_dimm_supported_cl), + FAPI_TRY( l_cache->supported_cas_latencies(l_dimm_supported_cl), "%s. Failed to get supported CAS latency", mss::c_str(iv_target) ); // Bitwise ANDING the bitmap from all modules creates a bitmap w/a common CL iv_common_cl &= l_dimm_supported_cl; } - }// dimm + }// caches // Limit tCK from the max supported dimm speed in the system // So that this is taken into account when calculating CL diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H index 4e57a7e1c..aa35274b7 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.H @@ -85,7 +85,7 @@ class cas_latency /// @param[out] o_rc returns FAPI2_RC_SUCCESS if constructor initialzed successfully /// cas_latency(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target_mcs, - const std::map<uint32_t, std::shared_ptr<spd::decoder> >& i_caches, + const std::vector< std::shared_ptr<spd::decoder> >& i_caches, fapi2::ReturnCode& o_rc); /// @brief Constructor that allows the user to set desired data in lieu of SPD diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H index 2cd744ae8..783df06e9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H @@ -176,7 +176,6 @@ inline uint8_t extract_spd_field(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i class decoder { protected: - const fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_target; enum { @@ -480,6 +479,7 @@ class decoder virtual fapi2::ReturnCode prim_sdram_logical_ranks( uint8_t& o_logical_ranks ); public: + const fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_target; std::shared_ptr<dimm_module_decoder> iv_module_decoder; std::vector<uint8_t> iv_spd_data; rcw_settings iv_raw_card; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C index b6d605133..2437c4305 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C @@ -645,37 +645,26 @@ fapi2::ReturnCode raw_card_factory(const fapi2::Target<TARGET_TYPE_DIMM>& i_targ switch(l_dimm_type) { case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM: + if( !find_value_from_key( mss::rdimm::RAW_CARDS, l_ref_raw_card_rev, o_raw_card) ) + { + FAPI_ERR( "Invalid reference raw card recieved for RDIMM: %d", l_ref_raw_card_rev ); + return fapi2::FAPI2_RC_FALSE; + } - FAPI_ASSERT( find_value_from_key( mss::rdimm::RAW_CARDS, l_ref_raw_card_rev, o_raw_card), - fapi2::MSS_INVALID_RAW_CARD() - .set_DIMM_TYPE(l_dimm_type) - .set_RAW_CARD_REV(l_ref_raw_card_rev) - .set_DIMM_TARGET(i_target), - "Invalid reference raw card recieved for RDIMM: %d for %s", - l_ref_raw_card_rev, - mss::c_str(i_target) ); break; case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM: + if( !find_value_from_key( mss::lrdimm::RAW_CARDS, l_ref_raw_card_rev, o_raw_card) ) + { + FAPI_ERR( "Invalid reference raw card recieved for LRDIMM: %d", l_ref_raw_card_rev ); + return fapi2::FAPI2_RC_FALSE; + } - FAPI_ASSERT( find_value_from_key( mss::lrdimm::RAW_CARDS, l_ref_raw_card_rev, o_raw_card), - fapi2::MSS_INVALID_RAW_CARD() - .set_DIMM_TYPE(l_dimm_type) - .set_RAW_CARD_REV(l_ref_raw_card_rev) - .set_DIMM_TARGET(i_target), - "Invalid reference raw card recieved for LRDIMM: %d for %s", - l_ref_raw_card_rev, - mss::c_str(i_target)); break; default: - - FAPI_ASSERT( false, - fapi2::MSS_INVALID_DIMM_TYPE() - .set_DIMM_TYPE(l_dimm_type) - .set_TARGET(i_target), - "Recieved invalid dimm type: %d for %s", - l_dimm_type, mss::c_str(i_target) ); + FAPI_ERR( "Recieved invalid dimm type: %d", l_dimm_type); + return fapi2::FAPI2_RC_FALSE; break; } @@ -774,7 +763,7 @@ fapi_try_exit: /// /// @brief Creates factory object & SPD data caches /// @param[in] i_target controller target -/// @param[out] o_factory_caches map of factory objects with a dimm position key +/// @param[out] o_factory_caches vector of factory objects /// @param[in] i_pDecoder custom decoder to populate cache (ignored for this specialization) /// @return FAPI2_RC_SUCCESS if okay /// @note This specialization is suited for creating a cache with platform @@ -782,7 +771,7 @@ fapi_try_exit: /// template<> fapi2::ReturnCode populate_decoder_caches( const fapi2::Target<TARGET_TYPE_MCS>& i_target, - std::map<uint32_t, std::shared_ptr<decoder> >& o_factory_caches, + std::vector< std::shared_ptr<decoder> >& o_factory_caches, const std::shared_ptr<decoder>& i_pDecoder) { // Input decoder for this version of populating cache would get overriden @@ -807,8 +796,8 @@ fapi2::ReturnCode populate_decoder_caches( const fapi2::Target<TARGET_TYPE_MCS>& FAPI_TRY( factory(l_dimm, l_spd, l_pDecoder), "%s. Failed SPD factory, could not instantiate decoder object", mss::c_str(i_target) ); - // Populate spd caches maps based on dimm pos - o_factory_caches.emplace( std::make_pair( pos(l_dimm), l_pDecoder ) ); + // Populate spd caches + o_factory_caches.push_back( l_pDecoder ); } // Populate some of the DIMM attributes early. This allows the following code to make @@ -825,7 +814,7 @@ fapi_try_exit: /// /// @brief Creates factory object & SPD data caches /// @param[in] i_target the dimm target -/// @param[out] o_factory_caches map of factory objects with a dimm position key +/// @param[out] o_factory_caches vector of factory objects /// @param[in] i_pDecoder custom decoder to populate cache (nullptr default) /// @return FAPI2_RC_SUCCESS if okay /// @note This specialization is suited for creating a cache with custom @@ -833,7 +822,7 @@ fapi_try_exit: /// template<> fapi2::ReturnCode populate_decoder_caches( const fapi2::Target<TARGET_TYPE_DIMM>& i_target, - std::map<uint32_t, std::shared_ptr<decoder> >& o_factory_caches, + std::vector< std::shared_ptr<decoder> >& o_factory_caches, const std::shared_ptr<decoder>& i_pDecoder) { if(i_pDecoder == nullptr) @@ -845,7 +834,7 @@ fapi2::ReturnCode populate_decoder_caches( const fapi2::Target<TARGET_TYPE_DIMM> // Custom decoder provided (usually done for testing) // Populate custom spd caches maps one dimm at a time - o_factory_caches.emplace( std::make_pair( pos(i_target), i_pDecoder ) ); + o_factory_caches.push_back( i_pDecoder ); // Populate some of the DIMM attributes early. This allows the following code to make // decisions based on DIMM information. Expressly done after the factory has decided on the SPD version diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H index 6969dd8d8..88728df10 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -150,13 +150,13 @@ fapi2::ReturnCode factory(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target /// /// @brief Creates factory object & SPD data caches /// @param[in] i_target the fapi2 target -/// @param[out] o_factory_caches map of factory objects with a dimm position key -/// @param[in] i_pDecoder optional input decoder to insert custom decoder, defaulted to nullptr +/// @param[out] o_factory_caches vector of factory objects +/// @param[in] i_pDecoder optional input decoder to insert custom decoder (nullptr default) /// @return FAPI2_RC_SUCCESS if okay /// template<fapi2::TargetType T> fapi2::ReturnCode populate_decoder_caches(const fapi2::Target<T>& i_target, - std::map< uint32_t, std::shared_ptr<decoder> >& o_factory_caches, + std::vector< std::shared_ptr<decoder> >& o_factory_caches, const std::shared_ptr<decoder>& i_pDecoder = nullptr); diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C index 0dfdb6e26..10440a804 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C @@ -36,7 +36,7 @@ #include <p9_mss_eff_config.H> // std -#include <map> +#include <vector> // fapi2 #include <fapi2.H> @@ -51,6 +51,7 @@ #include <lib/utils/find.H> #include <lib/dimm/eff_dimm.H> #include <lib/eff_config/plug_rules.H> + /// /// @brief Configure the attributes for each controller /// @param[in] i_target the controller (e.g., MCS) @@ -61,7 +62,7 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS> const bool i_decode_spd_only ) { fapi2::ReturnCode l_rc; - std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches; + std::vector< std::shared_ptr<mss::spd::decoder> > l_factory_caches; // Caches FAPI_TRY( mss::spd::populate_decoder_caches(i_target, l_factory_caches) ); @@ -77,22 +78,11 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS> "Unable to decode VPD for %s", mss::c_str(i_target) ); } - for( const auto& l_dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) ) + for( const auto& l_cache : l_factory_caches ) { std::shared_ptr<mss::eff_dimm> l_eff_dimm; - const auto l_dimm_pos = mss::pos(l_dimm); - - // TODO RTC:152390 Create function to do map checking on cached values - // Find decoder factory for this dimm position - auto l_it = l_factory_caches.find(l_dimm_pos); - - FAPI_TRY( mss::check::spd::invalid_cache(l_dimm, - l_it != l_factory_caches.end(), - l_dimm_pos), - "Failed to get valid cache (main decoder)"); - - FAPI_TRY( mss::eff_dimm::eff_dimm_factory( l_dimm, l_it->second, l_eff_dimm)); + FAPI_TRY( mss::eff_dimm::eff_dimm_factory( l_cache, l_eff_dimm)); FAPI_TRY( l_eff_dimm->dram_mfg_id() ); FAPI_TRY( l_eff_dimm->dram_width() ); diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C index 9ccb0e58f..241337255 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C @@ -97,14 +97,14 @@ extern "C" const auto l_index = mss::index(l_mcs); // Get cached decoder - std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches; + std::vector< std::shared_ptr<mss::spd::decoder> > l_factory_caches; FAPI_TRY( mss::spd::populate_decoder_caches(l_mcs, l_factory_caches), "%s. Failed to populate decoder cache", mss::c_str(i_target) ); { // instantiation of class that calculates CL algorithm fapi2::ReturnCode l_rc; - mss::cas_latency l_cas_latency(l_mcs, l_factory_caches, l_rc); + mss::cas_latency l_cas_latency( l_mcs, l_factory_caches, l_rc ); FAPI_TRY( l_rc, "%s. Failed to initialize cas_latency ctor", mss::c_str(i_target) ); if(l_cas_latency.iv_dimm_list_empty) @@ -117,7 +117,7 @@ extern "C" { // We set this to a non-0 so we avoid divide-by-zero errors in the conversions which // go from clocks to time (and vice versa.) We have other bugs if there was really - // no mt/s determined and there really is a DIMM installed, so this is ok. + // no MT/s determined and there really is a DIMM installed, so this is ok. // We pick the maximum frequency supported by the system as the default. l_min_dimm_freq[l_index] = fapi2::ENUM_ATTR_MSS_FREQ_MT2666; diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C index 0af0b59fe..a8d330355 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C @@ -38,7 +38,6 @@ // std lib #include <vector> -#include <map> // fapi2 #include <fapi2.H> @@ -74,43 +73,31 @@ extern "C" FAPI_INF("Populating decoder cache for %s", mss::c_str(l_mcs)); //Factory cache is per MCS - std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches; + std::vector< std::shared_ptr<mss::spd::decoder> > l_factory_caches; FAPI_TRY( mss::spd::populate_decoder_caches(l_mcs, l_factory_caches), - "Failed to populate decoder cache"); + "Failed to populate decoder cache for %s", l_mcs); // Get dimms for each MCS - for ( const auto& l_dimm : mss::find_targets<TARGET_TYPE_DIMM> (l_mcs)) + for ( const auto& l_cache : l_factory_caches ) { - const auto l_dimm_pos = mss::pos(l_dimm); - - // Find decoder factory for this dimm position - auto l_it = l_factory_caches.find(l_dimm_pos); - // Check to make sure it's valid - // TODO - RTC 152390 change factory check - FAPI_TRY( mss::check::spd::invalid_cache(l_dimm, - l_it != l_factory_caches.end(), - l_dimm_pos), - "Failed to get valid cache"); - { - uint8_t l_dimm_nominal = 0; - uint8_t l_dimm_endurant = 0; - - // Read nominal and endurant bits from SPD, 0 = 1.2V is not operable and endurant, 1 = 1.2 is valid - FAPI_TRY( l_it->second->operable_nominal_voltage(l_dimm_nominal) ); - FAPI_TRY( l_it->second->endurant_nominal_voltage(l_dimm_endurant) ); - - //Check to make sure 1.2 V is both operable and endurant, fail if it is not - FAPI_ASSERT ( (l_dimm_nominal == mss::spd::OPERABLE) && (l_dimm_endurant == mss::spd::ENDURANT), - fapi2::MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE(). - set_OPERABLE(l_dimm_nominal). - set_ENDURANT(l_dimm_endurant). - set_DIMM_TARGET(l_dimm), - "%s: DIMM is not operable (%d)" - " and/or endurant (%d) at 1.2V", - mss::c_str(l_dimm), - l_dimm_nominal, - l_dimm_endurant); - } // scope + uint8_t l_dimm_nominal = 0; + uint8_t l_dimm_endurant = 0; + + // Read nominal and endurant bits from SPD, 0 = 1.2V is not operable and endurant, 1 = 1.2 is valid + FAPI_TRY( l_cache->operable_nominal_voltage(l_dimm_nominal) ); + FAPI_TRY( l_cache->endurant_nominal_voltage(l_dimm_endurant) ); + + //Check to make sure 1.2 V is both operable and endurant, fail if it is not + FAPI_ASSERT ( (l_dimm_nominal == mss::spd::OPERABLE) && (l_dimm_endurant == mss::spd::ENDURANT), + fapi2::MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE(). + set_OPERABLE(l_dimm_nominal). + set_ENDURANT(l_dimm_endurant). + set_DIMM_TARGET(l_cache->iv_target), + "%s: DIMM is not operable (%d)" + " and/or endurant (%d) at 1.2V", + mss::c_str(l_cache->iv_target), + l_dimm_nominal, + l_dimm_endurant); } // l_dimm // Set the attributes for this MCS, values are in mss_const.H |