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author | Stephen Glancy <sglancy@us.ibm.com> | 2018-11-08 17:01:16 -0600 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-02-13 19:50:23 -0600 |
commit | b8427c4aa0721c64137494aad82b5cb7ca012bd4 (patch) | |
tree | 95fa9100791d40e84f21ee4c6cfa881c9ab7ddcc /src/import/chips/p9/procedures/hwp/memory/lib | |
parent | 3ba6748d3f2c361ca1649ba7ec88150fc285274a (diff) | |
download | talos-hostboot-b8427c4aa0721c64137494aad82b5cb7ca012bd4.tar.gz talos-hostboot-b8427c4aa0721c64137494aad82b5cb7ca012bd4.zip |
Updates MCA write and read timings
Allows LRDIMM's to pass MCBIST writes and reads
Updates initfile code to use new attributes
Change-Id: I69c19bdc66ca3ab1ace61bbc49101f6ca8267065
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68568
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68573
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib')
5 files changed, 287 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index 1968516fc..287be1eb5 100755 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -5966,6 +5966,98 @@ fapi_try_exit: } /// +/// @brief Determines & sets effective PHY RLO values +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_rdimm::phy_rlo() +{ + uint8_t l_mcs_attr[PORTS_PER_MCS] = {}; + uint8_t l_vpd = 0; + + // Gets the VPD value + FAPI_TRY( mss::vpd_mr_dphy_rlo(iv_mca, l_vpd)); + FAPI_TRY( eff_dphy_rlo( iv_mcs, &(l_mcs_attr[0])) ); + + // Sets up the value + l_mcs_attr[iv_port_index] = l_vpd; + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_EFF_DPHY_RLO, iv_mcs, l_mcs_attr) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective PHY RLO values +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_lrdimm::phy_rlo() +{ + constexpr uint8_t LR_OFFSET = 1; + constexpr uint8_t RLO_MAX = 7; + uint8_t l_mcs_attr[PORTS_PER_MCS] = {}; + uint8_t l_vpd = 0; + + // Gets the VPD value + FAPI_TRY( mss::vpd_mr_dphy_rlo(iv_mca, l_vpd)); + FAPI_TRY( eff_dphy_rlo( iv_mcs, &(l_mcs_attr[0])) ); + + // Sets up the value - ensure we don't have a rollover case + l_mcs_attr[iv_port_index] = std::min(uint8_t(l_vpd + LR_OFFSET), RLO_MAX); + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_EFF_DPHY_RLO, iv_mcs, l_mcs_attr) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective PHY WLO values +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_rdimm::phy_wlo() +{ + uint8_t l_mcs_attr[PORTS_PER_MCS] = {}; + uint8_t l_vpd = 0; + + // Gets the VPD value + FAPI_TRY( mss::vpd_mr_dphy_wlo(iv_mca, l_vpd)); + FAPI_TRY( eff_dphy_wlo( iv_mcs, &(l_mcs_attr[0])) ); + + // Sets up the value + l_mcs_attr[iv_port_index] = l_vpd; + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_EFF_DPHY_WLO, iv_mcs, l_mcs_attr) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective PHY WLO values +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_lrdimm::phy_wlo() +{ + constexpr uint8_t LR_OFFSET = 2; + uint8_t l_mcs_attr[PORTS_PER_MCS] = {}; + uint8_t l_vpd = 0; + + // Gets the VPD value + FAPI_TRY( mss::vpd_mr_dphy_wlo(iv_mca, l_vpd)); + FAPI_TRY( eff_dphy_wlo( iv_mcs, &(l_mcs_attr[0])) ); + + // Sets up the value - ensure we don't have an underflow case + l_mcs_attr[iv_port_index] = (l_vpd < LR_OFFSET) ? 0 : (l_vpd - LR_OFFSET); + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_EFF_DPHY_WLO, iv_mcs, l_mcs_attr) ); + +fapi_try_exit: + return fapi2::current_err; +} + + +/// /// @brief Determines & sets effective ODT read values /// @return fapi2::FAPI2_RC_SUCCESS if okay /// diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H index 656a061c5..d56dad024 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H @@ -583,6 +583,19 @@ class eff_dimm /// @return fapi2::FAPI2_RC_SUCCESS if okay /// virtual fapi2::ReturnCode odt_rd() = 0; + + /// + /// @brief Determines & sets effective PHY RLO values + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phy_rlo() = 0; + + /// + /// @brief Determines & sets effective PHY WLO values + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phy_wlo() = 0; + /// /// @brief Determines & sets effective config for data_mask /// @return fapi2::FAPI2_RC_SUCCESS if okay @@ -1102,6 +1115,19 @@ class eff_lrdimm : public eff_dimm virtual fapi2::ReturnCode odt_rd() final; /// + /// @brief Determines & sets effective PHY RLO values + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phy_rlo() final; + + /// + /// @brief Determines & sets effective PHY WLO values + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phy_wlo() final; + + + /// /// @brief Sets the RTT_NOM value from SPD /// @return fapi2::FAPI2_RC_SUCCESS if okay /// @note used for MRS01 @@ -1422,6 +1448,19 @@ class eff_rdimm : public eff_dimm virtual fapi2::ReturnCode odt_rd() final; /// + /// @brief Determines & sets effective PHY RLO values + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phy_rlo() final; + + /// + /// @brief Determines & sets effective PHY WLO values + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + virtual fapi2::ReturnCode phy_wlo() final; + + + /// /// @brief Sets the RTT_NOM value from SPD /// @return fapi2::FAPI2_RC_SUCCESS if okay /// @note used for MRS01 diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H index 089e275d9..45c7ee19c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H @@ -425,7 +425,7 @@ inline uint64_t twlo_twloe(const fapi2::Target<T>& i_target) uint64_t l_twlo_twloe = 0; uint8_t l_twldqsen = 0; - FAPI_TRY( mss::vpd_mr_dphy_wlo(i_target, l_wlo_ck) ); + FAPI_TRY( mss::eff_dphy_wlo(i_target, l_wlo_ck) ); FAPI_TRY( mss::twldqsen(i_target, l_twldqsen) ); // TODO RTC:160356 This changes if wlo is signed, which it's not but I wonder if it should diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index 4a452ded7..e27f82f69 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -10364,6 +10364,158 @@ fapi_try_exit: } /// +/// @brief ATTR_MSS_EFF_DPHY_WLO getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Write latency offset in number of +/// clocks +/// +inline fapi2::ReturnCode eff_dphy_wlo(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DPHY_WLO, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) ); + o_value = l_value[mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_DPHY_WLO: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_DPHY_WLO getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Write latency offset in number of +/// clocks +/// +inline fapi2::ReturnCode eff_dphy_wlo(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DPHY_WLO, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) ); + o_value = l_value[mss::index(l_mca)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_DPHY_WLO: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_DPHY_WLO getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Write latency offset in number of +/// clocks +/// +inline fapi2::ReturnCode eff_dphy_wlo(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DPHY_WLO, i_target, l_value) ); + memcpy(o_array, &l_value, 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_DPHY_WLO: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_DPHY_RLO getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Read latency offset in number of +/// clocks +/// +inline fapi2::ReturnCode eff_dphy_rlo(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DPHY_RLO, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) ); + o_value = l_value[mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_DPHY_RLO: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_DPHY_RLO getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Read latency offset in number of +/// clocks +/// +inline fapi2::ReturnCode eff_dphy_rlo(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DPHY_RLO, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) ); + o_value = l_value[mss::index(l_mca)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_DPHY_RLO: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_DPHY_RLO getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Read latency offset in number of +/// clocks +/// +inline fapi2::ReturnCode eff_dphy_rlo(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_DPHY_RLO, i_target, l_value) ); + memcpy(o_array, &l_value, 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_DPHY_RLO: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// /// @brief ATTR_EFF_DRAM_TREFI getter /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> /// @param[out] ref to the value uint16_t diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/phy_cntrl.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/phy_cntrl.C index 8674997fd..9a7dbdb6c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/phy_cntrl.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/phy_cntrl.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -142,8 +142,8 @@ fapi2::ReturnCode reset_config1(const fapi2::Target<TARGET_TYPE_MCA>& i_target) uint8_t l_type_index = 0; uint8_t l_gen_index = 0; - FAPI_TRY( mss::vpd_mr_dphy_rlo(i_target, l_rlo) ); - FAPI_TRY( mss::vpd_mr_dphy_wlo(i_target, l_wlo) ); + FAPI_TRY( mss::eff_dphy_rlo(i_target, l_rlo) ); + FAPI_TRY( mss::eff_dphy_wlo(i_target, l_wlo) ); FAPI_TRY( mss::eff_dram_gen(i_target, &(l_dram_gen[0])) ); FAPI_TRY( mss::eff_dimm_type(i_target, &(l_dimm_type[0])) ); |