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| author | Stephen Glancy <sglancy@us.ibm.com> | 2018-05-31 09:49:30 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-06-14 11:00:54 -0400 |
| commit | 5e71d0883849d0322dbc2815b0e0d590ed528f12 (patch) | |
| tree | 14174863083fa6a07873086271b33376dbebd1d9 /src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H | |
| parent | 48ed215d898d0720f7d2b8f1212dc180c6dfb7d9 (diff) | |
| download | talos-hostboot-5e71d0883849d0322dbc2815b0e0d590ed528f12.tar.gz talos-hostboot-5e71d0883849d0322dbc2815b0e0d590ed528f12.zip | |
Fixes CKE levels during RCD initialization
Change-Id: Ic00be58a3e972407e944ebdeff9a16c01c1ee3e9
CQ:SW432711
RTC:194935
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59645
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59652
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H index 4a3678578..05b6ae9e2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H @@ -48,10 +48,12 @@ namespace workarounds /// /// @brief Runs the DRAM reset workaround to fix training bugs /// @param[in] i_target - the target on which to operate +/// @param[in] i_sim - true IFF simulation mode is on /// @param[in,out] a vector of CCS instructions we should add to /// @return FAPI2_RC_SUCCESS if and only if ok /// fapi2::ReturnCode rcw_reset_dram( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const bool i_sim, std::vector< ccs::instruction_t<fapi2::TARGET_TYPE_MCBIST> >& io_inst); } // namespace workarounds |
