From 5e71d0883849d0322dbc2815b0e0d590ed528f12 Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Thu, 31 May 2018 09:49:30 -0500 Subject: Fixes CKE levels during RCD initialization Change-Id: Ic00be58a3e972407e944ebdeff9a16c01c1ee3e9 CQ:SW432711 RTC:194935 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59645 Tested-by: FSP CI Jenkins Dev-Ready: STEPHEN GLANCY Reviewed-by: Louis Stermole Reviewed-by: ANDRE A. MARIN Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59652 Tested-by: Jenkins OP Build CI Reviewed-by: Daniel M. Crowell --- .../p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H index 4a3678578..05b6ae9e2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/draminit_workarounds.H @@ -48,10 +48,12 @@ namespace workarounds /// /// @brief Runs the DRAM reset workaround to fix training bugs /// @param[in] i_target - the target on which to operate +/// @param[in] i_sim - true IFF simulation mode is on /// @param[in,out] a vector of CCS instructions we should add to /// @return FAPI2_RC_SUCCESS if and only if ok /// fapi2::ReturnCode rcw_reset_dram( const fapi2::Target& i_target, + const bool i_sim, std::vector< ccs::instruction_t >& io_inst); } // namespace workarounds -- cgit v1.2.1