Change mss lib so testing works with ATTR_IS_SIMULATION false

  Add eff_config to p9_mss_ut.C so it's run for all tests
  Fix the freq sync unit test to not trash mss_freq
  Fix the attribute file to be in line with the base attibutes
  Fix p9_msS_freq.H include guard
  Fix DRAM_BL to be a 2D array in mss attribute file

Change-Id: Id18ab3eb4b60f72af64c647f5ff7afe68b7e5097
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25651
Tested-by: Jenkins Server
Tested-by: Hostboot CI
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25653
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 27 insertions, 17 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
index 9c9b04eaa..ad0e9eb13 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
@@ -389,26 +389,27 @@ fapi2::ReturnCode bang_bang_lock( const fapi2::Target<TARGET_TYPE_MCBIST>& i_tar
     FAPI_DBG("Wait at least 32 memory clock cycles");
     FAPI_TRY( fapi2::delay(mss::cycles_to_ns(i_target, 32), mss::cycles_to_simcycles(32)) );
 
-    // Don't bother in cycle sim, we don't do the actual aligment
-    if (!is_sim)
+    // TODO RTC: 153954 implement bang-bang lock and other analog type things we can't do in sim
+#ifdef BANG_BANG_LOCK_IMPLEMENTED
+
+    // Check for BB lock.
+    for (const auto& p : i_target.getChildren<TARGET_TYPE_MCA>())
     {
-        // Check for BB lock.
-        for (const auto& p : i_target.getChildren<TARGET_TYPE_MCA>())
+        FAPI_DBG("Wait for BB lock in status register, bit %u",
+                 MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_BB_LOCK);
+
+        FAPI_ASSERT( mss::poll(p, MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0, mss::poll_parameters(DELAY_100NS),
+                               [](const size_t poll_remaining, const fapi2::buffer<uint64_t>& stat_reg) -> bool
         {
-            FAPI_DBG("Wait for BB lock in status register, bit %u",
-                     MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_BB_LOCK);
-
-            FAPI_ASSERT( mss::poll(p, MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0, mss::poll_parameters(DELAY_100NS),
-                                   [](const size_t poll_remaining, const fapi2::buffer<uint64_t>& stat_reg) -> bool
-            {
-                FAPI_DBG("stat_reg 0x%llx, remaining: %d", stat_reg, poll_remaining);
-                return stat_reg.getBit<MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_BB_LOCK>();
-            }),
-            fapi2::MSS_BANG_BANG_FAILED_TO_LOCK().set_MCA_IN_ERROR(p),
-            "MCA %s failed bang-bang alignment", mss::c_str(p) );
-        }
+            FAPI_DBG("stat_reg 0x%llx, remaining: %d", stat_reg, poll_remaining);
+            return stat_reg.getBit<MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_BB_LOCK>();
+        }),
+        fapi2::MSS_BANG_BANG_FAILED_TO_LOCK().set_MCA_IN_ERROR(p),
+        "MCA %s failed bang-bang alignment", mss::c_str(p) );
     }
 
+#endif
+
 fapi_try_exit:
     return fapi2::current_err;
 }
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H
index bed4e6e77..754e4c16e 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H
@@ -48,6 +48,8 @@ inline uint64_t freq_bitfield_helper( const uint64_t i_freq )
 {
     fapi2::buffer<uint64_t> l_data(0b1000);
 
+    FAPI_DBG("freq_bitfield_helper seeing MT/s: %d", i_freq);
+
     // Shift l_data over based on freq.
     switch(i_freq)
     {
@@ -64,7 +66,14 @@ inline uint64_t freq_bitfield_helper( const uint64_t i_freq )
             l_data >>= 1;
             break;
 
-            // 2666 is >> 0
+        case fapi2::ENUM_ATTR_MSS_FREQ_MT2666:
+            l_data >>= 0;
+            break;
+
+        default:
+            FAPI_ERR("Unkown MT/s: %d", i_freq);
+            fapi2::Assert(false);
+            break;
     };
 
     return l_data;