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author | Louis Stermole <stermole@us.ibm.com> | 2016-06-21 07:23:50 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-07-22 12:26:21 -0400 |
commit | fffd09919eafd7be288f3188af54c498201f8c99 (patch) | |
tree | 8aff2dcdaac0c15afe870040522a7905c6fdd967 /src/import/chips/p9/procedures/hwp/memory/lib/mcbist | |
parent | 46eba4f4df4d4726078680938434a209c174dd77 (diff) | |
download | talos-hostboot-fffd09919eafd7be288f3188af54c498201f8c99.tar.gz talos-hostboot-fffd09919eafd7be288f3188af54c498201f8c99.zip |
Adding ECC syndrome register access functions
Change-Id: I890d17aff1004e37327b5f7f1ee2dc5a27cef9f0
RTC: 156340
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26081
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26293
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mcbist')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/address.H | 109 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H | 20 |
2 files changed, 127 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/address.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/address.H index 707e27dad..23d325245 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/address.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/address.H @@ -32,9 +32,36 @@ #include <fapi2.H> #include <utility> +#include <lib/ecc/ecc_traits.H> namespace mss { + +namespace ecc +{ + +namespace fwms +{ + +/// +/// @class address +/// @brief Converts Firmware Mark Store ADDRESS field into mcbist::address +/// @tparam T fapi2 Target Type defaults to fapi2::TARGET_TYPE_MCA +/// @tparam TT traits type defaults to eccTraits<T> +/// @note template argument defaults are in forward declaration in lib/mcbist/address.H +/// @note 12 = dimm +/// @note 13:14 = mrank +/// @note 15:17 = srank +/// @note 18:19 = bank group +/// @note 20:22 = bank +/// +// See declaration below +template< fapi2::TargetType T, typename TT = eccTraits<T> > +class address; + +} // close namespace fwms +} // close namespace ecc + namespace mcbist { @@ -89,6 +116,28 @@ class address } /// + /// @brief Construct an address from an ecc::fwms::address + /// @tparam T fapi2 Target Type + /// @param[in] i_address representing an address field from a firmware mark store register + /// + template< fapi2::TargetType T > + address( const ecc::fwms::address<T>& i_address ) + { + fapi2::buffer<uint64_t> l_value = uint64_t(i_address); + uint64_t l_temp = 0; + l_value.extractToRight<ecc::fwms::address<T>::DIMM.first, ecc::fwms::address<T>::DIMM.second>(l_temp); + this->set_field<DIMM>(l_temp); + l_value.extractToRight<ecc::fwms::address<T>::MRANK.first, ecc::fwms::address<T>::MRANK.second>(l_temp); + this->set_field<MRANK>(l_temp); + l_value.extractToRight<ecc::fwms::address<T>::SRANK.first, ecc::fwms::address<T>::SRANK.second>(l_temp); + this->set_field<SRANK>(l_temp); + l_value.extractToRight<ecc::fwms::address<T>::BANK_GROUP.first, ecc::fwms::address<T>::BANK_GROUP.second>(l_temp); + this->set_field<BANK_GROUP>(l_temp); + l_value.extractToRight<ecc::fwms::address<T>::BANK.first, ecc::fwms::address<T>::BANK.second>(l_temp); + this->set_field<BANK>(l_temp); + } + + /// /// @brief Conversion operator to uint64_t /// @warn Right-aligns the address /// @@ -372,8 +421,64 @@ class address fapi2::buffer<uint64_t> iv_address; }; -} // namespace +} // close namespace mcbist + +// Documented above in its declaration. +template< fapi2::TargetType T, typename TT > +class ecc::fwms::address +{ + public: + // first is the start bit of the field, second is the length + typedef std::pair<uint64_t, uint64_t> field; + + constexpr static field DIMM = {TT::FIRMWARE_MS_ADDRESS, 1}; + constexpr static field MRANK = {TT::FIRMWARE_MS_ADDRESS + 1, 2}; + constexpr static field SRANK = {TT::FIRMWARE_MS_ADDRESS + 3, 3}; + constexpr static field BANK_GROUP = {TT::FIRMWARE_MS_ADDRESS + 6, 2}; + constexpr static field BANK = {TT::FIRMWARE_MS_ADDRESS + 8, 3}; + constexpr static field LAST_VALID = BANK; + + address() = default; + + /// + /// @brief Construct an address from a uint64_t (scom'ed value) + /// @param[in] i_value representing raw value from FWMS register + /// + address( const uint64_t& i_value ): + iv_value(i_value) + { + } + + /// + /// @brief Construct an address from an mcbist::address + /// @param[in] i_mcbist_address mcbist formatted address + /// @note Construction of mcbist::address from ecc::fwms::address + /// @note located in mcbist::address class + /// + address( const mcbist::address& i_mcbist_address ) + { + iv_value.insertFromRight<DIMM.first, DIMM.second>(i_mcbist_address.get_field<mcbist::address::DIMM>()); + iv_value.insertFromRight<MRANK.first, MRANK.second>(i_mcbist_address.get_field<mcbist::address::MRANK>()); + iv_value.insertFromRight<SRANK.first, SRANK.second>(i_mcbist_address.get_field<mcbist::address::SRANK>()); + iv_value.insertFromRight<BANK_GROUP.first, BANK_GROUP.second> + (i_mcbist_address.get_field<mcbist::address::BANK_GROUP>()); + iv_value.insertFromRight<BANK.first, BANK.second>(i_mcbist_address.get_field<mcbist::address::BANK>()); + } + + /// + /// @brief Conversion operator to uint64_t + /// + inline operator uint64_t() const + { + uint64_t l_temp = 0; + iv_value.extract<TT::FIRMWARE_MS_ADDRESS, TT::FIRMWARE_MS_ADDRESS_LEN, TT::FIRMWARE_MS_ADDRESS>(l_temp); + return l_temp; + } + + private: + fapi2::buffer<uint64_t> iv_value; +}; -} // namespace +} // close namespace mss #endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H index 29af7ba94..61be05a2f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H @@ -144,6 +144,7 @@ class mcbistTraits<fapi2::TARGET_TYPE_MCBIST> MCBIST_START = MCBIST_MCB_CNTLQ_START, MCBIST_STOP = MCBIST_MCB_CNTLQ_STOP, MCBIST_RESUME = MCBIST_MCB_CNTLQ_RESUME_FROM_PAUSE, + MCBIST_RESET_ERRORS = MCBIST_MCB_CNTLQ_RESET_ERROR_LOGS, MCBIST_IN_PROGRESS = MCBIST_MCB_CNTLSTATQ_IP, MCBIST_DONE = MCBIST_MCB_CNTLSTATQ_DONE, @@ -1389,6 +1390,25 @@ fapi_try_exit: } /// +/// @brief Reset the MCBIST error logs +/// @tparam T the fapi2::TargetType - derived +/// @tparam TT the mcbistTraits associated with T - derived +/// @param[in] i_target the target to effect +/// @return fapi2::ReturnCode, FAPI2_RC_SUCCESS iff OK +/// +template< fapi2::TargetType T, typename TT = mcbistTraits<T> > +inline fapi2::ReturnCode reset_errors( const fapi2::Target<T>& i_target ) +{ + fapi2::buffer<uint64_t> l_buf; + + FAPI_TRY( mss::getScom(i_target, TT::CNTLQ_REG, l_buf) ); + FAPI_TRY( mss::putScom(i_target, TT::CNTLQ_REG, l_buf.setBit<TT::MCBIST_RESET_ERRORS>()) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// /// @brief Return whether or not the MCBIST engine has an operation in progress /// @tparam T the fapi2::TargetType - derived /// @param[in] i_target the target to effect |