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author | Andre Marin <aamarin@us.ibm.com> | 2017-06-09 18:04:10 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-14 09:42:41 -0400 |
commit | 7074cfc250e019e570573891e903cc44130dee24 (patch) | |
tree | 00f21c439c2021034418be3ed44373ce19eeb908 /src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C | |
parent | 0116e1f975aa63d61a4d5d1457cc35247829b8db (diff) | |
download | talos-hostboot-7074cfc250e019e570573891e903cc44130dee24.tar.gz talos-hostboot-7074cfc250e019e570573891e903cc44130dee24.zip |
Double POR timings (tMOD, tMRD, and tZQ) for more margin per lab
Change-Id: Ia1e575d93370372ae6bcb393258bb6f95e324874
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41639
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41641
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C index b92c9086d..e69e06130 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C @@ -69,8 +69,12 @@ fapi2::ReturnCode setup_dram_zqcal( const fapi2::Target<fapi2::TARGET_TYPE_DIMM> // Note: this isn't general - assumes Nimbus via MCBIST instruction here BRS l_inst = ccs::zqcl_command<TARGET_TYPE_MCBIST>(i_target, i_rank); - l_inst.arr1.insertFromRight<MCBIST_CCS_INST_ARR1_00_IDLES, - MCBIST_CCS_INST_ARR1_00_IDLES_LEN>(tDLLK + mss::tzqinit()); + // Doubling tZQ to better margin per lab request + { + const size_t DELAY = 2 * (tDLLK + mss::tzqinit()); + l_inst.arr1.insertFromRight<MCBIST_CCS_INST_ARR1_00_IDLES, + MCBIST_CCS_INST_ARR1_00_IDLES_LEN>(DELAY); + } // There's nothing to decode here. FAPI_INF("ZQCL 0x%016llx:0x%016llx %s:rank %d", |