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author | Jacob Harvey <jlharvey@us.ibm.com> | 2016-08-03 15:49:44 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-30 21:55:45 -0400 |
commit | 54bc88b4d29d0d0d288aaccf79b8d4220848187b (patch) | |
tree | 605d5c61bc22e00bb6df7da1e3d05d56caf1b24a /src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C | |
parent | e436c6b446ac80fdf050539edc746e0082219b86 (diff) | |
download | talos-hostboot-54bc88b4d29d0d0d288aaccf79b8d4220848187b.tar.gz talos-hostboot-54bc88b4d29d0d0d288aaccf79b8d4220848187b.zip |
Fix eff_config, remove custom_dimm
Change-Id: Icc9bf700cbdf41467c4b0733f878d98b5dd76fed
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27930
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28184
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C index ec0d77f72..71a51e7bb 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C @@ -53,16 +53,17 @@ namespace ddr4 /// @brief mrs0_data ctor /// @param[in] a fapi2::TARGET_TYPE_DIMM target /// @param[out] fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok +/// @note Burst Length will always be set to fixed x8 (0) +/// @note Burst Chop (x4) is not supported /// mrs00_data::mrs00_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, fapi2::ReturnCode& o_rc ): iv_burst_length(0), - iv_read_burst_type(0), + iv_read_burst_type(fapi2::ENUM_ATTR_EFF_DRAM_RBT_SEQUENTIAL), iv_dll_reset(fapi2::ENUM_ATTR_EFF_DRAM_DLL_RESET_NO), - iv_test_mode(0), + iv_test_mode(fapi2::ENUM_ATTR_EFF_DRAM_TM_NORMAL), iv_write_recovery(0), iv_cas_latency(0) { - FAPI_TRY( mss::eff_dram_bl(i_target, iv_burst_length) ); FAPI_TRY( mss::eff_dram_rbt(i_target, iv_read_burst_type) ); FAPI_TRY( mss::eff_dram_cl(i_target, iv_cas_latency) ); FAPI_TRY( mss::eff_dram_dll_reset(i_target, iv_dll_reset) ); |