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authorRahul Batra <rbatra@us.ibm.com>2016-10-06 23:00:14 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2016-11-10 11:07:13 -0500
commitc52fc60516b6346cb06f05f438adb1c1c771e6b7 (patch)
treeacb1cb584b1752cbf694983e496b3837c4cd1dda /src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
parent8053357f7fe7c6be1c624e3df04b608d2d4e765d (diff)
downloadtalos-hostboot-c52fc60516b6346cb06f05f438adb1c1c771e6b7.tar.gz
talos-hostboot-c52fc60516b6346cb06f05f438adb1c1c771e6b7.zip
PGPE: PState Updates
-Added code for Pstate Table generation and write it to HOMER -Added temp. code to mimic boot process, i.e. copy Global Pstate Parameter Block -Added code to check for OCC_FLAG[PGPE_DEBUG_ENABLEMENT] -Added code to write to PGPE beacon periodically using FIT Change-Id: I8b2cee1b30d7ef56ee47a9432330a16c4cb1b989 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30850 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32400 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h')
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
index 0ecad6632..6b43819bd 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
@@ -218,6 +218,13 @@ typedef struct
/// Resonant Clock Grid Management Setup
ResonantClockingSetup resclk;
+ //Voltage change step size
+ uint32_t ext_vdd_step_size_mv;
+
+ uint32_t nest_frequency_mhz;
+
+ uint16_t PsVSlopes[VPD_NUM_SLOPES_SET][VPD_NUM_SLOPES_REGION];
+ uint16_t VPsSlopes[VPD_NUM_SLOPES_SET][VPD_NUM_SLOPES_REGION];
// @todo DPLL Droop Settings. These need communication to SGPE for STOP
} GlobalPstateParmBlock;
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