p9_pstates.h breakup

- content needed by all platforms
- cmeqm content created by p9_pstate_parameter_block for CME Hcode
- occ content created by p9_pstate_parameter_block for OCC FW
- pgpe content created by p9_pstate_parameter_block for PGPE Hcode
- API definitions between PGPE Hcode and OCC FW including the current
  shared memory definition.
  -  the IPC commands are update to better match OCC discussions
 - Addressed OCC FW<>PGPE Hcode review / Gerrit comments
- Still have a HB and Jenkins fail with the p9_pm_utils.  Cronus is fine.
- Deleted ../hwp/lib/p9_pstate_parameter_block.C in deference to already
  merged ../hwp/pm/p9_pstate_parameter_block.C
- Update IDDQ member names to be more descriptive to match WOF discussion
- Remove endianess checks in p9_pm_utils.H

Change-Id: I6ab884af08d5598da08bded1707b57c471f2f594
RTC: 163927
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29915
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29917
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

1 files changed, 178 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h
new file mode 100644
index 000000000..ca3a260b0
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h
@@ -0,0 +1,178 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h $     */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+/// @file  p9_pstates.h
+/// @brief Pstate structures and support routines for OCC product firmware
+///
+// *HWP HW Owner        : Greg Still <stillgs@us.ibm.com>
+// *HWP HW Owner        : Michael Floyd <mfloyd@us.ibm.com>
+// *HWP FW Owner        : Martha Broyles <bilpatil@in.ibm.com>
+// *HWP Team            : PM
+// *HWP Level           : 1
+// *HWP Consumed by     : HB:OCC
+
+#ifndef __P9_PSTATES_OCC_H__
+#define __P9_PSTATES_OCC_H__
+
+#include <p9_pstates_common.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/// IDDQ Reading Type
+/// Each entry is 2 bytes. The values are in 6.25mA units; this allow for a
+/// maximum value of 409.6A to be represented.
+///
+typedef uint16_t iddq_entry_t;
+
+/// AvgTemp Reading Type
+/// Each entry is 1 byte. The values are in 0.5degC units; this allow for a
+/// maximum value of 127degC to be represented.
+///
+typedef uint16_t avgtemp_entry_t;
+
+/// Iddq Table
+///
+/// A set of arrays of leakage values (Iddq) collected at various voltage
+/// conditions during manufacturing test that will feed into the Workload
+/// Optimized Frequency algorithms on the OCC.  These values are not installed
+/// in any hardware facilities.
+///
+typedef struct
+{
+
+    /// IDDQ version
+    uint8_t     iddq_version;
+
+    /// Good Quads per Sort
+    uint8_t     good_quads_per_sort;
+
+    /// Good Normal Cores per Sort
+    uint8_t     good_normal_cores_per_sort;
+
+    /// Good Caches per Sort
+    uint8_t     good_caches_per_sort;
+
+    /// Good Normal Cores
+    uint8_t     good_normal_cores[MAX_QUADS];
+
+    /// Good Caches
+    uint8_t     good_caches[MAX_QUADS];
+
+    /// RDP to TDP Scaling Factor in 0.01% units
+    uint16_t    rdp_to_tdp_scale_factor;
+
+    /// WOF Iddq Margin (aging factor) in 0.01% units
+    uint16_t    wof_iddq_margin_factor;
+
+    /// Temperature Scale Factor per 10C in 0.01% units
+    uint16_t    temperature_scale_factor;
+
+    /// Spare
+    uint8_t     spare[10];
+
+    /// IVDD ALL Good Cores ON; 6.25mA units
+    iddq_entry_t ivdd_all_good_cores_on_caches_on[IDDQ_MEASUREMENTS];
+
+    /// IVDD ALL Cores OFF; 6.25mA units
+    iddq_entry_t ivdd_all_cores_off_caches_off[IDDQ_MEASUREMENTS];
+
+    /// IVDD ALL Good Cores OFF; 6.25mA units
+    iddq_entry_t ivdd_all_good_cores_off_good_caches_on[IDDQ_MEASUREMENTS];
+
+    /// IVDD Quad 0 Good Cores ON, Caches ON; 6.25mA units
+    iddq_entry_t ivdd_quad_good_cores_on_good_caches_on[MAX_QUADS][IDDQ_MEASUREMENTS];
+
+    /// IVDDN ; 6.25mA units
+    iddq_entry_t ivdn;
+
+
+    /// IVDD ALL Good Cores ON, Caches ON; 6.25mA units
+    avgtemp_entry_t avgtemp_all_good_cores_on[IDDQ_MEASUREMENTS];
+
+    /// avgtemp ALL Cores OFF, Caches OFF; 6.25mA units
+    avgtemp_entry_t avgtemp_all_cores_off_caches_off[IDDQ_MEASUREMENTS];
+
+    /// avgtemp ALL Good Cores OFF, Caches ON; 6.25mA units
+    avgtemp_entry_t avgtemp_all_good_cores_off[IDDQ_MEASUREMENTS];
+
+    /// avgtemp Quad 0 Good Cores ON, Caches ON; 6.25mA units
+    avgtemp_entry_t avgtemp_quad_good_cores_on[MAX_QUADS][IDDQ_MEASUREMENTS];
+
+    /// avgtempN ; 6.25mA units
+    avgtemp_entry_t avgtemp_vdn;
+
+} IddqTable;
+
+
+
+/// The layout of the data created by the Pstate table creation firmware for
+/// comsumption by the OCC firmware.  This data will reside in the Quad
+/// Power Management Region (QPMR).
+///
+typedef struct
+{
+
+    /// Magic Number
+    uint64_t magic;  // the last byte of this number the structure's version.
+
+    /// Operating points
+    ///
+    /// VPD operating points are stored without load-line correction.  Frequencies
+    /// are in MHz, voltages are specified in units of 5mV, and currents are
+    /// in units of 500mA.
+    VpdOperatingPoint operating_points[VPD_PV_POINTS];
+
+    /// Loadlines and Distribution values for the VDD rail
+    SysPowerDistParms vdd_sysparm;
+
+    /// Loadlines and Distribution values for the VDN rail
+    SysPowerDistParms vdn_sysparm;
+
+    /// Loadlines and Distribution values for the VCS rail
+    SysPowerDistParms vcs_sysparm;
+
+    /// Iddq Table
+    IddqTable iddq;
+
+    /// WOF Controls
+    WOFElements wof;
+
+    // Frequency Limits
+    uint32_t frequency_min_khz;    // Comes from PowerSave #V point after biases
+    uint32_t frequency_max_khz;    // Comes from UltraTurbo #V point after biases
+    uint32_t frequency_step_khz;   // Comes from refclk/dpll_divider attributes.
+
+    // Minimum Pstate;  Maximum is always 0.
+    uint32_t pstate_min;    // Comes from PowerSave #V point after biases
+
+} OCCPstateParmBlock;
+
+
+#ifdef __cplusplus
+} // end extern C
+#endif
+
+#endif    /* __P9_PSTATES_OCC_H__ */