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author | Stephen Glancy <sglancy@us.ibm.com> | 2019-05-14 16:41:07 -0400 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-06-04 08:29:42 -0500 |
commit | 2acc85787f4b9166e11a9e12ba244cbacb2f71ec (patch) | |
tree | a1c1bda969efae33c547b1630537329b1a7d152e /src/import/chips/ocmb/procedures | |
parent | 19394bc52406397f343dbcc1c2ffa4a8d65d959d (diff) | |
download | talos-hostboot-2acc85787f4b9166e11a9e12ba244cbacb2f71ec.tar.gz talos-hostboot-2acc85787f4b9166e11a9e12ba244cbacb2f71ec.zip |
Updates the explorer draminit for 07MAY19 spec
Change-Id: Icda444adbb903ecce82ea99b5110430e951e1716
git-coreq:hostboot:Icda444adbb903ecce82ea99b5110430e951e1716
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77400
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77749
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/ocmb/procedures')
-rw-r--r-- | src/import/chips/ocmb/procedures/hwp/initfiles/explorer_scom.C | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/import/chips/ocmb/procedures/hwp/initfiles/explorer_scom.C b/src/import/chips/ocmb/procedures/hwp/initfiles/explorer_scom.C index eb6eb8604..a81664989 100644 --- a/src/import/chips/ocmb/procedures/hwp/initfiles/explorer_scom.C +++ b/src/import/chips/ocmb/procedures/hwp/initfiles/explorer_scom.C @@ -32,8 +32,9 @@ using namespace fapi2; constexpr uint64_t literal_1 = 1; constexpr uint64_t literal_3 = 3; constexpr uint64_t literal_0 = 0; -constexpr uint64_t literal_9 = 9; +constexpr uint64_t literal_11 = 11; constexpr uint64_t literal_4 = 4; +constexpr uint64_t literal_9 = 9; constexpr uint64_t literal_14 = 14; constexpr uint64_t literal_7 = 7; constexpr uint64_t literal_2 = 2; @@ -42,7 +43,6 @@ constexpr uint64_t literal_5 = 5; constexpr uint64_t literal_266 = 266; constexpr uint64_t literal_1866 = 1866; constexpr uint64_t literal_2668 = 2668; -constexpr uint64_t literal_11 = 11; constexpr uint64_t literal_2934 = 2934; constexpr uint64_t literal_12 = 12; constexpr uint64_t literal_13 = 13; @@ -105,6 +105,8 @@ fapi2::ReturnCode explorer_scom(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP fapi2::ATTR_IS_SIMULATION_Type l_TGT2_ATTR_IS_SIMULATION; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, TGT2, l_TGT2_ATTR_IS_SIMULATION)); uint64_t l_def_IS_MICROSEMI_SIM = (l_TGT2_ATTR_IS_SIMULATION == literal_1); + fapi2::ATTR_MEM_EXP_DFIMRL_CLK_Type l_TGT1_ATTR_MEM_EXP_DFIMRL_CLK; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MEM_EXP_DFIMRL_CLK, TGT1, l_TGT1_ATTR_MEM_EXP_DFIMRL_CLK)); fapi2::ATTR_MEM_RDIMM_BUFFER_DELAY_Type l_TGT1_ATTR_MEM_RDIMM_BUFFER_DELAY; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MEM_RDIMM_BUFFER_DELAY, TGT1, l_TGT1_ATTR_MEM_RDIMM_BUFFER_DELAY)); fapi2::ATTR_MEM_EFF_DIMM_TYPE_Type l_TGT1_ATTR_MEM_EFF_DIMM_TYPE; @@ -237,7 +239,8 @@ fapi2::ReturnCode explorer_scom(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP if (l_def_IS_MICROSEMI_SIM) { - l_scom_buffer.insert<36, 6, 58, uint64_t>(((l_TGT1_ATTR_MEM_EFF_DRAM_CL - literal_9) + l_def_RDIMM_Add_latency) ); + l_scom_buffer.insert<36, 6, 58, uint64_t>((((l_TGT1_ATTR_MEM_EFF_DRAM_CL - literal_11) + l_def_RDIMM_Add_latency) + + l_TGT1_ATTR_MEM_EXP_DFIMRL_CLK) ); } else if (l_def_IS_IBM_SIM) { |