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authorLuke Mulkey <lwmulkey@us.ibm.com>2017-10-10 14:28:25 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-12-12 17:11:12 -0500
commit7bbec657da0b3e0a79907906178cf6ec15033451 (patch)
tree91596d8754dd549b010c266417389318d28025ae /src/import/chips/centaur/procedures/xml/attribute_info
parentd527220c6ffe651548c3e002e0d473492c37ad27 (diff)
downloadtalos-hostboot-7bbec657da0b3e0a79907906178cf6ec15033451.tar.gz
talos-hostboot-7bbec657da0b3e0a79907906178cf6ec15033451.zip
MRW attribute changes
Change-Id: I78b2f33d144df826fd007914e378b6dd135fbd3d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48207 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48633 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/centaur/procedures/xml/attribute_info')
-rw-r--r--src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml14
-rw-r--r--src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml115
2 files changed, 20 insertions, 109 deletions
diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml
index 7447b069b..d3254e2ed 100644
--- a/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml
+++ b/src/import/chips/centaur/procedures/xml/attribute_info/dimm_spd_vpd_attributes.xml
@@ -2938,20 +2938,6 @@ Comes from the VPD MW Keyword</description>
</attribute>
<attribute>
- <id>ATTR_CEN_L4_BANK_DELETE_VPD</id>
- <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
- <description>L4 Bank Delete settings in VPD.
-Denotes what banks have been deleted from the L4.
-Data will be pulled from CDIMM VPD if CDIMM present.
-Data will be pulled from backplane VPD if IS DIMMs present.</description>
- <valueType>uint32</valueType>
- <writeable/>
- <platInit/>
- <odmVisable/>
- <persistent/>
-</attribute>
-
-<attribute>
<id>ATTR_CEN_VPD_MT_VERSION_BYTE</id>
<targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
<description>Describes the Version of MT Keyword</description>
diff --git a/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml b/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml
index 29e82be6a..6744193b7 100644
--- a/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml
+++ b/src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml
@@ -2101,15 +2101,6 @@ firmware notes: none</description>
<persistRuntime/>
</attribute>
-<attribute>
- <id>ATTR_CEN_MRW_THERMAL_MEMORY_POWER_LIMIT</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook Thermal Memory Power Limit</description>
- <valueType>uint32</valueType>
- <platInit/>
- <odmVisable/>
-</attribute>
-
<!--
<attribute>
<id>ATTR_CEN_MSS_INTERLEAVE_ENABLE</id>
@@ -3045,35 +3036,6 @@ Will be set at an MBA level with one policy to be used</description>
-->
<attribute>
- <id>ATTR_CEN_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook DIMM power curve percent uplift for this system at max utilization.</description>
- <valueType>uint8</valueType>
- <platInit/>
- <odmVisable/>
- <persistRuntime/>
-</attribute>
-
-<attribute>
- <id>ATTR_CEN_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook DIMM power curve percent uplift for this system at idle utilization.</description>
- <valueType>uint8</valueType>
- <platInit/>
- <odmVisable/>
- <persistRuntime/>
-</attribute>
-
-<attribute>
- <id>ATTR_CEN_MRW_MEM_THROTTLE_DENOMINATOR</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook throttle value for denominator cfg_nm_m</description>
- <valueType>uint32</valueType>
- <platInit/>
- <odmVisable/>
- <persistRuntime/>
-</attribute>
-<attribute>
<id>ATTR_CEN_MSS_INIT_STATE</id>
<targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
<description>How far into the ipl istep the centaur has been brought up</description>
@@ -3085,16 +3047,6 @@ Will be set at an MBA level with one policy to be used</description>
</attribute>
<attribute>
- <id>ATTR_CEN_MRW_MAX_DRAM_DATABUS_UTIL</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook value for maximum dram data bus utilization in centi percent (c%). Used to determine memory throttle values.</description>
- <valueType>uint32</valueType>
- <platInit/>
- <odmVisable/>
- <persistRuntime/>
-</attribute>
-
-<attribute>
<id>ATTR_CEN_MSS_EFF_VPD_VERSION</id>
<targetType>TARGET_TYPE_MBA</targetType>
<description>
@@ -3176,6 +3128,25 @@ Will be set at an MBA level with one policy to be used</description>
<odmVisable/>
</attribute>
+<attribute>
+ <id>ATTR_CEN_MRW_THERMAL_MEMORY_POWER_LIMIT</id>
+ <targetType>TARGET_TYPE_SYSTEM</targetType>
+ <description>Machine Readable Workbook Thermal Memory Power Limit</description>
+ <valueType>uint32</valueType>
+ <platInit/>
+ <odmVisable/>
+</attribute>
+
+<attribute>
+ <id>ATTR_CEN_MRW_POWER_CONTROL_REQUESTED</id>
+ <targetType>TARGET_TYPE_SYSTEM</targetType>
+ <description>Capable power control settings. In MRW.</description>
+ <valueType>uint8</valueType>
+ <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum>
+ <platInit/>
+ <odmVisable/>
+</attribute>
+
<!--
<attribute>
<id>ATTR_CEN_MSS_AVDD_OFFSET_DISABLE</id>
@@ -3433,16 +3404,6 @@ Will be set at an MBA level with one policy to be used</description>
</attribute>
-->
-<attribute>
- <id>ATTR_CEN_MRW_POWER_CONTROL_REQUESTED</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Capable power control settings. In MRW.</description>
- <valueType>uint8</valueType>
- <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum>
- <platInit/>
- <odmVisable/>
-</attribute>
-
<!--
<attribute>
<id>ATTR_CEN_MSS_AVDD_OFFSET</id>
@@ -3568,7 +3529,7 @@ Will be set at an MBA level with one policy to be used</description>
-->
<attribute>
- <id>ATTR_CEN_MRW_MEM_SENSOR_CACHE_ADDR_MAP</id>
+ <id>ATTR_MRW_MEM_SENSOR_CACHE_ADDR_MAP</id>
<targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
<description>Machine Readable Workbook value detailing the wiring of the 8 dimm temperature sensors for non custom dimms, in DIMM A0,A1,B0,B1,C0,C1,D0,D1 order. One nibble per sensor where bit0 (MSB) is the i2c bus the sensor is attached to (0 for master, 1 for spare) and bits 1:3 are for A2,A1,A0 of the sensor i2c address (where A2 is MSB)</description>
<valueType>uint32</valueType>
@@ -3587,42 +3548,6 @@ Will be set at an MBA level with one policy to be used</description>
</attribute>
<attribute>
- <id>ATTR_CEN_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook enablement of the HWP code to adjust the VMEM regulator power limit based on number of installed DIMMs.</description>
- <valueType>uint8</valueType>
- <platInit/>
- <enum>FALSE = 0, TRUE = 1</enum>
- <odmVisable/>
-</attribute>
-
-<attribute>
- <id>ATTR_CEN_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook value for the maximum possible number of dimms that can be installed under any of the VMEM regulators.</description>
- <valueType>uint8</valueType>
- <platInit/>
- <odmVisable/>
-</attribute>
-
-<attribute>
- <id>ATTR_CEN_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook DDR3 VMEM regulator power limit per CDIMM assuming a full configuration. Units in cW.</description>
- <valueType>uint32</valueType>
- <platInit/>
- <odmVisable/>
-</attribute>
-<attribute>
- <id>ATTR_CEN_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR4</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Machine Readable Workbook DDR4 VMEM regulator power limit per CDIMM assuming a full configuration. Units in cW.</description>
- <valueType>uint32</valueType>
- <platInit/>
- <odmVisable/>
-</attribute>
-
-<attribute>
<id>ATTR_CEN_MRW_WR_VREF_CHECK_VREF_STEP_SIZE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>Machine Readable Workbook attribute that holds the step size of the VREF when doing a box shmoo</description>
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