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author | Dan Crowell <dcrowell@us.ibm.com> | 2013-07-22 13:48:32 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-07-24 11:17:42 -0500 |
commit | 5b54634f62861d83830385da30f6c390f3bf909e (patch) | |
tree | 51877100db39dca6cd2b75284d68f65beaeceb6e /src/build | |
parent | 3f55e4bc9de4a652958a319747c546a6ee752dba (diff) | |
download | talos-hostboot-5b54634f62861d83830385da30f6c390f3bf909e.tar.gz talos-hostboot-5b54634f62861d83830385da30f6c390f3bf909e.zip |
Update bbuild to b0716a_1329.810
Updating to most recent released FipS driver.
Also removed workarounds for:
-RTC: 70124
-RTC: 67762
-RTC: 72729
-RTC: 76712
Change-Id: I0a7ccbfabc8cb1bef6d0896defaecaea2c5067a2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5511
Tested-by: Jenkins Server
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/build')
-rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
-rw-r--r-- | src/build/citest/etc/patches/patchlist.txt | 35 | ||||
-rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 37 |
3 files changed, 1 insertions, 73 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index f63192b1a..37fb98d8c 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips810/Builds/b0617a_1325.810 +/esw/fips810/Builds/b0716a_1329.810 diff --git a/src/build/citest/etc/patches/patchlist.txt b/src/build/citest/etc/patches/patchlist.txt index 456724f60..e0cbde4d1 100644 --- a/src/build/citest/etc/patches/patchlist.txt +++ b/src/build/citest/etc/patches/patchlist.txt @@ -5,38 +5,3 @@ Brief description of the problem or reason for patch -Files: list of files -Coreq: list of associated changes, e.g. workarounds.presimsetup -New version of proc_a_x_pll HW procedure requires additional actions -- RTC 70124 is opened to remove this workaround. -- Defect SW199610 is used to check the permanent workaround into fips810 -- Files - src/build/citest/etc/workarounds.postsimsetup - src/build/citest/etc/patches/patchlist.txt - src/build/citest/etc/patches/s1.act_proc_a_x_pll_patch -- CoReq: N/A - -Add action for L3 purge register. --RTC: 67762 --CMVC: 876083 --Files: p8_ex_l3purge.act --Coreq: None - -Add POR setting for TBROM scom register --RTC: 72729 --CMVC: 885548, 885681, 886545, 887736 --Files - src/build/citest/etc/workarounds.postsimsetup - src/build/citest/etc/patches/patchlist.txt - src/build/citest/etc/patches/p8_master.por - Indirectly: p8_slave.por, s1_master.por, s1_slave.por --Coreq: None - -Add action for SBE to set Thread Count --RTC: 76712 --CMVC: 889344 -- Files - src/build/citest/etc/workarounds.postsimsetup - src/build/citest/etc/patches/patchlist.txt - src/build/citest/etc/patches/p8.act_sbe_thread_count_patch - src/build/citest/etc/patches/s1.act_sbe_thread_count_patch --Coreq: None - diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index ee25aa5ae..d335f723b 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -32,40 +32,3 @@ #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $HOSTBOOTROOT/src/build/citest/etc/patches/my_patch_File -echo "+++ Updating actions for Blind Purge (CMVC 876083)" -mkdir -p $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/p8_ex.act $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/s1_ex.act $sb/simu/data/cec-chip -cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_ex_l3purge.act >> \ - $sb/simu/data/cec-chip/p8_ex.act -cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_ex_l3purge.act >> \ - $sb/simu/data/cec-chip/s1_ex.act - -echo "+++ Updating POR files for Secure ROM Support (removed with RTC 72729)" -mkdir -p $sb/simu/data/cec-chip/ -grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/p8_master.por > \ - $sb/simu/data/cec-chip/p8_master.por -grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/p8_slave.por > \ - $sb/simu/data/cec-chip/p8_slave.por -grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/s1_master.por > \ - $sb/simu/data/cec-chip/s1_master.por -grep -v 0x02020017 $BACKING_BUILD/src/simu/data/cec-chip/s1_slave.por > \ - $sb/simu/data/cec-chip/s1_slave.por -cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ - $sb/simu/data/cec-chip/p8_master.por -cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ - $sb/simu/data/cec-chip/p8_slave.por -cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ - $sb/simu/data/cec-chip/s1_master.por -cat $HOSTBOOTROOT/src/build/citest/etc/patches/p8_master.por >> \ - $sb/simu/data/cec-chip/s1_slave.por - -echo "+++ Updating actions for Thread Count(CMVC 889344)" -mkdir -p $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/p8.act $sb/simu/data/cec-chip -cp $BACKING_BUILD/src/simu/data/cec-chip/s1.act $sb/simu/data/cec-chip -patch $sb/simu/data/cec-chip/p8.act \ - $HOSTBOOTROOT/src/build/citest/etc/patches/p8.act_sbe_thread_count_patch -patch $sb/simu/data/cec-chip/s1.act \ - $HOSTBOOTROOT/src/build/citest/etc/patches/s1.act_sbe_thread_count_patch - |