Attribute Review - Nest

Change-Id: I6af714a8975122a4e83c955a21913ede0d643453
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23164
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23168
Tested-by: FSP CI Jenkins

18 files changed, 323 insertions, 180 deletions

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C
index ed06ed0eb..9caacf9e1 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C
@@ -160,26 +160,26 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        fapi2::ATTR_FREQ_A_Type l_TGT1_ATTR_FREQ_A;
-        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_A, TGT1, l_TGT1_ATTR_FREQ_A);
+        fapi2::ATTR_FREQ_A_MHZ_Type l_TGT1_ATTR_FREQ_A_MHZ;
+        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_A_MHZ, TGT1, l_TGT1_ATTR_FREQ_A_MHZ);
 
         if (l_rc)
         {
-            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_A)");
+            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_A_MHZ)");
             break;
         }
 
-        fapi2::ATTR_FREQ_PB_Type l_TGT1_ATTR_FREQ_PB;
-        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB, TGT1, l_TGT1_ATTR_FREQ_PB);
+        fapi2::ATTR_FREQ_PB_MHZ_Type l_TGT1_ATTR_FREQ_PB_MHZ;
+        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, TGT1, l_TGT1_ATTR_FREQ_PB_MHZ);
 
         if (l_rc)
         {
-            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_PB)");
+            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_PB_MHZ)");
             break;
         }
 
-        auto l_def_A_CMD_RATE_4B_R = (((literal_6 * l_TGT1_ATTR_FREQ_PB) * literal_2577) % ((
-                                          l_TGT1_ATTR_FREQ_A * literal_1600) * literal_2));
+        auto l_def_A_CMD_RATE_4B_R = (((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577) % ((
+                                          l_TGT1_ATTR_FREQ_A_MHZ * literal_1600) * literal_2));
         fapi2::ATTR_PROC_FABRIC_A_BUS_WIDTH_Type l_TGT1_ATTR_PROC_FABRIC_A_BUS_WIDTH;
         l_rc = FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_A_BUS_WIDTH, TGT1, l_TGT1_ATTR_PROC_FABRIC_A_BUS_WIDTH);
 
@@ -189,11 +189,11 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        auto l_def_A_CMD_RATE_D = ((l_TGT1_ATTR_FREQ_A * literal_1600) * literal_2);
-        auto l_def_A_CMD_RATE_4B_N = ((literal_6 * l_TGT1_ATTR_FREQ_PB) * literal_2577);
-        auto l_def_A_CMD_RATE_2B_R = (((literal_12 * l_TGT1_ATTR_FREQ_PB) * literal_2577) % ((
-                                          l_TGT1_ATTR_FREQ_A * literal_1600) * literal_2));
-        auto l_def_A_CMD_RATE_2B_N = ((literal_12 * l_TGT1_ATTR_FREQ_PB) * literal_2577);
+        auto l_def_A_CMD_RATE_D = ((l_TGT1_ATTR_FREQ_A_MHZ * literal_1600) * literal_2);
+        auto l_def_A_CMD_RATE_4B_N = ((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577);
+        auto l_def_A_CMD_RATE_2B_R = (((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577) % ((
+                                          l_TGT1_ATTR_FREQ_A_MHZ * literal_1600) * literal_2));
+        auto l_def_A_CMD_RATE_2B_N = ((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577);
         {
             l_rc = fapi2::getScom( TGT0, 0x501180bull, l_scom_buffer );
 
@@ -844,16 +844,16 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        fapi2::ATTR_FREQ_X_Type l_TGT1_ATTR_FREQ_X;
-        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_X, TGT1, l_TGT1_ATTR_FREQ_X);
+        fapi2::ATTR_FREQ_X_MHZ_Type l_TGT1_ATTR_FREQ_X_MHZ;
+        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_X_MHZ, TGT1, l_TGT1_ATTR_FREQ_X_MHZ);
 
         if (l_rc)
         {
-            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_X)");
+            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_X_MHZ)");
             break;
         }
 
-        auto l_def_X_CMD_RATE_4B_R = ((literal_6 * l_TGT1_ATTR_FREQ_PB) % l_TGT1_ATTR_FREQ_X);
+        auto l_def_X_CMD_RATE_4B_R = ((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) % l_TGT1_ATTR_FREQ_X_MHZ);
         fapi2::ATTR_PROC_FABRIC_X_BUS_WIDTH_Type l_TGT1_ATTR_PROC_FABRIC_X_BUS_WIDTH;
         l_rc = FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_X_BUS_WIDTH, TGT1, l_TGT1_ATTR_PROC_FABRIC_X_BUS_WIDTH);
 
@@ -863,10 +863,10 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        auto l_def_X_CMD_RATE_D = l_TGT1_ATTR_FREQ_X;
-        auto l_def_X_CMD_RATE_4B_N = (literal_6 * l_TGT1_ATTR_FREQ_PB);
-        auto l_def_X_CMD_RATE_2B_R = ((literal_12 * l_TGT1_ATTR_FREQ_PB) % l_TGT1_ATTR_FREQ_X);
-        auto l_def_X_CMD_RATE_2B_N = (literal_12 * l_TGT1_ATTR_FREQ_PB);
+        auto l_def_X_CMD_RATE_D = l_TGT1_ATTR_FREQ_X_MHZ;
+        auto l_def_X_CMD_RATE_4B_N = (literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ);
+        auto l_def_X_CMD_RATE_2B_R = ((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) % l_TGT1_ATTR_FREQ_X_MHZ);
+        auto l_def_X_CMD_RATE_2B_N = (literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ);
         {
             l_rc = fapi2::getScom( TGT0, 0x501180full, l_scom_buffer );
 
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
index 2cf1c04cf..adeaaee2c 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
@@ -88,30 +88,30 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
                 break;
             }
         }
-        fapi2::ATTR_FREQ_PB_Type l_TGT1_ATTR_FREQ_PB;
-        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB, TGT1, l_TGT1_ATTR_FREQ_PB);
+        fapi2::ATTR_FREQ_PB_MHZ_Type l_TGT1_ATTR_FREQ_PB_MHZ;
+        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, TGT1, l_TGT1_ATTR_FREQ_PB_MHZ);
 
         if (l_rc)
         {
-            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_PB)");
+            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_PB_MHZ)");
             break;
         }
 
-        fapi2::ATTR_FREQ_X_Type l_TGT1_ATTR_FREQ_X;
-        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_X, TGT1, l_TGT1_ATTR_FREQ_X);
+        fapi2::ATTR_FREQ_X_MHZ_Type l_TGT1_ATTR_FREQ_X_MHZ;
+        l_rc = FAPI_ATTR_GET(fapi2::ATTR_FREQ_X_MHZ, TGT1, l_TGT1_ATTR_FREQ_X_MHZ);
 
         if (l_rc)
         {
-            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_X)");
+            FAPI_ERR("ERROR executing: FAPI_ATTR_GET (ATTR_FREQ_X_MHZ)");
             break;
         }
 
-        auto l_def_X_RATIO_12_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X) >= (literal_12 * l_TGT1_ATTR_FREQ_PB));
-        auto l_def_X_RATIO_11_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X) >= (literal_11 * l_TGT1_ATTR_FREQ_PB));
-        auto l_def_X_RATIO_10_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X) >= (literal_10 * l_TGT1_ATTR_FREQ_PB));
-        auto l_def_X_RATIO_10_11 = ((literal_11 * l_TGT1_ATTR_FREQ_X) >= (literal_10 * l_TGT1_ATTR_FREQ_PB));
-        auto l_def_X_RATIO_10_12 = ((literal_12 * l_TGT1_ATTR_FREQ_X) >= (literal_10 * l_TGT1_ATTR_FREQ_PB));
-        auto l_def_X_RATIO_10_13 = ((literal_13 * l_TGT1_ATTR_FREQ_X) >= (literal_10 * l_TGT1_ATTR_FREQ_PB));
+        auto l_def_X_RATIO_12_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_11_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_11 * l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_11 = ((literal_11 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_12 = ((literal_12 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_13 = ((literal_13 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
         {
             l_rc = fapi2::getScom( TGT0, 0x501340aull, l_scom_buffer );
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C
index e27a06f97..0d77b65b6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C
@@ -68,7 +68,7 @@ extern "C"
         // Get nest freq && F/W attr that tells me if sync mode is required
         // or if I have to figure that out
         FAPI_TRY( mss::required_synch_mode(l_required_sync_mode) );
-        FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_FREQ_PB, fapi2::Target<TARGET_TYPE_SYSTEM>(), l_nest_freq) );
+        FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_FREQ_PB_MHZ, fapi2::Target<TARGET_TYPE_SYSTEM>(), l_nest_freq) );
 
         FAPI_INF("Retrieved req'd sync mode: %d and nest freq %d", l_required_sync_mode, l_nest_freq);
 
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C
index 1826868e1..f53b1f5d4 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C
@@ -138,8 +138,8 @@ p9_fbc_eff_config_calc_epsilons(
     const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& i_target,
     fapi2::ATTR_PROC_FABRIC_CORE_FLOOR_RATIO_Type i_core_floor_ratio,
     fapi2::ATTR_PROC_FABRIC_CORE_CEILING_RATIO_Type i_core_ceiling_ratio,
-    fapi2::ATTR_FREQ_PB_Type i_freq_fbc,
-    fapi2::ATTR_FREQ_CORE_CEILING_Type i_freq_core_ceiling)
+    fapi2::ATTR_FREQ_PB_MHZ_Type i_freq_fbc,
+    fapi2::ATTR_FREQ_CORE_CEILING_MHZ_Type i_freq_core_ceiling)
 {
     FAPI_DBG("Start");
 
@@ -319,22 +319,22 @@ p9_fbc_eff_config_process_freq_attributes(
     const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& i_target,
     fapi2::ATTR_PROC_FABRIC_CORE_FLOOR_RATIO_Type& io_core_floor_ratio,
     fapi2::ATTR_PROC_FABRIC_CORE_CEILING_RATIO_Type& io_core_ceiling_ratio,
-    fapi2::ATTR_FREQ_PB_Type& io_freq_fbc,
-    fapi2::ATTR_FREQ_CORE_CEILING_Type& io_freq_core_ceiling)
+    fapi2::ATTR_FREQ_PB_MHZ_Type& io_freq_fbc,
+    fapi2::ATTR_FREQ_CORE_CEILING_MHZ_Type& io_freq_core_ceiling)
 {
     FAPI_DBG("Start");
     uint32_t l_freq_core_floor;
     uint32_t l_freq_core_nom;
 
     // get core floor/nominal/ceiling frequency attributes
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_CORE_FLOOR, i_target, l_freq_core_floor),
-             "Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_FLOOR)");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_CORE_FLOOR_MHZ, i_target, l_freq_core_floor),
+             "Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_FLOOR_MHZ)");
 
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_CORE_NOMINAL, i_target, l_freq_core_nom),
-             "Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_NOMINAL)");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_CORE_NOMINAL_MHZ, i_target, l_freq_core_nom),
+             "Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_NOMINAL_MHZ)");
 
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_CORE_CEILING, i_target, io_freq_core_ceiling),
-             "Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_CEILING)");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_CORE_CEILING_MHZ, i_target, io_freq_core_ceiling),
+             "Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_CEILING_MHZ)");
 
     // verify the floor/nominal/ceiling frequencies
     // expect ceiling >= nominal, nominal >= floor
@@ -348,8 +348,8 @@ p9_fbc_eff_config_process_freq_attributes(
                 l_freq_core_floor, l_freq_core_nom, io_freq_core_ceiling);
 
     // calculate fabric/core frequency ratio attributes
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB, i_target, io_freq_fbc),
-             "Error from FAPI_ATTR_GET (ATTR_FREQ_PB)");
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, i_target, io_freq_fbc),
+             "Error from FAPI_ATTR_GET (ATTR_FREQ_PB_MHZ)");
 
     // determine table index based on fabric/core floor frequency ratio
     // breakpoint ratio: core floor 4.0, pb 2.0 (cache floor :: pb = 8/8)
@@ -457,8 +457,8 @@ p9_fbc_eff_config()
     fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
     fapi2::ATTR_PROC_FABRIC_CORE_FLOOR_RATIO_Type l_core_floor_ratio;
     fapi2::ATTR_PROC_FABRIC_CORE_CEILING_RATIO_Type l_core_ceiling_ratio;
-    fapi2::ATTR_FREQ_PB_Type l_freq_fbc;
-    fapi2::ATTR_FREQ_CORE_CEILING_Type l_freq_core_ceiling;
+    fapi2::ATTR_FREQ_PB_MHZ_Type l_freq_fbc;
+    fapi2::ATTR_FREQ_CORE_CEILING_MHZ_Type l_freq_core_ceiling;
 
     FAPI_TRY(p9_fbc_eff_config_process_freq_attributes(
                  FAPI_SYSTEM,
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_eff_grouping.C b/src/import/chips/p9/procedures/hwp/nest/p9_mss_eff_grouping.C
index fa20c463a..81e513758 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_mss_eff_grouping.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_eff_grouping.C
@@ -102,7 +102,7 @@ struct EffGroupingSysAttrs
     uint8_t iv_selectiveMode = 0;        // ATTR_MEM_MIRROR_PLACEMENT_POLICY
     uint8_t iv_enhancedNoMirrorMode = 0; // ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING
     uint8_t iv_fabricAddrBarMode = 0;    // ATTR_PROC_FABRIC_ADDR_BAR_MODE
-
+    uint8_t iv_groupsAllowed = 0;        // ATTR_MSS_INTERLEAVE_ENABLE
 };
 
 // See doxygen in struct definition.
@@ -131,11 +131,18 @@ fapi2::ReturnCode EffGroupingSysAttrs::getAttrs()
              "Error getting ATTR_PROC_FABRIC_ADDR_BAR_MODE, l_rc 0x%.8X",
              (uint64_t)fapi2::current_err);
 
+    // Get interleave option
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_INTERLEAVE_ENABLE, FAPI_SYSTEM,
+                           iv_groupsAllowed),
+             "Error getting ATTR_MSS_INTERLEAVE_ENABLE, l_rc 0x%.8X",
+             (uint64_t)fapi2::current_err);
+
     // Display attribute values
     FAPI_INF("EffGroupingSysAttrs: ");
     FAPI_INF("   ATTR_MEM_MIRROR_PLACEMENT_POLICY 0x%.8X", iv_selectiveMode);
     FAPI_INF("   ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING 0x%.8X", iv_enhancedNoMirrorMode);
     FAPI_INF("   ATTR_PROC_FABRIC_ADDR_BAR_MODE 0x%.8X", iv_fabricAddrBarMode);
+    FAPI_INF("   ATTR_MSS_INTERLEAVE_ENABLE 0x%.8X", iv_groupsAllowed);
 
 fapi_try_exit:
     FAPI_DBG("Exiting EffGroupingSysAttrs::getAttrs");
@@ -182,7 +189,6 @@ struct EffGroupingProcAttrs
         const EffGroupingSysAttrs i_sysAttrs);
 
     // Public data
-    uint8_t  iv_groupsAllowed = 0;  // ATTR_MSS_INTERLEAVE_ENABLE
     uint64_t iv_memBaseAddr = 0;    // ATTR_PROC_MEM_BASE
     uint64_t iv_mirrorBaseAddr = 0; // ATTR_PROC_MIRROR_BASE
     uint64_t iv_htmBarSizes[NUM_OF_HTM_REGIONS] = {0, 0}; // ATTR_PROC_HTM_BAR_SIZES
@@ -232,12 +238,6 @@ fapi2::ReturnCode EffGroupingProcAttrs::getAttrs(
     FAPI_DBG("Entering EffGroupingProcAttrs::getAttrs");
     fapi2::ReturnCode l_rc;
 
-    // Get interleave option
-    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_INTERLEAVE_ENABLE, i_target,
-                           iv_groupsAllowed),
-             "Error getting ATTR_MSS_INTERLEAVE_ENABLE, l_rc 0x%.8X",
-             (uint64_t)fapi2::current_err);
-
     // Get Hardware Trace Macro (HTM) bar size
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_HTM_BAR_SIZES, i_target, iv_htmBarSizes),
              "Error getting ATTR_PROC_HTM_BAR_SIZES, l_rc 0x%.8X",
@@ -275,7 +275,6 @@ fapi2::ReturnCode EffGroupingProcAttrs::getAttrs(
 
     // Display attribute values
     FAPI_INF("EffGroupingProcAttrs::getAttrs: ");
-    FAPI_INF("  ATTR_MSS_INTERLEAVE_ENABLE 0x%.8X", iv_groupsAllowed);
     FAPI_INF("  ATTR_PROC_HTM_BAR_SIZES[0] 0x%.16llX", iv_htmBarSizes[0]);
     FAPI_INF("  ATTR_PROC_HTM_BAR_SIZES[1] 0x%.16llX", iv_htmBarSizes[1]);
     FAPI_INF("  ATTR_PROC_OCC_SANDBOX_SIZE 0x%.16llX", iv_occSandboxSize);
@@ -1209,9 +1208,9 @@ fapi2::ReturnCode grouping_checkValidAttributes(
 
     // There must be at least one type of grouping allowed
     // Unused bits are don't care (i.e.: 0x10, 040)
-    FAPI_ASSERT( ((i_procAttrs.iv_groupsAllowed & ALL_GROUPS) != 0),
+    FAPI_ASSERT( ((i_sysAttrs.iv_groupsAllowed & ALL_GROUPS) != 0),
                  fapi2::MSS_EFF_GROUPING_NO_GROUP_ALLOWED()
-                 .set_MSS_INTERLEAVE_ENABLE_VALUE(i_procAttrs.iv_groupsAllowed)
+                 .set_MSS_INTERLEAVE_ENABLE_VALUE(i_sysAttrs.iv_groupsAllowed)
                  .set_CHIP(i_target),
                  "grouping_checkValidAttributes: No valid group type allowed" );
 
@@ -2464,32 +2463,32 @@ fapi2::ReturnCode p9_mss_eff_grouping(
     FAPI_INF("Attempt memory grouping");
 
     // Group MCs
-    if (l_procAttrs.iv_groupsAllowed & GROUP_8)
+    if (l_sysAttrs.iv_groupsAllowed & GROUP_8)
     {
         grouping_group8PortsPerGroup(l_memInfo, l_groupData);
     }
 
-    if (l_procAttrs.iv_groupsAllowed & GROUP_6)
+    if (l_sysAttrs.iv_groupsAllowed & GROUP_6)
     {
         grouping_group6PortsPerGroup(l_memInfo, l_groupData);
     }
 
-    if (l_procAttrs.iv_groupsAllowed & GROUP_4)
+    if (l_sysAttrs.iv_groupsAllowed & GROUP_4)
     {
         grouping_group4PortsPerGroup(l_memInfo, l_groupData);
     }
 
-    if (l_procAttrs.iv_groupsAllowed & GROUP_3)
+    if (l_sysAttrs.iv_groupsAllowed & GROUP_3)
     {
         grouping_group3PortsPerGroup(l_memInfo, l_groupData);
     }
 
-    if (l_procAttrs.iv_groupsAllowed & GROUP_2)
+    if (l_sysAttrs.iv_groupsAllowed & GROUP_2)
     {
         grouping_group2PortsPerGroup(l_memInfo, l_groupData);
     }
 
-    if (l_procAttrs.iv_groupsAllowed & GROUP_1)
+    if (l_sysAttrs.iv_groupsAllowed & GROUP_1)
     {
         grouping_group1PortsPerGroup(l_memInfo, l_groupData);
     }
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
index d7b99d672..342c16821 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
@@ -20,7 +20,7 @@
 <attributes>
 <!-- ********************************************************************** -->
 <attribute>
-  <id>ATTR_FREQ_PB</id>
+  <id>ATTR_FREQ_PB_MHZ</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     The frequency of a processor's nest mesh clock, in MHz.
@@ -32,7 +32,7 @@
 </attribute>
 <!-- ********************************************************************** -->
 <attribute>
-  <id>ATTR_FREQ_A</id>
+  <id>ATTR_FREQ_A_MHZ</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     The frequency of a processor's A link clocks, in MHz.
@@ -44,7 +44,7 @@
 </attribute>
 <!-- ********************************************************************** -->
 <attribute>
-  <id>ATTR_FREQ_X</id>
+  <id>ATTR_FREQ_X_MHZ</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     The frequency of a processor's X link clocks, in MHz.
@@ -56,7 +56,7 @@
 </attribute>
 <!-- ********************************************************************** -->
 <attribute>
-  <id>ATTR_FREQ_CORE_FLOOR</id>
+  <id>ATTR_FREQ_CORE_FLOOR_MHZ</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     The lowest frequency that a core can be set to in MHz.
@@ -68,31 +68,31 @@
 </attribute>
 <!-- ********************************************************************** -->
 <attribute>
-  <id>ATTR_FREQ_CORE_NOMINAL</id>
+  <id>ATTR_FREQ_CORE_NOMINAL_MHZ</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     The nominal core frequency in MHz.
     This is the same for all cores in the system.
-    Provided by the MRW.
+    Provided by the #V bucket of module VPD.
   </description>
   <valueType>uint32</valueType>
   <platInit/>
 </attribute>
 <!-- ********************************************************************** -->
 <attribute>
-  <id>ATTR_FREQ_CORE_CEILING</id>
+  <id>ATTR_FREQ_CORE_CEILING_MHZ</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     The maximum core frequency in MHz.
     This is the same for all cores in the system.
-    Provided by the MRW.
+    Provided by the #V bucket of module VPD.
   </description>
   <valueType>uint32</valueType>
   <platInit/>
 </attribute>
 <!-- ********************************************************************** -->
 <attribute>
-  <id>ATTR_FREQ_PCIE</id>
+  <id>ATTR_FREQ_PCIE_MHZ</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     The frequency of a processor's PCI-e bus in MHz.
@@ -101,7 +101,7 @@
   </description>
   <valueType>uint32</valueType>
   <platInit/>
-</attribute>
+ </attribute>
 <!-- ********************************************************************** -->
 <attribute>
   <id>ATTR_PROC_FABRIC_ASYNC_SAFE_MODE</id>
@@ -320,10 +320,14 @@
   <id>ATTR_PROC_FABRIC_GROUP_ID</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description>
-    Logical fabric group ID associated with this chip.Provided by the MRW.
+    Logical fabric group ID associated with this chip.
+    Provided by the MRW.
   </description>
   <valueType>uint8</valueType>
   <platInit/>
+  <!-- TODO: Story 155081
+       Not supposed to be writeable, PPE needs to resolve this issue in
+       p9_sbe_attr_setup.C -->
   <writeable/>
 </attribute>
 <!-- ********************************************************************** -->
@@ -331,10 +335,14 @@
   <id>ATTR_PROC_FABRIC_CHIP_ID</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description>
-    Logical fabric chip ID associated with this chip.Provided by the MRW.
+    Logical fabric chip ID associated with this chip.
+    Provided by the MRW.
   </description>
   <valueType>uint8</valueType>
   <platInit/>
+  <!-- TODO: Story 155081
+       Not supposed to be writeable, PPE needs to resolve this issue in
+       p9_sbe_attr_setup.C -->
   <writeable/>
 </attribute>
 <!-- ********************************************************************** -->
@@ -553,6 +561,7 @@
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>
     Guardband percentage to apply to baseline epsilon calculations
+    Set by p9_fbc_eff_config.
   </description>
   <valueType>int8</valueType>
   <writeable/>
@@ -638,10 +647,14 @@
   <id>ATTR_SYSTEM_IPL_PHASE</id>
   <targetType>TARGET_TYPE_SYSTEM</targetType>
   <description>Define context for current phase of system IPL.
-  Provided by the platform. </description>
+  </description>
   <valueType>uint8</valueType>
   <enum>HB_IPL = 0x1,HB_RUNTIME = 0x2,CACHE_CONTAINED = 0x4, CHIP_CONTAINED = 0x8</enum>
   <persistRuntime/>
+  <platInit/>
+  <!-- TODO: Story 155081
+       Not supposed to be writeable, PPE needs to resolve this issue in
+       p9_sbe_attr_setup.C -->
   <writeable/>
 </attribute>
 <!-- ********************************************************************** -->
@@ -657,6 +670,9 @@
     TRUE = 0x1
   </enum>
   <platInit/>
+  <!-- TODO: Story 155081
+       Not supposed to be writeable, PPE needs to resolve this issue in
+       sberegaccess.C -->
   <writeable/>
 </attribute>
 <!-- ********************************************************************** -->
@@ -678,7 +694,7 @@
                NORMAL = non-mirrored start: 0, mirrored start: 1024TB
                FLIPPED = mirrored start: 0, non-mirrored start: 512TB
                Set by platform.
-               Used by mss_eff_grouping
+               Used by mss_eff_grouping.
   </description>
   <valueType>uint8</valueType>
   <enum>
@@ -707,10 +723,11 @@
 <attribute>
   <id>ATTR_PROC_MEM_BASES</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-  <description> The non-mirrored memory base addresses of the groups formed
-                by the memory grouping process.
+  <description> The address where each memory group starts in the non-mirrored
+                memory groups stack.  This address is determined by the memory
+                grouping process based on the sizes of the memory groups formed
+                in each processor.
                 Set by p9_mss_eff_grouping.
-                Used by p9_setup_bars and platforms (dev tree).
   </description>
   <valueType>uint64</valueType>
   <array>8</array>
@@ -721,11 +738,11 @@
 <attribute>
   <id>ATTR_PROC_MEM_SIZES</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-  <description> The non-mirrored memory sizes of the groups formed by the memory
-                grouping process.  These values reflect the usable amount of
-                memory covered by the group.
+  <description> The memory size of each non-mirrored memory group in the
+                non-mirrored memory groups stack.  This size is determined by
+                the memory grouping process based on the amount of memory
+                behind the ports that are grouped together.
                 Set by p9_mss_eff_grouping.
-                Used by p9_setup_bars and platforms (dev tree, build winkle img)
   </description>
   <valueType>uint64</valueType>
   <array>8</array>
@@ -751,10 +768,11 @@
 <attribute>
   <id>ATTR_PROC_MIRROR_BASES</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-  <description> The mirrored memory base addresses of the groups formed
-                by the memory grouping process.
+  <description> The address where each memory group starts in the mirrored
+                memory groups stack.  This address is determined by
+                the memory grouping process based on the sizes of the memory
+                groups formed in each processor.
                 Set by p9_mss_eff_grouping.
-                Used by p9_setup_bars.
   </description>
   <valueType>uint64</valueType>
   <array>4</array>
@@ -765,11 +783,11 @@
 <attribute>
   <id>ATTR_PROC_MIRROR_SIZES</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-  <description> The mirrored memory sizes of the groups formed by the memory
-                grouping process.  These values reflect the usable amount of
-                mirrored memory covered by the group.
+  <description> The memory size of each memory group in the mirrored memory
+                groups stack.  This size is determined by the memory grouping
+                process based on the amount of memory behind the ports that are
+                grouped together.
                 Set by p9_mss_eff_grouping.
-                Used by p9_setup_bars and platforms (dev tree, build winkle img)
   </description>
   <valueType>uint64</valueType>
   <array>4</array>
@@ -779,7 +797,7 @@
 <!-- ********************************************************************** -->
 <attribute>
     <id>ATTR_MSS_INTERLEAVE_ENABLE</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
     <description>
       Used in the setting of groups.  It is a bit vector.  If the value
       BITWISE_AND  0x01 = 0x01 then groups of 1 are enabled,
@@ -789,7 +807,8 @@
       if the value BITWISE_AND 0x20 = 0x20, then groups of 6 are possible,
       if the value BITWISE_AND 0x80 = 0x80, then groups of 8 are possible.
       If no groups can formed according to this input, then an error will
-      be thrown. Provided by the MRW
+      be thrown.
+      Provided by the MRW
     </description>
     <valueType>uint8</valueType>
     <platInit/>
@@ -801,12 +820,15 @@
     <id>ATTR_MSS_MEM_MC_IN_GROUP</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
-      Creator :- mss_setup_bars
-      consumer :- platform
-      A 8 bit vector that would be a designation of which MC are involved in
-      the group. So the bits would represent MC0,MC1,MC2,MC3,MC4,MC5,MC6,MC7
-      -what is grouped into the first would go into [0], the 2nd group into
-       entry [1] and so on.
+      An 8 bit vector that would be a designation of which MC (Nimbus MCS or
+      Cumulus MI) are involved in the group.
+      So the bits would represent
+                  Nimbus   Cumulus
+        Bit 0     MCS0     MI0
+        Bit 1     MCS1     MI1
+        .....
+        Bit 7     MCS7     MI7
+      Set by p9_mss_eff_grouping
     </description>
     <valueType>uint8</valueType>
     <writeable/>
@@ -829,7 +851,7 @@
                                          12-- Alt Memory valid(0); 13-- Alt Memory valid (1);
                                          14-- Alt Group size (0); 15-- Alt Group size(1);
                                          16-- Alt Base address (0); 17-- Alt Base address (1);
-                                         
+
                                          13-- Alternate Group Size; 14-- Alternate Base address
        Mirroring     array[8-15] [0:17]:  0-- Port size; 1-- No of ports in group; 2-- Total group size of mirroring;
                                           3-- Base address; 4-11-- PortID number;
@@ -882,14 +904,12 @@
                 calculated based on the HTM trace sizes requested by users.
                 There are two different HTM trace areas, thus two different
                 base addresses.
-                Platform is to initialize this attribute to 0 (default).
                 Set by p9_mss_eff_grouping.
                 Used by p9_setup_bars.
   </description>
   <valueType>uint64</valueType>
   <array>2</array>
   <writeable/>
-  <platInit/>
   <persistRuntime/>
 </attribute>
 <!-- ********************************************************************* -->
@@ -899,7 +919,6 @@
   <description> The amount of memory a user can reserve to store HTM traces.
                 There are two different HTM trace areas, thus two different
                 sizes (For example, one to store NHTM0 and one forNHTM1).
-                Platform is to initialize this attribute to 0 (default).
                 Set by user via attribute override.
                 Used by p9_mss_eff_grouping.
   </description>
@@ -924,7 +943,6 @@
   </enum>
   <array>2</array>
   <writeable/>
-  <platInit/>
   <persistRuntime/>
 </attribute>
 <!-- ********************************************************************** -->
@@ -933,13 +951,10 @@
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description> The base address where the OCC sandbox starts.  It is
                 calculated based on the OCC sandbox size requested by users.
-                Platform is to initialize this attribute to 0 (default).
                 Set by p9_mss_eff_grouping.
-                Used by p9_setup_bars.
   </description>
   <valueType>uint64</valueType>
   <writeable/>
-  <platInit/>
   <persistRuntime/>
 </attribute>
 <!-- ********************************************************************* -->
@@ -971,7 +986,6 @@
      16_MB = 0x0000000001000000,
       ZERO = 0x0000000000000000
   </enum>
-  <writeable/>
   <platInit/>
   <persistRuntime/>
 </attribute>
diff --git a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp.C b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp.C
index cafd82852..6517d1fae 100644
--- a/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp.C
+++ b/src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -98,56 +98,56 @@ fapi::ReturnCode proc_build_smp_process_system(
 
         // get PB frequency attribute
         FAPI_DBG("proc_build_smp_process_system: Querying PB frequency attribute");
-        rc = FAPI_ATTR_GET(ATTR_FREQ_PB,
+        rc = FAPI_ATTR_GET(ATTR_FREQ_PB_MHZ,
                            NULL,
                            io_smp.freq_pb);
         if (!rc.ok())
         {
-            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_PB");
+            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_PB_MHZ");
             break;
         }
 
         // get A bus frequency attribute
         FAPI_DBG("proc_build_smp_process_system: Querying A bus frequency attribute");
-        rc = FAPI_ATTR_GET(ATTR_FREQ_A,
+        rc = FAPI_ATTR_GET(ATTR_FREQ_A_MHZ,
                            NULL,
                            io_smp.freq_a);
         if (!rc.ok())
         {
-            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_A");
+            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_A_MHZ");
             break;
         }
 
         // get X bus frequency attribute
         FAPI_DBG("proc_build_smp_process_system: Querying X bus frequency attribute");
-        rc = FAPI_ATTR_GET(ATTR_FREQ_X,
+        rc = FAPI_ATTR_GET(ATTR_FREQ_X_MHZ,
                            NULL,
                            io_smp.freq_x);
         if (!rc.ok())
         {
-            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_X");
+            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_X_MHZ");
             break;
         }
 
         // get core floor frequency attribute
         FAPI_DBG("proc_build_smp_process_system: Querying core floor frequency attribute");
-        rc = FAPI_ATTR_GET(ATTR_FREQ_CORE_FLOOR,
+        rc = FAPI_ATTR_GET(ATTR_FREQ_CORE_FLOOR_MHZ,
                            NULL,
                            io_smp.freq_core_floor);
         if (!rc.ok())
         {
-            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_FLOOR)");
+            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_FLOOR_MHZ)");
             break;
         }
 
         // get core nominal frequency attribute
         FAPI_DBG("proc_build_smp_process_system: Querying core nominal frequency attribute");
-        rc = FAPI_ATTR_GET(ATTR_FREQ_CORE_NOMINAL,
+        rc = FAPI_ATTR_GET(ATTR_FREQ_CORE_NOMINAL_MHZ,
                            NULL,
                            io_smp.freq_core_nom);
         if (!rc.ok())
         {
-            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_NOMINAL)");
+            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_CORE_NOMINAL_MHZ)");
             break;
         }
 
@@ -175,12 +175,12 @@ fapi::ReturnCode proc_build_smp_process_system(
 
         // get PCIe frequency attribute
         FAPI_DBG("proc_build_smp_process_system: Querying PCIe frequency attribute");
-        rc = FAPI_ATTR_GET(ATTR_FREQ_PCIE,
+        rc = FAPI_ATTR_GET(ATTR_FREQ_PCIE_MHZ,
                            NULL,
                            io_smp.freq_pcie);
         if (!rc.ok())
         {
-            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_PCIE");
+            FAPI_ERR("proc_build_smp_process_system: Error from FAPI_ATTR_GET (ATTR_FREQ_PCIE_MHZ");
             break;
         }
 
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C
index 156ecc593..886d2c8db 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_xip_customize.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -2348,10 +2348,10 @@ ReturnCode p8_xip_customize( const fapi::Target &i_target,
 
     // determine nest frequency
     uint32_t freq_pb;
-    rc = FAPI_ATTR_GET(ATTR_FREQ_PB, NULL, freq_pb);
+    rc = FAPI_ATTR_GET(ATTR_FREQ_PB_MHZ, NULL, freq_pb);
     if (!rc.ok())
     {
-        FAPI_ERR("Error from FAPI_ATTR_GET (ATTR_FREQ_PB)");
+        FAPI_ERR("Error from FAPI_ATTR_GET (ATTR_FREQ_PB_MHZ)");
         return rc;
     }
 
diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C
index 728a83c28..1e4c9fb6f 100644
--- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C
+++ b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2014                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -339,11 +339,11 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target)
             FAPI_ERR("Failed to get attribute: ATTR_MSS_FREQ.");
             break;
         }
-        // ATTR_FREQ_PB is a "system" attribute, so use NULL as the target.
-        rc = FAPI_ATTR_GET( ATTR_FREQ_PB, NULL, nest_freq);
+        // ATTR_FREQ_PB_MHZ is a "system" attribute, so use NULL as the target.
+        rc = FAPI_ATTR_GET( ATTR_FREQ_PB_MHZ, NULL, nest_freq);
         if (rc)
         {
-            FAPI_ERR("Failed to get attribute: ATTR_FREQ_PB.");
+            FAPI_ERR("Failed to get attribute: ATTR_FREQ_PB_MHZ.");
             break;
         }
 
diff --git a/src/usr/isteps/pm/pm_common.C b/src/usr/isteps/pm/pm_common.C
index 654f82be1..c60a362e8 100644
--- a/src/usr/isteps/pm/pm_common.C
+++ b/src/usr/isteps/pm/pm_common.C
@@ -145,7 +145,7 @@ namespace HBPM
         tS.getTopLevelTarget( sysTarget );
         assert( sysTarget != NULL );
 
-        uint32_t nestFreq =  sysTarget->getAttr<ATTR_FREQ_PB>();
+        uint32_t nestFreq =  sysTarget->getAttr<ATTR_FREQ_PB_MHZ>();
 
         config_data->version = HBPM::OccHostDataVersion;
         config_data->nestFrequency = nestFreq;
diff --git a/src/usr/occ/occ_common.C b/src/usr/occ/occ_common.C
index 98a01a9da..a6c7e73f5 100644
--- a/src/usr/occ/occ_common.C
+++ b/src/usr/occ/occ_common.C
@@ -175,7 +175,7 @@ namespace HBOCC
 
             // Save Nest Frequency;
             ATTR_NEST_FREQ_MHZ_type l_nestFreq =
-                                     sysTarget->getAttr<ATTR_FREQ_PB>();
+                                     sysTarget->getAttr<ATTR_FREQ_PB_MHZ>();
 
 
             size_t l_length = 0; // length of this section
@@ -278,7 +278,7 @@ namespace HBOCC
         tS.getTopLevelTarget( sysTarget );
         assert( sysTarget != NULL );
 
-        uint32_t nestFreq =  sysTarget->getAttr<ATTR_FREQ_PB>();
+        uint32_t nestFreq =  sysTarget->getAttr<ATTR_FREQ_PB_MHZ>();
 
         config_data->version = HBOCC::OccHostDataVersion;
         config_data->nestFrequency = nestFreq;
@@ -351,7 +351,7 @@ namespace HBOCC
         tS.getTopLevelTarget( sysTarget );
         assert( sysTarget != NULL );
 
-        uint32_t nestFreq =  sysTarget->getAttr<ATTR_FREQ_PB>();
+        uint32_t nestFreq =  sysTarget->getAttr<ATTR_FREQ_PB_MHZ>();
 
 
 
diff --git a/src/usr/runtime/common/hsvc_sysdata.C b/src/usr/runtime/common/hsvc_sysdata.C
index 5068c9c74..c17a28e2a 100644
--- a/src/usr/runtime/common/hsvc_sysdata.C
+++ b/src/usr/runtime/common/hsvc_sysdata.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -30,15 +30,15 @@
 // -- Input: ../../xml/attribute_info/common_attributes.xml --
 // No attributes found
 // -- Input: ../../xml/attribute_info/freq_attributes.xml --
-HSVC_LOAD_ATTR( ATTR_FREQ_A );
-HSVC_LOAD_ATTR( ATTR_FREQ_CORE_FLOOR );
-HSVC_LOAD_ATTR( ATTR_FREQ_CORE_NOMINAL );
+HSVC_LOAD_ATTR( ATTR_FREQ_A_MHZ );
+HSVC_LOAD_ATTR( ATTR_FREQ_CORE_FLOOR_MHZ );
+HSVC_LOAD_ATTR( ATTR_FREQ_CORE_NOMINAL_MHZ );
 HSVC_LOAD_ATTR( ATTR_FREQ_MEM_REFCLOCK );
-HSVC_LOAD_ATTR( ATTR_FREQ_PB );
-HSVC_LOAD_ATTR( ATTR_FREQ_PCIE );
+HSVC_LOAD_ATTR( ATTR_FREQ_PB_MHZ );
+HSVC_LOAD_ATTR( ATTR_FREQ_PCIE_MHZ );
 HSVC_LOAD_ATTR( ATTR_FREQ_PROC_REFCLOCK );
 HSVC_LOAD_ATTR( ATTR_FREQ_PROC_REFCLOCK_KHZ );
-HSVC_LOAD_ATTR( ATTR_FREQ_X );
+HSVC_LOAD_ATTR( ATTR_FREQ_X_MHZ );
 // -- Input: ../../xml/attribute_info/L2_L3_attributes.xml --
 HSVC_LOAD_ATTR( ATTR_L2_FORCE_R_T2_EPS );
 HSVC_LOAD_ATTR( ATTR_L2_R_T0_EPS );
diff --git a/src/usr/runtime/test/runtimeattrstest.H b/src/usr/runtime/test/runtimeattrstest.H
index 478f405ea..0eb628cf3 100644
--- a/src/usr/runtime/test/runtimeattrstest.H
+++ b/src/usr/runtime/test/runtimeattrstest.H
@@ -82,11 +82,11 @@ class RuntimeAttrsTest: public CxxTest::TestSuite
         //Grab a couple of arbitrary attributes
         ReturnCode l_rc;
 
-        fapi::ATTR_FREQ_PB_Type freq = 0;
-        l_rc = FAPI_ATTR_GET(ATTR_FREQ_PB,NULL,freq);
+        fapi::ATTR_FREQ_PB_MHZ_Type freq = 0;
+        l_rc = FAPI_ATTR_GET(ATTR_FREQ_PB_MHZ,NULL,freq);
         if( l_rc )
         {
-            TS_FAIL("Error getting fapi::ATTR_FREQ_PB");
+            TS_FAIL("Error getting fapi::ATTR_FREQ_PB_MHZ");
         }
         bool freq_found = false;
 
@@ -102,24 +102,24 @@ class RuntimeAttrsTest: public CxxTest::TestSuite
         uint64_t attr = 0;
         while( headers[attr].id != hsvc_attr_header_t::NO_ATTRIBUTE )
         {
-            if( headers[attr].id == fapi::ATTR_FREQ_PB )
+            if( headers[attr].id == fapi::ATTR_FREQ_PB_MHZ )
             {
                 freq_found = true;
                 if( headers[attr].sizeBytes !=
-                    sizeof(fapi::ATTR_FREQ_PB_Type) )
+                    sizeof(fapi::ATTR_FREQ_PB_MHZ_Type) )
                 {
                     TRACFCOMP( g_trac_runtime, "size=%.16X", headers[attr].sizeBytes );
-                    TS_FAIL("Size of fapi::ATTR_FREQ_PB data is wrong");
+                    TS_FAIL("Size of fapi::ATTR_FREQ_PB_MHZ data is wrong");
                 }
                 else
                 {
-                    fapi::ATTR_FREQ_PB_Type* freq_act =
-                      reinterpret_cast<fapi::ATTR_FREQ_PB_Type*>
+                    fapi::ATTR_FREQ_PB_MHZ_Type* freq_act =
+                      reinterpret_cast<fapi::ATTR_FREQ_PB_MHZ_Type*>
                       (beginning+headers[attr].offset);
                     if( *freq_act != freq )
                     {
                         TRACFCOMP( g_trac_runtime, "Expected=%X, Actual=%X", freq, *freq_act );
-                        TS_FAIL("fapi::ATTR_FREQ_PB data is wrong");
+                        TS_FAIL("fapi::ATTR_FREQ_PB_MHZ data is wrong");
                     }
                 }
             }
@@ -159,7 +159,7 @@ class RuntimeAttrsTest: public CxxTest::TestSuite
 
         if( !freq_found )
         {
-            TS_FAIL("Never found FREQ_PB in system attributes");
+            TS_FAIL("Never found FREQ_PB_MHZ in system attributes");
         }
         if( !vpdMinLevel_found )
         {
diff --git a/src/usr/targeting/attrsync.C b/src/usr/targeting/attrsync.C
index 72dff620c..2a448fd5b 100644
--- a/src/usr/targeting/attrsync.C
+++ b/src/usr/targeting/attrsync.C
@@ -614,7 +614,7 @@ namespace TARGETING
             //sys-sys-power9 - base
             TARGETING::Target* l_pTopLevel = NULL;
             TARGETING::targetService().getTopLevelTarget(l_pTopLevel);
-            l_pTopLevel->setAttr<ATTR_FREQ_X>(0xfa0);
+            l_pTopLevel->setAttr<ATTR_FREQ_X_MHZ>(0xfa0);
 
             //chip-base
             PredicateCTM predEnc(CLASS_ENC);
diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index 615fb1e4f..501fe1dd8 100755
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -229,11 +229,20 @@ push @systemAttr,
         $reqPol->{'processor-refclock-frequency-khz'}->{content},
     "FREQ_MEM_REFCLOCK", $reqPol->{'memory-refclock-frequency'}->{content},
     "BOOT_FREQ_MHZ", $reqPol->{'boot-frequency'}->{content},
+    "FREQ_A_MHZ", $reqPol->{'proc_a_frequency'}->{content},
+    "FREQ_PB_MHZ", $reqPol->{'proc_pb_frequency'}->{content},
+    "NEST_FREQ_MHZ", $reqPol->{'proc_pb_frequency'}->{content},
+    "FREQ_PCIE_MHZ", $reqPol->{'proc_pcie_frequency'}->{content},
+    "FREQ_X_MHZ", $reqPol->{'proc_x_frequency'}->{content},
+# TODO: RTC 155880
+# The attributes in this block have their names changed from ATTR_x to ATTR_x_MHZ (above).
+# The old definitions are left assigned in this block in order to avoid FSP CI failure.
+# They are to be removed when code in FSP are updated to use the new names.
     "FREQ_A", $reqPol->{'proc_a_frequency'}->{content},
     "FREQ_PB", $reqPol->{'proc_pb_frequency'}->{content},
-    "NEST_FREQ_MHZ", $reqPol->{'proc_pb_frequency'}->{content},
     "FREQ_PCIE", $reqPol->{'proc_pcie_frequency'}->{content},
     "FREQ_X", $reqPol->{'proc_x_frequency'}->{content},
+# End TODO: RTC 155880
     "MSS_MBA_ADDR_INTERLEAVE_BIT", $reqPol->{'mss_mba_addr_interleave_bit'},
     "MSS_MBA_CACHELINE_INTERLEAVE_MODE",
         $reqPol->{'mss_mba_cacheline_interleave_mode'},
diff --git a/src/usr/targeting/common/target.C b/src/usr/targeting/common/target.C
index 559fd4ef7..bf0625298 100644
--- a/src/usr/targeting/common/target.C
+++ b/src/usr/targeting/common/target.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -664,19 +664,19 @@ void setFrequencyAttributes(Target * i_sys, uint32_t i_newNestFreq)
             l_oldNestFreq,
             i_newNestFreq );
 
-    //FREQ_X
+    //FREQ_X_MHZ
     uint32_t l_freqX = i_newNestFreq * 2;
-    i_sys->setAttr<TARGETING::ATTR_FREQ_X>(l_freqX);
+    i_sys->setAttr<TARGETING::ATTR_FREQ_X_MHZ>(l_freqX);
     TRACFCOMP(g_trac_targeting,
-            "ATTR_FREQ_X getting set to from %d to %d",
+            "ATTR_FREQ_X_MHZ getting set to from %d to %d",
             l_oldNestFreq*2,
             l_freqX );
 
-    //FREQ_PB
+    //FREQ_PB_MHZ
     uint32_t l_freqPb = i_newNestFreq;
-    i_sys->setAttr<TARGETING::ATTR_FREQ_PB>(l_freqPb);
+    i_sys->setAttr<TARGETING::ATTR_FREQ_PB_MHZ>(l_freqPb);
     TRACFCOMP(g_trac_targeting,
-            "ATTR_FREQ_PB getting set from %d to %d",
+            "ATTR_FREQ_PB_MHZ getting set from %d to %d",
             l_oldNestFreq,
             l_freqPb );
 
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index b11755452..465969b28 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -2485,13 +2485,13 @@
     <readable/>
     <writeable/>
     <hwpfToHbAttrMap>
-        <id>ATTR_FREQ_CORE_FLOOR</id>
+        <id>ATTR_FREQ_CORE_FLOOR_MHZ</id>
         <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
 
 <attribute>
-    <id>FREQ_PB</id>
+    <id>FREQ_PB_MHZ</id>
     <description>
         System attribute.
         The frequency of a processor's PB chiplet in MHz.
@@ -2503,13 +2503,13 @@
     <readable/>
     <writeable/>
     <hwpfToHbAttrMap>
-        <id>ATTR_FREQ_PB</id>
+        <id>ATTR_FREQ_PB_MHZ</id>
         <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
 
 <attribute>
-    <id>FREQ_A</id>
+    <id>FREQ_A_MHZ</id>
     <description>
         System attribute.
         The frequency of a processor's A-bus chiplet in MHz.
@@ -2522,13 +2522,13 @@
     <persistency>non-volatile</persistency>
     <readable/>
     <hwpfToHbAttrMap>
-        <id>ATTR_FREQ_A</id>
+        <id>ATTR_FREQ_A_MHZ</id>
         <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
 
 <attribute>
-    <id>FREQ_X</id>
+    <id>FREQ_X_MHZ</id>
     <description>
         System attribute.
         The frequency of a processor's X-bus chiplet in MHz.
@@ -2540,7 +2540,7 @@
     <readable/>
     <writeable/>
     <hwpfToHbAttrMap>
-        <id>ATTR_FREQ_X</id>
+        <id>ATTR_FREQ_X_MHZ</id>
         <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -3659,7 +3659,7 @@
 </attribute>
 
 <attribute>
-  <id>FREQ_PCIE</id>
+  <id>FREQ_PCIE_MHZ</id>
   <description>
     The frequency of a processor's PCI-e bus in MHz.
     This is the same for all PCI-e busses in the system.
@@ -3669,7 +3669,7 @@
   <persistency>non-volatile</persistency>
   <readable/>
   <hwpfToHbAttrMap>
-      <id>ATTR_FREQ_PCIE</id>
+      <id>ATTR_FREQ_PCIE_MHZ</id>
       <macro>DIRECT</macro>
   </hwpfToHbAttrMap>
 </attribute>
@@ -3691,7 +3691,7 @@
     <readable/>
     <writeable/>
     <hwpfToHbAttrMap>
-        <id>ATTR_FREQ_CORE_NOMINAL</id>
+        <id>ATTR_FREQ_CORE_NOMINAL_MHZ</id>
         <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
@@ -21140,7 +21140,7 @@ DEPRECATED!!!!
   <readable/>
   <writeable/>
   <hwpfToHbAttrMap>
-        <id>ATTR_FREQ_CORE_CEILING</id>
+        <id>ATTR_FREQ_CORE_CEILING_MHZ</id>
         <macro>DIRECT</macro>
   </hwpfToHbAttrMap>
 </attribute>
@@ -21584,7 +21584,7 @@ DEPRECATED!!!!
     <array>2</array>
   </simpleType>
   <writeable/>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
     <id>ATTR_PROC_HTM_BAR_SIZES</id>
@@ -28698,4 +28698,103 @@ DEPRECATED!!!!
     </hwpfToHbAttrMap>
 </attribute>
 
+<!--- TODO: RTC 155880
+ The attributes in this block have their names changed from ATTR_x to ATTR_x_MHZ.
+ The old definitions are left in this block in order to avoid build break in FSP.
+ They are to be removed when code in FSP are  updated to use the new names.
+-->
+<attribute>
+    <id>FREQ_PB</id>
+    <description>
+        System attribute.
+        The frequency of a processor's PB chiplet in MHz.
+        This is the same for all PB chiplets in the system.
+        Provided by the MRW.
+    </description>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_PB</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_A</id>
+    <description>
+        System attribute.
+        The frequency of a processor's A-bus chiplet in MHz.
+        This is the same for all A-bus chiplets in the system.
+        Provided by the MRW.
+    </description>
+    <simpleType><uint32_t>
+        <default>0x1900</default>
+    </uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_A</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_X</id>
+    <description>
+        System attribute.
+        The frequency of a processor's X-bus chiplet in MHz.
+        This is the same for all X-bus chiplets in the system.
+        Provided by the MRW.
+    </description>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_X</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>FREQ_CORE_CEILING</id>
+  <description>
+    The maximum core frequency in MHz.
+    This is the same for all cores in the system.
+    Data is provided by MVPD #V.
+  </description>
+  <simpleType>
+    <uint32_t>
+      <default>4800</default>
+    </uint32_t>
+  </simpleType>
+  <persistency>volatile</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_CORE_CEILING</id>
+        <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>FREQ_PCIE</id>
+  <description>
+    The frequency of a processor's PCI-e bus in MHz.
+    This is the same for all PCI-e busses in the system.
+    Provided by the MRW.
+  </description>
+  <simpleType><uint32_t></uint32_t></simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_FREQ_PCIE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<!--- TODO: End RTC 155880 workaround -->
+
 </attributes>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 4c06d5df1..26f92acb6 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -97,9 +97,9 @@
     <attribute><id>FREQ_PROC_REFCLOCK</id></attribute>
     <attribute><id>FREQ_PROC_REFCLOCK_KHZ</id></attribute>
     <attribute><id>FREQ_MEM_REFCLOCK</id></attribute>
-    <attribute><id>FREQ_PB</id></attribute>
-    <attribute><id>FREQ_A</id></attribute>
-    <attribute><id>FREQ_X</id></attribute>
+    <attribute><id>FREQ_PB_MHZ</id></attribute>
+    <attribute><id>FREQ_A_MHZ</id></attribute>
+    <attribute><id>FREQ_X_MHZ</id></attribute>
     <attribute><id>SP_FUNCTIONS</id></attribute>
     <attribute><id>HB_SETTINGS</id></attribute>
     <attribute><id>CEC_IPL_TYPE</id></attribute>
@@ -111,7 +111,7 @@
     <attribute><id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id></attribute>
     <attribute><id>MIRROR_BASE_ADDRESS</id></attribute>
     <attribute><id>PAYLOAD_IN_MIRROR_MEM</id></attribute>
-    <attribute><id>FREQ_PCIE</id></attribute>
+    <attribute><id>FREQ_PCIE_MHZ</id></attribute>
     <attribute><id>L2_R_T0_EPS</id></attribute>
     <attribute><id>L2_R_T1_EPS</id></attribute>
     <attribute><id>L2_R_T2_EPS</id></attribute>
@@ -310,6 +310,17 @@
     <attribute><id>MRW_MCS_PREFETCH_RETRY_THRESHOLD</id></attribute>
     <!-- AVP override for fused cores or normal cores -->
     <attribute><id>FUSED_CORE_OPTION</id></attribute>
+
+<!--- TODO: RTC 155880
+      The attributes in this block have their names changed from ATTR_x to ATTR_x_MHZ.
+      The old definitions are left in this block in order to avoid build break in FSP.
+      They are to be removed when code in FSP are  updated to use the new names. -->
+    <attribute><id>FREQ_PCIE</id></attribute>
+    <attribute><id>FREQ_A</id></attribute>
+    <attribute><id>FREQ_PB</id></attribute>
+    <attribute><id>FREQ_X</id></attribute>
+<!-- End TODO -->
+
 </targetType>
 
 <targetType>
@@ -1932,11 +1943,11 @@
     <attribute><id>MAX_ALLOWED_DIMM_FREQ</id></attribute>
     <attribute><id>REQUIRED_SYNCH_MODE</id></attribute>
     <attribute><id>BOOT_FREQ_MHZ</id></attribute>
-    <attribute><id>FREQ_A</id></attribute>
-    <attribute><id>FREQ_PB</id></attribute>
+    <attribute><id>FREQ_A_MHZ</id></attribute>
+    <attribute><id>FREQ_PB_MHZ</id></attribute>
     <attribute><id>NEST_FREQ_MHZ</id></attribute>
-    <attribute><id>FREQ_PCIE</id></attribute>
-    <attribute><id>FREQ_X</id></attribute>
+    <attribute><id>FREQ_PCIE_MHZ</id></attribute>
+    <attribute><id>FREQ_X_MHZ</id></attribute>
     <attribute><id>MSS_MBA_ADDR_INTERLEAVE_BIT</id></attribute>
     <attribute><id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id></attribute>
     <attribute><id>PROC_EPS_TABLE_TYPE</id></attribute>
@@ -2130,6 +2141,17 @@
     <attribute><id>MRW_DDR4_VDDR_MAX_LIMIT_POST_DRAM_INIT</id></attribute>
     <attribute><id>MSS_VOLT_VPP_SLOPE</id></attribute>
     <attribute><id>MSS_VOLT_VPP_INTERCEPT</id></attribute>
+
+<!--- TODO: RTC 155880
+      The attributes in this block have their names changed from ATTR_x to ATTR_x_MHZ.
+      The old definitions are left in this block in order to avoid build break in FSP.
+      They are to be removed when code in FSP are  updated to use the new names. -->
+    <attribute><id>FREQ_PCIE</id></attribute>
+    <attribute><id>FREQ_A</id></attribute>
+    <attribute><id>FREQ_PB</id></attribute>
+    <attribute><id>FREQ_X</id></attribute>
+<!-- End TODO -->
+
 </targetType>
 
 <!-- enc-node-power9 -->