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| author | crgeddes <crgeddes@us.ibm.com> | 2015-12-10 15:55:51 -0600 |
|---|---|---|
| committer | WILLIAM G. HOFFA <wghoffa@us.ibm.com> | 2016-02-26 08:49:33 -0600 |
| commit | 581462957e6df9ea663914fabf65f9f77b4e4bfa (patch) | |
| tree | 26602a2bccd1a3bfdc95d8c935ae74cecd155aed | |
| parent | a9e3b39d8520ff5c0356e85d4ce27ebf8f9a5fef (diff) | |
| download | talos-hostboot-581462957e6df9ea663914fabf65f9f77b4e4bfa.tar.gz talos-hostboot-581462957e6df9ea663914fabf65f9f77b4e4bfa.zip | |
Basic Hostboot platform support for FAPI2
Allows clean compile and link of FAPI2 procedures and a subset of the
platform functional support
RTC:123290
Change-Id: I9faa3bea86d1b43bca0a7eaca3869b45cc0b0d54
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23046
Tested-by: Jenkins Server
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
50 files changed, 8686 insertions, 141 deletions
diff --git a/src/build/mkrules/cflags.env.mk b/src/build/mkrules/cflags.env.mk index 9ec8576fc..665ec1b21 100644 --- a/src/build/mkrules/cflags.env.mk +++ b/src/build/mkrules/cflags.env.mk @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2013,2015 +# Contributors Listed Below - COPYRIGHT 2013,2016 # [+] Google Inc. # [+] International Business Machines Corp. # @@ -33,6 +33,8 @@ OPT_LEVEL ?= -O3 ifdef MODULE COMMONFLAGS += -fPIC -Bsymbolic -Bsymbolic-functions CFLAGS += -D__HOSTBOOT_MODULE=$(MODULE) +CFLAGS += -DNO_INITIALIZER_LIST +CFLAGS += -DPLAT_NO_THREAD_LOCAL_STORAGE endif COMMONFLAGS += $(OPT_LEVEL) -nostdlib diff --git a/src/build/tools/listdeps.pl b/src/build/tools/listdeps.pl index cb1a1fd44..8912f26d0 100755 --- a/src/build/tools/listdeps.pl +++ b/src/build/tools/listdeps.pl @@ -6,7 +6,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2013,2015 +# Contributors Listed Below - COPYRIGHT 2013,2016 # [+] Google Inc. # [+] International Business Machines Corp. # @@ -189,7 +189,7 @@ my $resident_modules = { "liberrl.so" => '1', "libtrace.so" => '1', "libvfs.so" => '1', - "libfapi.so" => '1', + "libfapi2.so" => '1', "libecmddatabuffer.so" => '1', "libpnor.so" => '1', "libmbox.so" => '1', diff --git a/src/include/usr/fapi2/attribute_service.H b/src/include/usr/fapi2/attribute_service.H new file mode 100644 index 000000000..44277bf5b --- /dev/null +++ b/src/include/usr/fapi2/attribute_service.H @@ -0,0 +1,252 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/attribute_service.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file src/include/usr/hwpf/plat/attribute_service.H +/// +/// @brief Defines the PLAT attribute access macros and the functions that +/// access attributes for FAPI2 +/// +/// Note that platform code must provide the code. +/// + +#ifndef ATTRIBUTESERVICE_H_ +#define ATTRIBUTESERVICE_H_ + +//****************************************************************************** +// Includes +//****************************************************************************** + +#include <stdint.h> +#include <return_code.H> +#include <target.H> +#include <target_types.H> + +#include <plat_attribute_service.H> +#include <fapi2_attribute_service.H> +#include <targeting/common/attributes.H> +#include <fapi2platattrmacros.H> + +#include <devicefw/driverif.H> +#include <plat_attr_override_sync.H> +#include <vpd/spdenums.H> + + +//****************************************************************************** +// Interface +//****************************************************************************** + +namespace fapi2 +{ + +namespace platAttrSvc +{ + +/// +/// @brief Gets the TARGETING object for the input FAPI target +/// +/// @param[in] i_pFapiTarget FAPI2 Target reference +/// @param[o] o_pTarget Output TARGETING object +/// @param[in] i_expectedType Expecting TARGETING object type +/// @return errlHndl_t +/// +errlHndl_t getTargetingTarget(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + TARGETING::Target* & o_pTarget, + const TARGETING::TYPE i_expectedType = TARGETING::TYPE_NA); + +/// +/// @brief Helper function for getTargetingAttr, this function is a friend of +/// TARGETING::Target so it can call _tryGetAttr +/// +/// +/// @param[in] i_pTargTarget Targeting Target reference +/// @param[in] i_targAttrId TARGETING Attribute ID +/// @param[in] i_attrSize Size of attribute in bytes +/// @param[in] o_pAttr Pointer to attribute where value is copied to +/// @return boolean describing if it was successful +bool getTargetingAttrHelper(TARGETING::Target * l_pTargTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, void * o_pAttr); + +/// +/// @brief Gets a Targeting attribute, this is called by the macro that maps a +/// FAPI Attribute get to a TARGETING attribute and should not be called +/// directly +/// +/// @param[in] i_pFapiTarget FAPI2 Target reference +/// @param[in] i_targAttrId TARGETING Attribute ID +/// @param[in] i_attrSize Size of attribute in bytes +/// @param[in] o_pAttr Pointer to attribute where value is copied to +/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +ReturnCode getTargetingAttr(const Target<TARGET_TYPE_ALL, + plat_target_handle_t >& i_pFapiTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, + void * o_pAttr); + +/// +/// @brief Helper function for setTargetingAttr, this function is a friend of +/// TARGETING::Target so it can call _trySetAttr +/// +/// +/// @param[in] i_pTargTarget Targeting Target reference +/// @param[in] i_targAttrId TARGETING Attribute ID +/// @param[in] i_attrSize Size of attribute in bytes +/// @param[in] o_pAttr Pointer to attribute where value is copied to +/// @return boolean describing if it was successful +/// +bool setTargetingAttrHelper(TARGETING::Target * l_pTargTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, + void * o_pAttr); + +/// +/// @brief Sets a Targeting attribute, this is called by the macro that maps a +/// FAPI Attribute set to a FAPI2 TARGETING attribute and should not be +/// called directly +/// +/// @param[in] i_pFapiTarget FAPI2 Target reference +/// @param[in] i_targAttrId TARGETING Attribute ID +/// @param[in] i_attrSize Size of attribute in bytes +/// @param[in] i_pAttr Pointer to attribute where value is retrieved from +/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +ReturnCode setTargetingAttr(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, + void * i_pAttr); + +/// +/// @brief This function is called by the FAPI_ATTR_GET macro when accessing +/// an attribute where zero needs to be returned. The use-case is for attributes +/// that exist solely for overriding +/// +/// @param[out] o_data Pointer to user's attribute variable +/// @param[in] i_len Size of o_data +/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +inline ReturnCode platGetZeroAttrData(void * o_data, + size_t i_len) +{ + memset(o_data, 0, i_len); + return fapi2::FAPI2_RC_SUCCESS; +} + + +/// +/// @brief This function is called by the FAPI_ATTR_GET macro when getting +/// ATTR_NAME. It should not be called directly +/// +/// @param[in] i_pFapiTarget FAPI2 Target reference +/// @param[out] o_name Output Name (from enum ATTR_NAME_Enum) +/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +ReturnCode platGetTargetName(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + uint8_t & o_name); + +/// +/// @brief This function is called by the FAPI_ATTR_GET macro when getting +/// ATTR_FUNCTIONAL. It should not be called directly +/// +/// @param[in] i_pFapiTarget FAPI2 Target reference +/// @param[out] o_functional 1 = functional, else 0 +/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +ReturnCode platGetFunctional(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + uint8_t & o_functional); + +/// +/// @brief This function is called by the FAPI_ATTR_GET macro when getting +/// ATTR_POS. It should not be called directly +/// +/// This is needed because the HWPF attribute is a uint32_t and the Hostboot +/// attribute is a uint16_t so a direct map will not work +/// +/// @param[in] i_pFapiTarget FAPI2 Target reference +/// @param[out] o_pos Output Posititon +/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +ReturnCode platGetTargetPos(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + uint32_t & o_pos); + + +// ----------------------------------------------------------------------------- +// End TODO: End to be supported functions +// ----------------------------------------------------------------------------- + +} // namespace platAttrSvc + +} // namespace fapi2 + +/** + * @brief Macro that directly maps a FAPI_ATTR_GET to a Targeting attr get + * + * Firstly there is a compile time check that the user's VAL variable matches + * the Targeting attribute type, this is optimized out, then there is a + * single function call + */ +#define FAPI2_PLAT_ATTR_SVC_GETMACRO_DIRECT(ID, PTARGET, VAL) \ +platAttrSvc::getTargetingAttr(PTARGET, (const TARGETING::ATTRIBUTE_ID)\ +fapiToTargeting::ID, sizeof(VAL), &(VAL)) + + +/** + * @brief Macro that directly maps a FAPI_ATTR_SET to a Targeting attr set + * + * Firstly there is a compile time check that the user's VAL variable matches + * the Targeting attribute type, this is optimized out, then there is a + * single function call + */ +#define FAPI2_PLAT_ATTR_SVC_SETMACRO_DIRECT(ID, PTARGET, VAL) \ +platAttrSvc::setTargetingAttr(PTARGET, (const TARGETING::ATTRIBUTE_ID)\ +fapiToTargeting::ID, sizeof(VAL), &(VAL)) + + + +//------------------------------------------------------------------------------ +// MACRO to route ATTR_NAME access to the correct Hostboot function +//------------------------------------------------------------------------------ +#define ATTR_NAME_GETMACRO(ID, PTARGET, VAL) \ + AttrOverrideSync::getAttrOverrideFunc(ID, PTARGET, &VAL)\ + ? fapi2::FAPI2_RC_SUCCESS : \ + fapi2::platAttrSvc::platGetTargetName(PTARGET, VAL) + +//------------------------------------------------------------------------------ +// MACRO to route ATTR_FUNCTIONAL access to the correct Hostboot function +//------------------------------------------------------------------------------ +#define ATTR_FUNCTIONAL_GETMACRO(ID, PTARGET, VAL) \ + AttrOverrideSync::getAttrOverrideFunc(ID, PTARGET, &VAL)\ + ? fapi2::FAPI2_RC_SUCCESS : \ + fapi2::platAttrSvc::platGetFunctional(PTARGET, VAL) + +//------------------------------------------------------------------------------ +// MACRO to route ATTR_POS access to the correct Hostboot function +//------------------------------------------------------------------------------ +#define ATTR_POS_GETMACRO(ID, PTARGET, VAL) \ + AttrOverrideSync::getAttrOverrideFunc(ID, PTARGET, &VAL)\ + ? fapi2::FAPI2_RC_SUCCESS : \ + fapi2::platAttrSvc::platGetTargetPos(PTARGET, VAL) + +#endif // ATTRIBUTESERVICE_H_ diff --git a/src/include/usr/fapi2/chip_ec_feature.H b/src/include/usr/fapi2/chip_ec_feature.H new file mode 100644 index 000000000..801e0d962 --- /dev/null +++ b/src/include/usr/fapi2/chip_ec_feature.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/chip_ec_feature.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef CHIPECFEATURE_H_ +#define CHIPECFEATURE_H_ + +#include <plat_chip_ec_feature.H> +#include <fapi2_chip_ec_feature.H> + +#include <stdint.h> +#include <target.H> +#include <return_code.H> + +namespace fapi2 +{ + +/// +/// @brief Platform implementation of querying chip ec feature +/// +/// This should only be called by FAPI during the processing of a FAPI_ATTR_GET +/// for a Chip EC Feature attribute +/// +/// @param[in] i_id Attribute ID of the Chip EC Feature +/// @param[in] i_pTarget Pointer to chip target +/// @param[out] o_hasFeature Set to 1 if chip has feature else 0 +/// @return ReturnCode. Zero on success, else platform specified error +/// +template< TargetType K > +ReturnCode queryChipEcFeature(AttributeId i_id, + const Target<K>& i_pTarget, + uint8_t & o_hasFeature) +{ + ReturnCode l_rc; + //@todo-RTC:128106 + return l_rc; +} + +} // end namespace + +#endif // CHIPECFEATURE_H_ diff --git a/src/include/usr/fapi2/fapiPlatTrace.H b/src/include/usr/fapi2/fapiPlatTrace.H new file mode 100644 index 000000000..ff9079a22 --- /dev/null +++ b/src/include/usr/fapi2/fapiPlatTrace.H @@ -0,0 +1,95 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/fapiPlatTrace.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/** + * @file platTrace.H + * + * @brief Defines the FAPI trace macros. + * + * Note that platform code must provide the implementation. + * + * FAPI has provided a default implementation of printfs. Platform code must + * provide an alternate implementation if needed. + */ + +//testing_thi_outside + +#ifndef PLATTRACE_H_ +#define PLATTRACE_H_ + +#include <stdio.h> +#include <trace/interface.H> +#include <config.h> + +//****************************************************************************** +// Trace buffer names +//****************************************************************************** +const char * const FAPI_TRACE_NAME = "FAPI"; +const char * const FAPI_IMP_TRACE_NAME = "FAPI_I"; +const char * const FAPI_SCAN_TRACE_NAME = "SCAN"; +const char * const FAPI_MFG_TRACE_NAME = "FAPI_MFG"; + +//****************************************************************************** +// Trace descriptors that are defined in a C file +//****************************************************************************** +extern trace_desc_t* g_fapiTd; +extern trace_desc_t* g_fapiImpTd; +extern trace_desc_t* g_fapiScanTd; +extern trace_desc_t* g_fapiMfgTd; + +// Information traces (go into fast trace buffer that can wrap often) +#define FAPI_INF(_fmt_, _args_...) TRACFCOMP(g_fapiTd, TRACE_FILENAME _fmt_, ##_args_ ) + +// Important traces (go into slow trace buffer that should not wrap often) +#define FAPI_IMP(_fmt_, _args_...) TRACFCOMP(g_fapiImpTd, TRACE_FILENAME _fmt_, ##_args_ ) + +// Error traces (go into slow trace buffer that should not wrap often) +#define FAPI_ERR(_fmt_, _args_...) TRACFCOMP(g_fapiImpTd, TRACE_FILENAME _fmt_, ##_args_ ) + +// Debug traces (go into fast trace buffer that can wrap often) +#define FAPI_DBG(_fmt_, _args_...) TRACDCOMP(g_fapiTd, TRACE_FILENAME _fmt_, ##_args_) + +// Scan traces +#define FAPI_SCAN(_fmt_, _args_...) TRACSCOMP(g_fapiScanTd, _fmt_, ##_args_) + +// FAPI Mfg traces +#if defined(CONFIG_CONSOLE) && !defined(__HOSTBOOT_RUNTIME) && \ + !defined(CONFIG_CONSOLE_OUTPUT_TRACE) +#include <console/consoleif.H> +// Traces will go to console if attr override set for this +#define FAPI_MFG(_fmt_, _args_...) \ + { \ + if(TRACE::isDebugEnabled(g_fapiMfgTd)) \ + { \ + CONSOLE::displayf(FAPI_MFG_TRACE_NAME,_fmt_, ##_args_); \ + } \ + } +#else + // Just define to standard TRACS buffer +#define FAPI_MFG(_fmt_, _args_...) \ + TRACSCOMP(g_fapiMfgTd, _fmt_, ##_args_) +#endif + + +#endif // PLATTRACE_H_ diff --git a/src/include/usr/fapi2/hw_access.H b/src/include/usr/fapi2/hw_access.H new file mode 100644 index 000000000..07ef14373 --- /dev/null +++ b/src/include/usr/fapi2/hw_access.H @@ -0,0 +1,316 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/hw_access.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// @file hw_access.H +/// +/// @brief Hardware access functions that needs to be specialized for +/// platform implementation. +/// + +#ifndef _FAPI2_HWACCESS_H_ +#define _FAPI2_HWACCESS_H_ + +// Variable_buffer isn't supported on PPE +#ifndef __PPE__ +#include <variable_buffer.H> +#endif + +#include <plat_hw_access.H> +#include <fapi2_hw_access.H> + +namespace fapi2 +{ + +//-------------------------------------------------------------------------- +// PIB Error Functions +//-------------------------------------------------------------------------- + +/// @brief Sets the PIB error mask - platform dependant +/// @param[in] i_mask The new error mask +// note: this can be moved to a C file if desired +inline void setPIBErrorMask(uint8_t i_mask) +{ + // Keeps the compiler from complaining about the unused i_mask + static_cast<void>(i_mask); + //TODO: RTC 124195 FAPI2 - PIB error mask and Operation mode supports + return; +} + +/// @brief Gets the PIB error mask - platform dependant +/// @return uint8_t The current PIB error mask +// note: this can be moved to a C file if desired +inline uint8_t getPIBErrorMask(void) +{ + //TODO: RTC 124195 FAPI2 - PIB error mask and Operation mode supports + return 0; +} + +//-------------------------------------------------------------------------- +// Operational Mode Error Functions +//-------------------------------------------------------------------------- + +/// @brief Sets the operational mode +/// @param[in] i_mode The new mode +// note: this can be moved to a C file if desired +inline void setOpMode(const OpModes i_mode) +{ + // Keeps the compiler from complaining about the unused i_mode + static_cast<void>(i_mode); + //TODO: RTC 124195 FAPI2 - PIB error mask and Operation mode supports + // No-op for now. Should set thread-local operational mode + return; +} + +/// @brief Gets the operational mode +/// @return the operational mode +// note: this can be moved to a C file if desired +inline OpModes getOpMode(void) +{ + //TODO: RTC 124195 FAPI2 - PIB error mask and Operation mode supports + // No-op for now. Should read thread-local operational mode + return NORMAL; +} + +//------------------------------------------------------------------------------ +// HW Communication Functions to be implemented at the platform layer. +//------------------------------------------------------------------------------ + +/// +/// @brief Platform-level implementation of getScom() +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address SCOM register address to read from. +/// @param[out] o_data Buffer that holds data read from HW target. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode getScom(const Target<K>& i_target, + const uint64_t i_address, + buffer<uint64_t>& o_data) +{ + return platGetScom(i_target, i_address, o_data); +} + +/// @brief Platform-level implementation of putScom() +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address SCOM register address to write to. +/// @param[in] i_data Buffer that holds data to write into address. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode putScom(const Target<K>& i_target, + const uint64_t i_address, + const buffer<uint64_t> i_data) +{ + return platPutScom(i_target, i_address, i_data); +} + +/// @brief Platform-level implementation of putScomUnderMask() +/// @tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address SCOM register address to write to. +/// @param[in] i_data Buffer that holds data to write into address. +/// @param[in] i_mask Buffer that holds the mask value. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode putScomUnderMask(const Target<K>& i_target, + const uint64_t i_address, + const buffer<uint64_t> i_data, + const buffer<uint64_t> i_mask) +{ + return platPutScomUnderMask(i_target, i_address, i_data, i_mask); +} + +/// +/// @brief Platform-level implementation called by getCfamRegister() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address CFAM address to read from. +/// @param[out] o_data 32-bit buffer that holds data read from HW target. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode getCfamRegister(const Target<K>& i_target, + const uint32_t i_address, + buffer<uint32_t>& o_data) +{ + return platGetCfamRegister(i_target, i_address, o_data); +} + +/// +/// @brief Platform-level implementation of putCfamRegister() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address CFAM address to write to. +/// @param[out] i_data 32-bit buffer that holds data to write into address. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode putCfamRegister(const Target<K>& i_target, + const uint32_t i_address, + const buffer<uint32_t> i_data) +{ + return platPutCfamRegister(i_target, i_address, i_data); +} + + +/// +/// @brief Platform-level implementation of modifyCfamRegister() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address CFAM register address to modify. +/// @param[out] i_data 32-bit buffer that holds data to modify. +/// @param[in] i_modifyMode The modify mode (or/and/xor). +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode modifyCfamRegister(const Target<K>& i_target, + const uint32_t i_address, + const buffer<uint32_t> i_data, + const fapi2::ChipOpModifyMode i_modifyMode) +{ + return platModifyCfamRegister(i_target, i_address, i_data, i_modifyMode); +} + +// variable_buffer isn't supported on PPE +#ifndef __PPE__ +/// +/// @brief Platform-level implementation of getRing() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address Ring address to read from. +/// @param[out] o_data Buffer that holds ring data read from HW target. +/// @param[in] i_ringMode Ring operation mode. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode getRing(const Target<K>& i_target, + const scanRingId_t i_address, + variable_buffer& o_data, + const RingMode i_ringMode) +{ + return platGetRing(i_target, i_address, o_data, i_ringMode); +} + +/// @brief Platform-level implementation of putRing() +/// Hardware procedures writers will not call this function. +/// @tparam K template parameter, passed in target. +/// @param[in] i_target Target to operate on. +/// @param[in] i_address Ring address to write to. +/// @param[in] i_data Buffer that contains RS4 compressed ring data +/// to write into address +/// @param[in] i_ringMode Ring operation mode. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode putRing(const Target<K>& i_target, + const scanRingId_t i_address, + const variable_buffer& i_data, + const RingMode i_ringMode) +{ + return platPutRing(i_target, i_address, i_data, i_ringMode); +} + +/// @brief Platform-level implementation of modifyRing() +/// @tparam K template parameter, passed in target. +/// @param[in] i_target Target to operate on. +/// @param[in] i_address Ring address to modify. +/// @param[in] i_data Buffer that contains RS4 compressed ring data +/// to be modified. +/// @param[in] i_modifyMode The modify mode (or/and/xor) +/// @param[in] i_ringMode Ring operation mode. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode modifyRing(const Target<K>& i_target, + const scanRingId_t i_address, + const variable_buffer& i_data, + const ChipOpModifyMode i_modifyMode, + const RingMode i_ringMode) +{ + return platModifyRing(i_target, + i_address, + i_data, + i_modifyMode, + i_ringMode); +} +#endif + +#ifdef FAPI_SUPPORT_MULTI_SCOM + /// @brief Performs a multiple SCOM operation + /// This interface performs multiple SCOM operations on a chip in the + /// order specified by the input MultiScom object. + /// See fapiMultiScom.H for details of how to populate the MultiScom + /// object with SCOM operations. + /// + /// @tparam K template parameter, passed in target. + /// @param[in] i_target Target to operate on. + /// @param[in,out] io_multiScomObj Reference to a MultiScom object, + /// pre-populated with SingleScomInfo entries + /// to perform multiple SCOMs on input target + /// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. + /// + /// @note This is a synchronous interface and would return after all the + /// SCOM operations are completed or on the first failed operation + /// + /// @note SCOMs will be performed in the order they were added to the + /// input MultiScom object + /// + /// @note In case of errors, the platform code is responsible to collect + /// and add all the required error info and FFDC into the error data + /// for debugging + /// + /// @note If the SCOM operations added are specific to a processor chip, + /// then the FSI Shift Engine configured in scatter-gather DMA mode + /// extension would be used to execute the SCOM operations in a + /// performance optimize mode. In this mode, the special + /// SCOM_BULK_READ_MODE and SCOM_BULK_WRITE_MODE operations are + /// supported that allow a large bulk of SCOM access (in multiple of + /// 64 bits) for targets that support auto-increment. The + /// SCOM_WRITE_UNDER_MASK operation is not supported in this mode + /// + /// @note If the SCOM operations added are specific to a memory buffer + /// chip, then the regular SCOM engine is used to execute the SCOM + /// operations. SCOM_WRITE_UNDER_MASK operation is supported in + /// this mode, but the special SCOM_BULK_READ_MODE and + /// SCOM_BULK_WRITE_MODE operations are not supported due to + /// hardware limitations. + /// + template< TargetType K > + fapi2::ReturnCode multiScom (const Target<K>& i_target, + MultiScom& io_multiScomObj) + { + } +#endif + + // ------------------------------------------------------------------------- + // NOTE: + // No spy access in Hostboot + // ------------------------------------------------------------------------- + +}; + +#endif // _FAPI2_HWACCESS_H_ diff --git a/src/include/usr/fapi2/hwp_executor.H b/src/include/usr/fapi2/hwp_executor.H new file mode 100644 index 000000000..72f00a694 --- /dev/null +++ b/src/include/usr/fapi2/hwp_executor.H @@ -0,0 +1,50 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/hwp_executor.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_hwp_executor.H +/// +/// @brief Defines the platform Executor Macro. +/// +/// The PLAT HWP Executor macro is called by the FAPI HWP Executor macro when a +/// PLAT invoker function or a HWP wants to execute a HWP. Each platform can +/// modify the macro to do any platform specific work to execute the HWP (e.g. +/// dlopening a shared library) +/// + +#ifndef HWPEXECUTOR_H_ +#define HWPEXECUTOR_H_ + +#include <plat_hwp_executor.H> +#include <fapi2_hwp_executor.H> + +/** + * @brief HWP Executor macro + * + * Call the HWP directly. + */ +#define FAPI_PLAT_EXEC_HWP(RC, FUNC, _args_...) \ + RC = FUNC(_args_) + +#endif // HWPEXECUTOR_H_ diff --git a/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H b/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H new file mode 100644 index 000000000..7eba42eaa --- /dev/null +++ b/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H @@ -0,0 +1,106 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file hwpf_fapi2_reasoncodes.H +/// +/// @brief Define error reason codes for FAPI2 HWPs +/// +/// + +#ifndef HWPF_FAPI2_REASONCODES_H_ +#define HWPF_FAPI2_REASONCODES_H_ + +#include <hbotcompid.H> + +namespace fapi2 +{ + /** + * @brief Defines the FAPI2 HWPF error log module IDs + */ + enum fapi2ModuleId + { + MOD_FAPI2_RC_TO_ERRL = 0x01, + MOD_FAPI2_GET_TARGETING_TARGET = 0x02, + MOD_FAPI2_PLAT_GET_TARGET_NAME = 0x03, + MOD_FAPI2_PLAT_HWP_TEST = 0x04, + MOD_FAPI2_PLAT_GET_PARENT_TEST = 0x05, + }; + + /** + * @brief Defines the HWPF error log reason codes + */ + enum fapi2ReasonCode + { + // FAPI generated errors (must match return_code_defs.H) + RC_INVALID_ATTR_GET = HWPF_COMP_ID | 0x01, + RC_INVALID_CHIP_EC_FEATURE_GET = HWPF_COMP_ID | 0x02, + RC_INVALID_TARG_TARGET = HWPF_COMP_ID | 0x07, + RC_MISMATCHED_FAPI_TARG_TARGET = HWPF_COMP_ID | 0x08, + RC_UNKNOWN_MODEL = HWPF_COMP_ID | 0x09, + RC_NULL_FAPI_TARGET = HWPF_COMP_ID | 0x0A, + RC_LOOKING_FOR_TYPE_NA = HWPF_COMP_ID | 0x0B, + + + //Platform generated errors + RC_NO_PROCS_FOUND = FAPI2_COMP_ID | 0x0B, + RC_NO_PATH_TO_TARGET_FOUND = FAPI2_COMP_ID | 0x0C, + RC_CORE_NO_EX_FOUND = FAPI2_COMP_ID | 0x0D, + RC_CORE_NO_EQ_FOUND = FAPI2_COMP_ID | 0x0E, + RC_CORE_NO_PROC_FOUND = FAPI2_COMP_ID | 0x10, + RC_EX_NO_EQ_FOUND = FAPI2_COMP_ID | 0x11, + RC_EX_NO_PROC_FOUND = FAPI2_COMP_ID | 0x12, + RC_EQ_NO_PROC_FOUND = FAPI2_COMP_ID | 0x13, + RC_MCA_NO_MCS_FOUND = FAPI2_COMP_ID | 0x14, + RC_MCA_NO_PROC_FOUND = FAPI2_COMP_ID | 0x15, + RC_MCS_NO_PROC_FOUND = FAPI2_COMP_ID | 0x16, + RC_MCBIST_NO_PROC_FOUND = FAPI2_COMP_ID | 0x17, + RC_PHB_NO_PEC_FOUND = FAPI2_COMP_ID | 0x18, + RC_PHB_NO_PROC_FOUND = FAPI2_COMP_ID | 0x19, + RC_PEC_NO_PROC_FOUND = FAPI2_COMP_ID | 0x1a, + RC_XBUS_NO_PROC_FOUND = FAPI2_COMP_ID | 0x1b, + RC_OBUS_NO_PROC_FOUND = FAPI2_COMP_ID | 0x1c, + RC_NVBUS_NO_PROC_FOUND = FAPI2_COMP_ID | 0x1d, + RC_PPE_NO_PROC_FOUND = FAPI2_COMP_ID | 0x1e, + RC_PERV_NO_PROC_FOUND = FAPI2_COMP_ID | 0x1f, + RC_CAPP_NO_PROC_FOUND = FAPI2_COMP_ID | 0x20, + RC_SBE_NO_PROC_FOUND = FAPI2_COMP_ID | 0x21, + + // HWP generated errors + RC_HWP_GENERATED_ERROR = HWPF_COMP_ID | 0x0f, + + }; + + /** + * @brief Defines the HWPF error log user detail data sections + */ + enum fapi2UserDetailDataSubSection + { + HWPF_FAPI2_UDT_HWP_RCVALUE = 0x01, + HWPF_FAPI2_UDT_HWP_FFDC = 0x02, + HWPF_FAPI2_UDT_STEP_ERROR_DETAILS = 0x03, + }; +}; + +#endif // HWPF_FAPI2_REASONCODES_H_ diff --git a/src/include/usr/fapi2/plat_attr_override_sync.H b/src/include/usr/fapi2/plat_attr_override_sync.H new file mode 100644 index 000000000..6dca60bbe --- /dev/null +++ b/src/include/usr/fapi2/plat_attr_override_sync.H @@ -0,0 +1,258 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_attr_override_sync.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_attr_override_sync.H +/// +/// @brief Defines the AttrOverrideSync class that contains functions for +/// Attribute Override and Sync. +/// + +#ifndef PLATATTROVERRIDESYNC_H_ +#define PLATATTROVERRIDESYNC_H_ + +//****************************************************************************** +// Includes +//****************************************************************************** +#include <stdint.h> +#include <mbox/mboxif.H> +#include <targeting/common/attributeTank.H> +#include <pnor/pnorif.H> + +#include <attribute_ids.H> +#include <return_code.H> +#include <target.H> +#include <target_types.H> + + +//****************************************************************************** +// Interface +//****************************************************************************** +namespace TARGETING +{ + errlHndl_t getAttrOverrides(PNOR::SectionInfo_t &i_sectionInfo, + AttributeTank* io_tanks[AttributeTank::TANK_LAYER_LAST]); +} + +namespace fapi2 +{ + +// Forward references +class AttrOverrideSync; +//class Target; + +/** + * @brief Return the AttrOverrideSync Singleton. Other modules must call this + * rather than using Singleton<> + * + * @return Reference to the AttrOverrideSync Singleton + */ +AttrOverrideSync & theAttrOverrideSync(); + +/** + * @class AttrOverrideSync + * + * This class contains the FAPI Attribute Override and Sync tanks. It provides + * functions to: + * - Monitor for incoming attribute override/sync messages from the FSP + * - Send attribute override/syncs to the FSP + * - Return any attribute override on an attribute get + * - Cancel any non-const attribute override and save the attribute in the sync + * tank on an attribute set + */ +class AttrOverrideSync +{ +public: + /** + * @brief Allow a debug tool to directly access the override tank + */ + friend void directOverride(); + + /** + * @brief Allow a attribute override to directly access the override tank + */ + friend errlHndl_t TARGETING::getAttrOverrides( + PNOR::SectionInfo_t &i_sectionInfo, + TARGETING::AttributeTank* + io_tanks[TARGETING::AttributeTank::TANK_LAYER_LAST]); + + /** + * @brief Maximum size of a direct attribute override + */ + static const size_t MAX_DIRECT_OVERRIDE_ATTR_SIZE_BYTES = 64; + + /** + * @brief Attribute Override/Sync Mailbox Message Type Constants + * These must be kept in sync with FSP firmware + */ + enum MAILBOX_MSG_TYPE + { + MSG_SET_OVERRIDES = MBOX::FIRST_UNSECURE_MSG + 0x10, // FSP<->Hb + MSG_CLEAR_ALL_OVERRIDES = MBOX::FIRST_UNSECURE_MSG + 0x11, // FSP<->Hb + MSG_SET_SYNC_ATTS = MBOX::FIRST_UNSECURE_MSG + 0x12, // FSP<--Hb + MSG_GET_OVERRIDES = MBOX::FIRST_UNSECURE_MSG + 0x13, // FSP<--Hb + }; + + /** + * @brief Default constructor + */ + AttrOverrideSync(); + + /** + * @brief Destructor + */ + ~AttrOverrideSync(); + + /** + * @brief Monitors for incoming attribute override messages from the FSP. + * This function never returns and must be called by a task + * specifically started to monitor for these messages + */ + void monitorForFspMessages(); + + /** + * @brief Sends Attribute Overrides and Syncs to the FSP + * + * This is called at the end of an IStep. For both FAPI/TARG tanks it: + * - Clears the FSP Attribute Overrides + * - Sends the Hostboot Attribute Overrides to the FSP + * - Sends the Hostboot Attribute Syncs to the FSP + */ + void sendAttrOverridesAndSyncsToFsp(); + + /** + * @brief Gets Attribute Overrides and Syncs from the FSP + * + * This is called at the start of a normal (non-istep) IPL if an attribute + * is set indicating that the FSP has attribute overrides in place + */ + void getAttrOverridesFromFsp(); + + /** + * @brief This function gets any Attribute Override on an attribute get + * + * This is called for those FAPI Attributes that do not map to Targeting + * attributes - their overrides live in the FAPI Attribute tanks. + * + * @param[in] i_attrId FAPI Attribute ID + * @param[in] i_pTarget Pointer to FAPI Target + * @param[in] o_pVal Pointer to attribute value + * + * @return true if an override exists and was written to o_pVal + */ + bool getAttrOverride(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>* i_pTarget, + void * o_pVal) const; + + /** + * @brief This function gets any Attribute Override on an attribute get + * + * This is a wrapper that calls getAttrOverride on the AttrOverrideSync + * singleton, it should be called by external modules to avoid the + * performance penalty of calling theAttrOverrideSync() then getAttrOverride + * + * @param[in] i_attrId FAPI Attribute ID + * @param[in] i_pTarget Reference to FAPI2 Target + * @param[in] o_pVal Pointer to attribute value + * + * @return true if an override exists and was written to o_pVal + */ + static bool getAttrOverrideFunc(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>& i_pTarget, + void * o_pVal); + + /** + * @brief This function performs the actions required on an attribute set + * + * This is called for those FAPI Attributes that do not map to Targeting + * attributes - their overrides/syncs live in the FAPI Attribute tanks. + * + * - Any non-const attribute override is cleared + * - The attribute is saved to be synced to Cronus (if Cronus Sync enabled) + * + * @param[in] i_attrId FAPI Attribute ID + * @param[in] i_pTarget Pointer to FAPI Target + * @param[in] i_size Size of attribute value + * @param[in] i_pVal Pointer to attribute value + */ + void setAttrActions(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>* i_pTarget, + const uint32_t i_size, + const void * i_pVal); + + /** + * @brief This function performs the actions required on an attribute set + * + * This is a wrapper that calls setAttrActions on the AttrOverrideSync + * singleton, it should be called by external modules to avoid the + * performance penalty of calling theAttrOverrideSync() then setAttrActions + * + * @param[in] i_attrId FAPI Attribute ID + * @param[in] i_pTarget Reference to FAPI2 Target + * @param[in] i_size Size of attribute value + * @param[in] i_pVal Pointer to attribute value + */ + static void setAttrActionsFunc(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>& i_pTarget, + const uint32_t i_size, + const void * i_pVal); + +private: + + /** + * @brief Utility function that sends attributes to the FSP + * + * This function frees the allocated memory in the input vector of chunks + * and empties the vector + * + * @param[in] i_msgType Message type (ID) to send + * @param[in] i_tankLayer Tank Layer to send attribute to + * @param[io] io_attributes Attributes to send. + * + * @return error log handle + */ + static errlHndl_t sendAttrsToFsp( + const MAILBOX_MSG_TYPE i_msgType, + const TARGETING::AttributeTank::TankLayer i_tankLayer, + std::vector<TARGETING::AttributeTank::AttributeSerializedChunk> & + io_attributes); + + /** + * @brief Utility function that gets the target type of a FAPI Target as + * used in an attribute tank + * + * @param[in] i_pTarget Pointer to FAPI Target (NULL = system) + * + * @return Target Type + */ + static uint32_t getTargetType(const Target<TARGET_TYPE_ALL>* i_pTarget); + + // The FAPI Attribute Tanks + TARGETING::AttributeTank iv_overrideTank; + TARGETING::AttributeTank iv_syncTank; +}; + +} // namespace fapi2 + +#endif // PLATATTROVERRIDESYNC_H_ diff --git a/src/include/usr/fapi2/plat_attribute_service.H b/src/include/usr/fapi2/plat_attribute_service.H new file mode 100644 index 000000000..ec9c5bdca --- /dev/null +++ b/src/include/usr/fapi2/plat_attribute_service.H @@ -0,0 +1,49 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_attribute_service.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file src/include/usr/hwpf/plat/plat_attribute_service.H +/// +/// @brief Defines the specialized platform attribute access functions +/// +/// Note that platform code must provide the code. +/// + +#ifndef PLATATTRIBUTESERVICE_H_ +#define PLATATTRIBUTESERVICE_H_ + +#include <attribute_service.H> +namespace fapi2 +{ + +namespace platAttrSvc +{ + + // Currently empty because no specialized functions for Hostboot. + +} // namespace platAttrSvc + +} // namespace fapi2 + +#endif // PLATATTRIBUTESERVICE_H_ diff --git a/src/include/usr/fapi2/plat_chip_ec_feature.H b/src/include/usr/fapi2/plat_chip_ec_feature.H new file mode 100644 index 000000000..018f0d0c6 --- /dev/null +++ b/src/include/usr/fapi2/plat_chip_ec_feature.H @@ -0,0 +1,41 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_chip_ec_feature.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_hwp_executor.H +/// +/// @brief Defines the specialized platform HWP Executor Macro. +/// +/// The PLAT HWP Executor macro is called by the FAPI HWP Executor macro when a +/// PLAT invoker function or a HWP wants to execute a HWP. Each platform can +/// modify the macro to do any platform specific work to execute the HWP (e.g. +/// dlopening a shared library) +/// + +#ifndef PLATCHIPECFEATURE_H_ +#define PLATCHIPECFEATURE_H_ + +// Currently empty because no specialzation for Hostboot + +#endif // PLATCHIPECFEATURE_H_ diff --git a/src/include/usr/fapi2/plat_error_scope.H b/src/include/usr/fapi2/plat_error_scope.H new file mode 100644 index 000000000..1b47aa40d --- /dev/null +++ b/src/include/usr/fapi2/plat_error_scope.H @@ -0,0 +1,65 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_error_scope.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/** + * @file plat_error_scope.H + * @brief platform definitions which create a scope for automatic error handling + */ + +#ifndef __FAPI2_PLAT_ERROR_SCOPE__ +#define __FAPI2_PLAT_ERROR_SCOPE__ + +/// @cond +#define PLAT_FAPI_TRY_NO_TRACE( __operation__ ) \ + if ((fapi2::current_err = (__operation__)) != fapi2::FAPI2_RC_SUCCESS) \ + { \ + goto fapi_try_exit; \ + } + +#define PLAT_FAPI_TRY_TRACE( __operation__, ... ) \ + if ((fapi2::current_err = (__operation__)) != fapi2::FAPI2_RC_SUCCESS) \ + { \ + FAPI_ERR(__VA_ARGS__); \ + goto fapi_try_exit; \ + } + +/// +/// @brief Assert a conditional is true. +/// If it is not, the FFDC gathering function is called and the +/// trace is output as a FAPI error trace. +/// @param[in] __conditional__ the condition to assert +/// @param[in] __ffdc__ the FFDC gathering function +/// @param[in] ... varargs, as input to FAPI_ERR +/// +#define PLAT_FAPI_ASSERT( __conditional__, __ffdc__, ... ) \ + if (! (__conditional__)) \ + { \ + (__ffdc__).execute(); \ + FAPI_ERR(__VA_ARGS__); \ + goto fapi_try_exit; \ + } + +/// @endcond + +#endif diff --git a/src/include/usr/fapi2/plat_hw_access.H b/src/include/usr/fapi2/plat_hw_access.H new file mode 100644 index 000000000..febfb5c3e --- /dev/null +++ b/src/include/usr/fapi2/plat_hw_access.H @@ -0,0 +1,821 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_hw_access.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// @file plat_hw_access.H +/// +/// @brief Defines hardware-access functions for the platform layer. +/// Hardware procedure writers will not call these functions. +/// These platform entry points are called by fapi2 functions from +/// hw_access.H, output scand traces common to all platforms. +/// These functions have the same argument signatures as the +/// fapi-level functions, but the function names her start with +/// "plat." +/// + +#ifndef PLATHWACCESS_H_ +#define PLATHWACCESS_H_ + +#include <stdint.h> +#include <errl/errlentry.H> +#include <devicefw/userif.H> +#include <return_code.H> +#include <buffer.H> +#include <target.H> +#include <target_types.H> +#include <hw_access_def.H> +#include <plat_utils.H> + +namespace fapi2 +{ + +//------------------------------------------------------------------------------ +// HW Communication Functions to be implemented at the platform layer. +//------------------------------------------------------------------------------ + +/// +/// @brief Platform-level implementation called by getScom() +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address SCOM register address to read from. +/// @param[out] o_date Buffer that holds data read from HW target. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode platGetScom(const Target<K>& i_target, + const uint64_t i_address, + buffer<uint64_t>& o_data) +{ + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + FAPI_DBG(ENTER_MRK "platGetScom"); + // Note: Trace is placed here in plat code because PPE doesn't support + // trace in common fapi2_hw_access.H + bool l_traceit = platIsScanTraceEnabled(); + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + //TODO: RTC 124195 - Support target::toEcmdString() for SCAN trace + const char* tmpScomStr = "TargetString"; + + // Perform SCOM read + size_t l_size = sizeof(uint64_t); + l_err = deviceRead(l_target, + &o_data(), + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platGetScom: deviceRead returns error!"); + FAPI_ERR("fapiGetScom failed - Target %s, Addr %.16llX", + tmpScomStr, i_address); +// Add the error log pointer as data to the ReturnCode +//@TODO RTC:143127 Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + } + + if (l_traceit) + { + uint64_t l_data = (uint64_t)o_data; + FAPI_SCAN("TRACE : GETSCOM : %s : %.16llX %.16llX", + tmpScomStr, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platGetScom"); + return l_rc; +} + +/// @brief Platform-level implementation called by putScom() +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address SCOM register address to write to. +/// @param[in] i_data Buffer that holds data to write into address. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode platPutScom(const Target<K>& i_target, + const uint64_t i_address, + const buffer<uint64_t> i_data) +{ + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + FAPI_DBG(ENTER_MRK "platPutScom"); + // Note: Trace is placed here in plat code because PPE doesn't support + // trace in common fapi2_hw_access.H + bool l_traceit = platIsScanTraceEnabled(); + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + //TODO: RTC 124195 - Support target::toEcmdString() for SCAN trace + const char* tmpScomStr = "TargetString"; + + // Perform SCOM write + size_t l_size = sizeof(uint64_t); + uint64_t l_data = static_cast<uint64_t>(i_data); + l_err = deviceWrite(l_target, + &l_data, + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platPutScom: deviceRead returns error!"); + FAPI_ERR("platPutScom failed - Target %s, Addr %.16llX", + tmpScomStr, i_address); +// Add the error log pointer as data to the ReturnCode +//@TODO RTC:143127 Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + } + + if (l_traceit) + { + FAPI_SCAN("TRACE : PUTSCOM : %s : %.16llX %.16llX", + tmpScomStr, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platPutScom"); + return l_rc; +} + +/// @brief Platform-level implementation called by putScomUnderMask() +/// @tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address SCOM register address to write to. +/// @param[in] i_data Buffer that holds data to write into address. +/// @param[in] i_mask Buffer that holds the mask value. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode platPutScomUnderMask(const Target<K>& i_target, + const uint64_t i_address, + const buffer<uint64_t> i_data, + const buffer<uint64_t> i_mask) +{ + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + FAPI_DBG(ENTER_MRK "platPutScomUnderMask"); + // Note: Trace is placed here in plat code because PPE doesn't support + // trace in common fapi2_hw_access.H + bool l_traceit = platIsScanTraceEnabled(); + + //TODO: RTC 124195 - Support target::toEcmdString() for SCAN trace + const char* tmpScomStr = "TargetString"; + + do + { + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + // Get current value from HW + uint64_t l_data = 0; + size_t l_size = sizeof(uint64_t); + l_err = deviceRead(l_target, + &l_data, + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platPutScomUnderMask: deviceRead returns error!"); +// Add the error log pointer as data to the ReturnCode +//@TODO RTC:143127 Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Calculate new value to write to reg + uint64_t l_inMaskInverted = ~i_mask; // Write mask inverted + uint64_t l_newMask = (i_data & i_mask); // Retain set data bits + + // l_data = current data set bits + l_data &= l_inMaskInverted; + + // l_data = current data set bit + set mask bits + l_data |= l_newMask; + + // Write new value + l_err = deviceWrite(l_target, + &l_data, + l_size, + DEVICE_SCOM_ADDRESS(i_address)); + if (l_err) + { + FAPI_ERR("platPutScomUnderMask: deviceWrite returns error!"); +// Add the error log pointer as data to the ReturnCode +//@TODO RTC:143127 Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + } while (0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("platPutScomUnderMask failed - Target %s, Addr %.16llX", + tmpScomStr, i_address); + } + + if( l_traceit ) + { + uint64_t l_data = i_data; + uint64_t l_mask = i_mask; + FAPI_SCAN( "TRACE : PUTSCOMMASK : %s : %.16llX %.16llX %.16llX", + tmpScomStr, + i_address, + l_data, + l_mask); + } + + FAPI_DBG(EXIT_MRK "platPutScomUnderMask"); + return l_rc; +} + +/// +/// @brief Platform-level implementation of modifyScom() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address SCOM address to modify. +/// @param[out] i_data 64-bit buffer that holds data to modify. +/// @param[in] i_modifyMode The modify mode (or/and/xor). +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode platModifyScom(const Target<K>& i_target, + const uint32_t i_address, + const buffer<uint32_t> i_data, + const fapi2::ChipOpModifyMode i_modifyMode) +{ + + // --------------- Will implement when needed -------------------- + + FAPI_DBG(ENTER_MRK "platModifyScom"); + ReturnCode l_rc; + + FAPI_ERR("platModifyScom: Error: Hostboot not yet support modifyScom function!"); + +// Add the error log pointer as data to the ReturnCode +//@TODO RTC:143127 Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + + FAPI_DBG(EXIT_MRK "platModifyScom"); + return l_rc; +} + +/// +/// @brief Verify target of a cfam access +/// We can't access the cfam engine of the master processor. +/// Only allow access to the other processors. +/// This function will return an error if the input target is +/// the boot processor. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address CFAM address to read from. +/// @return errlHndl_t +/// +template< TargetType K > +static errlHndl_t verifyCfamAccessTarget(const Target<K>& i_target, + const uint32_t i_address) +{ + errlHndl_t l_err = NULL; + + // Can't access cfam engine on the master processor + if (i_target.getType() == fapi2::TARGET_TYPE_PROC_CHIP) + { + TARGETING::Target* l_pMasterProcChip = NULL; + TARGETING::targetService(). + masterProcChipTargetHandle( l_pMasterProcChip ); + + TARGETING::Target* l_pTarget = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + if( l_pMasterProcChip == l_pTarget ) + { + FAPI_ERR("verifyCfamAccessTarget: Attempt to access CFAM register %.8X on the master processor chip", + i_address); + } + } + return l_err; +} + +/// +/// @brief Internal function that gets the chip target for cfam access +/// HW procedures may pass in non-chip targets (such as MBA or +/// MBS as a target), so we need to find the parent chip in order +/// to pass it to the device driver. +/// @param[in] i_target HW target to operate on. +/// @param[out] o_chipTarget The output chip target. +/// @return errlHndl_t +/// +static errlHndl_t getCfamChipTarget(const TARGETING::Target* i_target, + TARGETING::Target*& o_chipTarget) +{ + errlHndl_t l_err = NULL; + + // Default to input target + o_chipTarget = const_cast<TARGETING::Target*>(i_target); + + // Check to see if this is a chiplet + if (i_target->getAttr<TARGETING::ATTR_CLASS>() == TARGETING::CLASS_UNIT) + { + // Look for its chip parent + TARGETING::PredicateCTM l_chipClass(TARGETING::CLASS_CHIP); + TARGETING::TargetHandleList l_list; + TARGETING::TargetService& l_targetService = TARGETING::targetService(); + (void) l_targetService.getAssociated( + l_list, + i_target, + TARGETING::TargetService::PARENT, + TARGETING::TargetService::ALL, + &l_chipClass); + + if ( l_list.size() == 1 ) + { + o_chipTarget = l_list[0]; + } + else + { + // Something is wrong here, can't have more than one parent chip + FAPI_ERR("getCfamChipTarget: Invalid number of parent chip for this target chiplet - # parent chips %d", l_list.size()); + } + } + return l_err; +} + +/// +/// @brief Platform-level implementation called by getCfamRegister() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address CFAM address to read from. +/// @param[out] o_data 32-bit buffer that holds data read from HW target. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode platGetCfamRegister(const Target<K>& i_target, + const uint32_t i_address, + buffer<uint32_t>& o_data) +{ + FAPI_DBG(ENTER_MRK "platGetCfamRegister"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + bool l_traceit = platIsScanTraceEnabled(); + + //TODO: RTC 124195 - Support target::toEcmdString() for SCAN trace + const char* tmpScomStr = "TargetString"; + + do + { + // Can't access cfam engine on master processor + l_err = verifyCfamAccessTarget(i_target,i_address); + if (l_err) + { + FAPI_ERR("platGetCfamRegister: verifyCfamAccessTarget returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127 Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + // Get the chip target if l_target is not a chip + TARGETING::Target* l_myChipTarget = NULL; + l_err = getCfamChipTarget(l_target, l_myChipTarget); + if (l_err) + { + FAPI_ERR("platGetCfamRegister: getCfamChipTarget returns error!"); + FAPI_ERR("fapiGetCfamRegister failed - Target %s, Addr %.8X", + tmpScomStr, i_address); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Perform CFAM read via FSI + // Address needs to be multiply by 4 because register addresses are + // word offsets but the FSI addresses are byte offsets. + // However, we need to preserve the engine's offset of 0x0C00 and 0x1000 + uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00); + size_t l_size = sizeof(uint32_t); + l_err = deviceRead(l_myChipTarget, + &o_data(), + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platGetCfamRegister: deviceRead returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + } while(0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("fapiGetCfamRegister failed - Target %s, Addr %.8X", + tmpScomStr, i_address); + } + + if( l_traceit ) + { + uint32_t l_data = (uint32_t)o_data; + FAPI_SCAN( "TRACE : GETCFAMREG : %s : %.8X %.8X", + tmpScomStr, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platGetCfamRegister"); + return l_rc; +} + +/// +/// @brief Platform-level implementation called by putCfamRegister() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address CFAM address to write to. +/// @param[out] i_data 32-bit buffer that holds data to write into address. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode platPutCfamRegister(const Target<K>& i_target, + const uint32_t i_address, + const buffer<uint32_t> i_data) +{ + FAPI_DBG(ENTER_MRK "platPutCfamRegister"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + bool l_traceit = platIsScanTraceEnabled(); + + //TODO: RTC 124195 - Support target::toEcmdString() for SCAN trace + const char* tmpScomStr = "TargetString"; + + do + { + // Can't access cfam engine on master processor + l_err = verifyCfamAccessTarget(i_target,i_address); + if (l_err) + { + FAPI_ERR("platPutCfamRegister: verifyCfamAccessTarget returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + TARGETING::Target* l_myChipTarget = NULL; + // Get the chip target if l_target is not a chip + l_err = getCfamChipTarget(l_target, l_myChipTarget); + if (l_err) + { + FAPI_ERR("platPutCfamRegister: getCfamChipTarget returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Perform CFAM write via FSI + // Address needs to be multiply by 4 because register addresses are word + // offsets but the FSI addresses are byte offsets + // However, we need to preserve the engine's offset of 0x0C00 and 0x1000 + uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00); + size_t l_size = sizeof(uint32_t); + uint32_t l_data = static_cast<uint32_t>(i_data); + l_err = deviceWrite(l_myChipTarget, + &l_data, + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platPutCfamRegister: deviceWrite returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + } while (0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("platPutCfamRegister failed - Target %s, Addr %.8X", + tmpScomStr, i_address); + } + + if( l_traceit ) + { + uint32_t l_data = i_data; + FAPI_SCAN( "TRACE : PUTCFAMREG : %s : %.8X %.8X", + tmpScomStr, + i_address, + l_data); + } + + FAPI_DBG(EXIT_MRK "platPutCfamRegister"); + return l_rc; +} + + +/// @brief Modifying input 32-bit data with the specified mode +/// This method modify 32-bit input data (io_modifiedData) by applying the +/// specified modify mode along with the input data (i_origData). +/// +/// @param[in] i_modifyMode Modification mode +/// @param[in] i_origData 32-bit data to be used for modification +/// @param[out] io_modifiedData 32-bit data to be modified +/// +/// @return void +/// +static void platProcess32BitModifyMode( + const fapi2::ChipOpModifyMode i_modifyMode, + const buffer<uint32_t> i_origDataBuf, + buffer<uint32_t>& io_modifiedData) +{ + +//@TODO RTC:143118 This should be a switch statement + + // OR operation + if (fapi2::CHIP_OP_MODIFY_MODE_OR == i_modifyMode) + { + io_modifiedData |= i_origDataBuf; + } + // AND operation + else if (fapi2::CHIP_OP_MODIFY_MODE_AND == i_modifyMode) + { + io_modifiedData &= i_origDataBuf; + } + // Must be XOR operation + else + { + io_modifiedData ^= i_origDataBuf; + } + + return; +} + +/// +/// @brief Platform-level implementation of modifyCfamRegister() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address CFAM register address to modify. +/// @param[out] i_data 32-bit buffer that holds data to modify. +/// @param[in] i_modifyMode The modify mode (or/and/xor). +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode platModifyCfamRegister(const Target<K>& i_target, + const uint32_t i_address, + const buffer<uint32_t> i_data, + const fapi2::ChipOpModifyMode i_modifyMode) +{ + FAPI_DBG(ENTER_MRK "platModifyCfamRegister"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + bool l_traceit = platIsScanTraceEnabled(); + + //TODO: RTC 124195 - Support target::toEcmdString() for SCAN trace + const char* tmpScomStr = "TargetString"; + + do + { + // Can't access cfam engine on master processor + l_err = verifyCfamAccessTarget(i_target,i_address); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: verifyCfamAccessTarget returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + // Get the chip target if l_target is not a chip + TARGETING::Target* l_myChipTarget = NULL; + l_err = getCfamChipTarget(l_target, l_myChipTarget); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: getCfamChipTarget returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Read current value + // Address needs to be multiply by 4 because register addresses are word + // offsets but the FSI addresses are byte offsets. + // However, we need to preserve the engine's offset of 0x0C00 and 0x1000 + uint64_t l_addr = ((i_address & 0x003F) << 2) | (i_address & 0xFF00); + buffer<uint32_t> l_data = 0; + size_t l_size = sizeof(uint32_t); + l_err = deviceRead(l_myChipTarget, + &l_data(), + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: deviceRead returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + // Applying modification + platProcess32BitModifyMode(i_modifyMode, i_data, l_data); + + // Write back + l_err = deviceWrite(l_target, + &l_data(), + l_size, + DEVICE_FSI_ADDRESS(l_addr)); + if (l_err) + { + FAPI_ERR("platModifyCfamRegister: deviceWrite returns error!"); + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + break; + } + + } while (0); + + if (l_rc != fapi2::FAPI2_RC_SUCCESS) + { + FAPI_ERR("platModifyCfamRegister failed - Target %s, Addr %.8X", + tmpScomStr, i_address); + } + + if( l_traceit ) + { + // get string representation of the modify mode + const char * l_pMode = NULL; + + if (i_modifyMode == fapi2::CHIP_OP_MODIFY_MODE_OR) + { + l_pMode = "OR"; + } + else if (i_modifyMode == fapi2::CHIP_OP_MODIFY_MODE_AND) + { + l_pMode = "AND"; + } + else if (i_modifyMode == fapi2::CHIP_OP_MODIFY_MODE_XOR) + { + l_pMode = "XOR"; + } + else + { + l_pMode = "?"; + } + + uint32_t l_data = (uint32_t)i_data; + FAPI_SCAN( "TRACE : MODCFAMREG : %s : %.8X %.8X %s", + tmpScomStr, + i_address, + l_data, + l_pMode ); + } + + FAPI_DBG(EXIT_MRK "platModifyCfamRegister"); + return l_rc; +} + +//@TODO RTC:126630 getRing is not yet supported + +#if 0 + +/// +/// @brief Platform-level implementation called by fapiGetRing() +/// Hardware procedures writers will not call this function. +/// @Tparam K template parameter, passed in target. +/// @param[in] i_target HW target to operate on. +/// @param[in] i_address Ring address to read from. +/// @param[out] o_data Buffer that holds ring data read from HW target. +/// @param[in] i_ringMode Ring operation mode. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +/// +template< TargetType K > +inline ReturnCode platGetRing(const Target<K>& i_target, + const scanRingId_t i_address, + variable_buffer& o_data, + const RingMode i_ringMode = 0) +{ + FAPI_DBG(ENTER_MRK "platGetRing"); + ReturnCode l_rc; + errlHndl_t l_err = NULL; + + // Extract the component pointer + TARGETING::Target* l_target = + reinterpret_cast<TARGETING::Target*>(i_target.get()); + + // Output buffer must be set to ring's len by user + uint64_t l_ringLen = o_data.getBitLength(); + uint64_t l_flag = platGetDDScanMode(i_ringMode); + size_t l_size = o_data.getByteLength(); + l_err = deviceRead(l_target, + ecmdDataBufferBaseImplementationHelper::getDataPtr(&o_data), + l_size, + DEVICE_SCAN_ADDRESS(i_address, l_ringLen, l_flag)); + if (l_err) + { + // Add the error log pointer as data to the ReturnCode + //TODO RTC:143127: Need fapi2 support in ReturnCode class + //l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + } + + FAPI_DBG(EXIT_MRK "platGetRing"); + return l_rc; +} + + +/// @brief Platform-level implementation called by fapiPutRing() +/// Hardware procedures writers will not call this function. +/// @tparam K template parameter, passed in target. +/// @param[in] i_target Target to operate on. +/// @param[in] i_address Ring address to write to. +/// @param[in] i_data Buffer that contains RS4 compressed ring data +/// to write into address +/// @param[in] i_ringMode Ring operation mode. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode platPutRing(const Target<K>& i_target, + const scanRingId_t i_address, + variable_buffer& i_data, + const RingMode i_ringMode = 0) +{ +} + +/// @brief Platform-level implementation called by fapiModifyRing() +/// @tparam K template parameter, passed in target. +/// @param[in] i_target Target to operate on. +/// @param[in] i_address Ring address to modify. +/// @param[in] i_data Buffer that contains RS4 compressed ring data +/// to be modified. +/// @param[in] i_modifyMode The modify mode (or/and/xor) +/// @param[in] i_ringMode Ring operation mode. +/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. +template< TargetType K > +inline ReturnCode modifyRing(const Target<K>& i_target, + const scanRingId_t i_address, + variable_buffer& i_data, + const ChipOpModifyMode i_modifyMode, + const RingMode i_ringMode = 0) +{ +} + +#endif // End if 0 + +// -------------------------------------------------------------------------- +// NOTE: +// No spy access interface as HB doesn't allow spy access. +// -------------------------------------------------------------------------- + + +} // End namespace + +#endif // PLATHWACCESS_H_ diff --git a/src/include/usr/fapi2/plat_hwp_executor.H b/src/include/usr/fapi2/plat_hwp_executor.H new file mode 100644 index 000000000..ebffe2f3c --- /dev/null +++ b/src/include/usr/fapi2/plat_hwp_executor.H @@ -0,0 +1,58 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_hwp_executor.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_hwp_executor.H +/// +/// @brief Defines the specialized platform HWP Executor Macro. +/// +/// The PLAT HWP Executor macro is called by the FAPI HWP Executor macro when a +/// PLAT invoker function or a HWP wants to execute a HWP. Each platform can +/// modify the macro to do any platform specific work to execute the HWP (e.g. +/// dlopening a shared library) +/// + +// plat_hwp_executor.H (platform owned file) - Platform specialization +// of functions. +// +// fapi2_hwp_executor.H (common file) - contains the templates +// and calls a required macro +// for non-specialized methods. +// +// hw_executor.H (platform owned file) - Platform implementation of +// functions defined in +// fapi2_hwp_executor.H above. +// -- Include order -- +// procedure.C +// #include <hwp_executor.H> +// target.H +// #include plat_hwp_executor.H +// #include fapi2_hwp_executor.H + +#ifndef PLATHWPEXECUTOR_H_ +#define PLATHWPEXECUTOR_H_ + +// Currently empty because no specialzation for Hostboot + +#endif // PLATHWPEXECUTOR_H_ diff --git a/src/include/usr/fapi2/plat_hwp_invoker.H b/src/include/usr/fapi2/plat_hwp_invoker.H new file mode 100644 index 000000000..0d55c3e01 --- /dev/null +++ b/src/include/usr/fapi2/plat_hwp_invoker.H @@ -0,0 +1,67 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_hwp_invoker.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/** + * @file plat_hwp_invoker.H + * + * @brief Defines the HostBoot HWP invoker macro and a function to convert a + * fapi::ReturnCode to an error log + */ + +/// +/// @file src/include/usr/hwpf/plat/plat_hwp_invoker.H +/// +/// @brief Defines the HostBoot FAPI2 HWP invoker macro and a function to +/// convert a fapi2::ReturnCode to an error log +/// +/// Note that platform code must provide the code. +/// + +#ifndef PLATHWPINVOKER_H_ +#define PLATHWPINVOKER_H_ + +#include <return_code.H> +#include <plat_utils.H> + +/** + * @brief HWP Invoker macro + * + * This macro is called by HostBoot PLAT code to invoke a HW Procedure (HWP). + * The caller must create any necessary fapi::Targets and pass them as + * parameters. This macro simply calls the FAPI HWP executor macro and converts + * the returned fapi::Return code to a HostBoot error log + * + * ERRHNDL - errlHndl_t + * FUNC - HWP function name + * _args_... - Any additional arguments that the HWP requires + */ + +#define FAPI_INVOKE_HWP(ERRHNDL, FUNC, _args_...) \ + {\ + fapi2::ReturnCode l_rc; \ + FAPI_EXEC_HWP(l_rc, FUNC, ##_args_); \ + ERRHNDL = fapi2::rcToErrl(l_rc);\ + } + +#endif // PLATHWPINVOKER_H_ diff --git a/src/include/usr/fapi2/plat_target.H b/src/include/usr/fapi2/plat_target.H new file mode 100644 index 000000000..2b98b168a --- /dev/null +++ b/src/include/usr/fapi2/plat_target.H @@ -0,0 +1,41 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_target.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_target.H +/// @brief Define FAPI2 target functions for the platform layer. +/// + +#ifndef __FAPI2_PLAT_TARGET__ +#define __FAPI2_PLAT_TARGET__ + +// HB platform support +#include <targeting/common/target.H> + +namespace fapi2 +{ + typedef TARGETING::Target* plat_target_handle_t; +} // End namespace fapi2 + +#endif // __FAPI2_PLAT_TARGET__ diff --git a/src/include/usr/fapi2/plat_trace.H b/src/include/usr/fapi2/plat_trace.H new file mode 100644 index 000000000..9d03adcff --- /dev/null +++ b/src/include/usr/fapi2/plat_trace.H @@ -0,0 +1,43 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_trace.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_trace.H +/// @brief Defines the FAPI2 trace macros. +/// +/// Note that platform code must provide the implementation. +/// +/// FAPI has provided a default implementation. Platform code must +/// provide an alternate implementation if needed. +/// + +#ifndef PLAT_TRACE_H_ +#define PLAT_TRACE_H_ + +// Use the same macro from FAPI1 +#include <fapiPlatTrace.H> + +static const uint32_t MAX_ECMD_STRING_LEN = 64; + +#endif // PLAT_TRACE_H_ diff --git a/src/include/usr/fapi2/plat_utils.H b/src/include/usr/fapi2/plat_utils.H new file mode 100644 index 000000000..ce822faa6 --- /dev/null +++ b/src/include/usr/fapi2/plat_utils.H @@ -0,0 +1,63 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/plat_utils.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_utils.H +/// +/// @brief FAPI2 utility functions +/// +/// Note that platform code must provide the implementation. +/// + +#ifndef PLAT_UTILS_H_ +#define PLAT_UTILS_H_ + +#include <return_code.H> + +namespace fapi2 +{ + +/// +/// @brief This function answers the question, is scand tracing turned on? +/// The implementation of this function is specific to the platform. +/// +/// @returns Boolean indication +/// +bool platIsScanTraceEnabled(); + +/// +/// @brief Converts a fapi2::ReturnCode to a HostBoot PLAT error log +/// +/// @param[io] io_rc Reference to ReturnCode (set to success after function) +/// @param[in] i_sev Error log severity defaulted to unrecoverable +/// +/// @return errlHndl_t (NULL if Return Code contained success) +/// +errlHndl_t rcToErrl(ReturnCode & io_rc, + ERRORLOG::errlSeverity_t i_sev = + ERRORLOG::ERRL_SEV_UNRECOVERABLE); + +} // End namespace fapi2 + +#endif // PLAT_UTILS_H_ diff --git a/src/include/usr/fapi2/target.H b/src/include/usr/fapi2/target.H new file mode 100644 index 000000000..b783a42e5 --- /dev/null +++ b/src/include/usr/fapi2/target.H @@ -0,0 +1,336 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/fapi2/target.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// @file target.H +/// +/// @brief Defines the platform target functions that needs to be +/// specialized for platform implementation. +/// +/** + * @file target.H + * @brief platform specializations for fapi2 targets + */ + +#ifndef __FAPI2_TARGET__ +#define __FAPI2_TARGET__ + +#include <plat_target.H> +#include <stdio.h> +#include <stdint.h> +#include <vector> +#include <fapi2_target.H> +#include <target_types.H> + +// HB platform support +#include <fapiPlatTrace.H> +#include <targeting/common/target.H> +#include <targeting/common/commontargeting.H> +#include <targeting/common/utilFilter.H> + +namespace fapi2 +{ + +/// +/// @brief Assignment Operator. +/// @param[in] i_right Reference to Target to assign from. +/// @return Reference to 'this' Target +/// +template<TargetType K, typename V> +Target<K, V>& Target<K, V>::operator=(const Target& i_right) +{ iv_handle = i_right.iv_handle; return *this; } + +/// +/// @brief Equality Comparison Operator +/// @param[in] i_right Reference to Target to compare. +/// @return bool. True if equal. +/// @note Platforms need to define this so that the physical +/// targets are determined to be equivilent rather than just the handles +/// +template<TargetType K, typename V> +bool Target<K, V>::operator==(const Target& i_right) const +{ return i_right.iv_handle == iv_handle; } + +/// +/// @brief Inquality Comparison Operator +/// @param[in] i_right Reference to Target to compare. +/// @return bool. True if not equal. +/// @note Platforms need to define this so that the physical +/// targets are determined to be equivilent rather than just the handles +/// +template<TargetType K, typename V> +bool Target<K, V>::operator!=(const Target& i_right) const +{ return i_right.iv_handle != iv_handle; } + +/// +/// @brief This function takes in a FAPI2 Type and returns the corresponding +/// TARGETING::Target type +/// +/// @param[in] i_fapi2Type +/// +/// @returns TARGETTING::Type equivelent to fapi2 type +inline TARGETING::TYPE convertFapi2TypeToTargeting(fapi2::TargetType i_T) +{ + TARGETING::TYPE o_targetingType = TARGETING::TYPE_NA; + + switch (i_T) + { + case fapi2::TARGET_TYPE_NONE: + o_targetingType = TARGETING::TYPE_NA; + break; + case fapi2::TARGET_TYPE_SYSTEM: + o_targetingType = TARGETING::TYPE_SYS; + break; + case fapi2::TARGET_TYPE_DIMM: + o_targetingType = TARGETING::TYPE_DIMM; + break; + case fapi2::TARGET_TYPE_PROC_CHIP: + o_targetingType = TARGETING::TYPE_PROC; + break; + case fapi2::TARGET_TYPE_MEMBUF_CHIP: + o_targetingType = TARGETING::TYPE_MEMBUF; + break; + case fapi2::TARGET_TYPE_EX: + o_targetingType = TARGETING::TYPE_EX; + break; + case fapi2::TARGET_TYPE_MBA: + o_targetingType = TARGETING::TYPE_MBA; + break; + case fapi2::TARGET_TYPE_MCS: + o_targetingType = TARGETING::TYPE_MCS; + break; + case fapi2::TARGET_TYPE_XBUS: + o_targetingType = TARGETING::TYPE_XBUS; + break; + case fapi2::TARGET_TYPE_ABUS: + o_targetingType = TARGETING::TYPE_ABUS; + break; + case fapi2::TARGET_TYPE_L4: + o_targetingType = TARGETING::TYPE_L4; + break; + case fapi2::TARGET_TYPE_CORE: + o_targetingType = TARGETING::TYPE_CORE; + break; + case fapi2::TARGET_TYPE_EQ: + o_targetingType = TARGETING::TYPE_EQ; + break; + case fapi2::TARGET_TYPE_MCA: + o_targetingType = TARGETING::TYPE_MCA; + break; + case fapi2::TARGET_TYPE_MCBIST: + o_targetingType = TARGETING::TYPE_MCBIST; + break; + case fapi2::TARGET_TYPE_MI: + o_targetingType = TARGETING::TYPE_MI; + break; + case fapi2::TARGET_TYPE_CAPP: + o_targetingType = TARGETING::TYPE_CAPP; + break; + case fapi2::TARGET_TYPE_DMI: + o_targetingType = TARGETING::TYPE_DMI; + break; + case fapi2::TARGET_TYPE_OBUS: + o_targetingType = TARGETING::TYPE_OBUS; + break; + case fapi2::TARGET_TYPE_NV: + o_targetingType = TARGETING::TYPE_NVBUS; + break; + case fapi2::TARGET_TYPE_SBE: + o_targetingType = TARGETING::TYPE_SBE; + break; + case fapi2::TARGET_TYPE_PPE: + o_targetingType = TARGETING::TYPE_PPE; + break; + case fapi2::TARGET_TYPE_PERV: + o_targetingType = TARGETING::TYPE_PERV; + break; + case fapi2::TARGET_TYPE_PEC: + o_targetingType = TARGETING::TYPE_PEC; + break; + case fapi2::TARGET_TYPE_PHB: + o_targetingType = TARGETING::TYPE_PHB; + break; + default: + FAPI_ERR("Chiplet type not supported 0x%.8X!", i_T); + break; + } + + return o_targetingType; +} + + +/// +/// @brief Get this target's immediate parent +/// @tparam T The desired type of the parent target +/// @return Target<T> a target representing the parent +/// +template<TargetType K, typename V> +template<TargetType T> +inline Target<T> Target<K, V>::getParent(void) const +{ + //@TODO RTC:129517 fapi2 getParent + // For testing + return Target<T>(iv_handle); +} + +/// +/// @brief Get this target's children +/// @tparam T The desired type of child target +/// @param[in] i_state The desired TargetState of the children +/// @return std::vector<Target<T> > a vector of present/functional +/// children +/// @warning The children of EX's (cores) are expected to be returned +/// in order. That is, core 0 is std::vector[0]. +/// +template<TargetType K, typename V> +template< TargetType T> +inline std::vector<Target<T> > + Target<K, V>::getChildren(const TargetState i_state) const +{ + std::vector<Target<T>> l_children; + TARGETING::TYPE l_type = TARGETING::TYPE_NA; + TARGETING::TargetHandleList l_chipletList; + bool l_functional = (i_state & fapi2::TARGET_STATE_FUNCTIONAL)? true:false; + + FAPI_INF(ENTER_MRK "getChildren. Type 0x%08x State:0x%08x", T, i_state); + + switch (T) + { + //@TODO RTC:129517 to add the rest of the types + case TARGET_TYPE_EX_CHIPLET: l_type = TARGETING::TYPE_EX; break; + case TARGET_TYPE_MBA_CHIPLET: l_type = TARGETING::TYPE_MBA; break; + case TARGET_TYPE_MCS_CHIPLET: l_type = TARGETING::TYPE_MCS; break; + case TARGET_TYPE_XBUS_ENDPOINT: l_type = TARGETING::TYPE_XBUS; break; + case TARGET_TYPE_ABUS_ENDPOINT: l_type = TARGETING::TYPE_ABUS; break; + case TARGET_TYPE_L4: l_type = TARGETING::TYPE_L4; break; + default: + FAPI_ERR("getChildren: Chiplet type 0x%08x not supported 0x%08x", + T); + assert(false); + break; + } + + TARGETING::getChildChiplets(l_chipletList, + static_cast<TARGETING::Target*>(this->get()), + l_type, + l_functional); + + FAPI_INF("getChildren: l_functional 0x%.8X, l_type = 0x%.8X, ChipUnitId 0x%.8X", + l_functional, l_type, TARGETING::get_huid(this->get())); + FAPI_INF("getChildren: l_chipletList size %d", l_chipletList.size()); + + // Return fapi::Targets to the caller + for (TARGETING::TargetHandleList::const_iterator + chipletIter = l_chipletList.begin(); + chipletIter != l_chipletList.end(); + ++chipletIter) + { + TARGETING::HwasState l_state = + (*chipletIter)->getAttr<TARGETING::ATTR_HWAS_STATE>(); + + // HWPs/FAPI considers partial good chiplets as present, but + // firmware considers them not-present. Return all chiplets + // in the model when caller requests PRESENT + if ((fapi2::TARGET_STATE_FUNCTIONAL == i_state) && + !l_state.functional) + { + continue; + } + fapi2::Target<T> l_target(*chipletIter); + l_children.push_back(l_target); + } + FAPI_INF(EXIT_MRK "getChildren. %d results", l_children.size()); + + return l_children; +} + +/// +/// @brief Get the target at the other end of a bus - dimm included +/// @tparam T The type of the parent +/// @param[in] i_state The desired TargetState of the children +/// @return Target<T> a target representing the thing on the other end +/// @note Can be easily changed to a vector if needed +/// +template<TargetType K, typename V> +template<TargetType T> +inline Target<T> +Target<K, V>::getOtherEnd(const TargetState i_state) const +{ + //@TODO RTC:129517 + // Implementation note: cast to a composite of + // bus types and the compiler will check if this is + // a good function at compile time + return Target<T>(); +} + + +/// +/// @brief Return the string interpretation of this target +/// @tparam T The type of the target +/// @param[in] i_target Target<T> +/// @param[in] i_buffer buffer to write in to +/// @param[in] i_bsize size of the buffer +/// @return void +/// @post The contents of the buffer is replaced with the string +/// representation of the target +/// +template< TargetType T > +inline void toString(const Target<T>& i_target, char* i_buffer, size_t i_bsize) +{ + snprintf(i_buffer, i_bsize, "Target 0x%lx/0x%x", i_target.get(), T); +} + +/// +/// @brief Return the string interpretation of this target +/// @tparam T The type of the target +/// @param[in] A pointer to the Target<T> +/// @param[in] i_buffer buffer to write in to +/// @param[in] i_bsize size of the buffer +/// @return void +/// @post The contents of the buffer is replaced with the string +/// representation of the target +/// +template< TargetType T > +inline void toString(const Target<T>* i_target, char* i_buffer, size_t i_bsize) +{ + snprintf(i_buffer, i_bsize, "Target 0x%lx/0x%x", i_target->get(), T); +} + +/// +/// @brief Get an enumerated target of a specific type +/// @tparam T The type of the target +/// @param[in] Ordinal representing the ordinal number of +/// the desired target +/// @return Target<T> the target requested +/// +template<TargetType T> +inline Target<T> getTarget(uint64_t Ordinal) +{ + //@TODO RTC:129517 + // For testing + return Target<T>(Ordinal); +} + +} // End namespace fapi2 + +#endif // End __FAPI2_TARGET__ diff --git a/src/include/usr/hbotcompid.H b/src/include/usr/hbotcompid.H index dc5b79d41..bfb5b29d7 100644 --- a/src/include/usr/hbotcompid.H +++ b/src/include/usr/hbotcompid.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -391,6 +391,13 @@ const compId_t SIO_COMP_ID = 0x3200; const char SIO_COMP_NAME[] = "sio"; //@} +/** @name FAPI2 + * FAPI2 Interface + */ +const compId_t FAPI2_COMP_ID = 0x3300; +const char FAPI2_COMP_NAME[] = "fapi2"; + + /** @name PRDF * PRDF component * @Note PRDF_COMP_ID=0xE500 matches with what diff --git a/src/include/usr/hwas/common/hwasCallout.H b/src/include/usr/hwas/common/hwasCallout.H index 622b1ca84..1ed36f119 100644 --- a/src/include/usr/hwas/common/hwasCallout.H +++ b/src/include/usr/hwas/common/hwasCallout.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -134,8 +134,15 @@ enum partTypeEnum LPC_SLAVE_PART_TYPE = 5, GPIO_EXPANDER_PART_TYPE = 6, SPIVID_SLAVE_PART_TYPE = 7, + TOD_CLOCK = 8, + MEM_REF_CLOCK = 9, + PROC_REF_CLOCK = 10, + PCI_REF_CLOCK = 11, }; + + + // const uint8_t HW_CALLOUT = 0x01; const uint8_t PROCEDURE_CALLOUT = 0x02; diff --git a/src/include/usr/targeting/common/target.H b/src/include/usr/targeting/common/target.H index bf5b7dad4..4901845c8 100644 --- a/src/include/usr/targeting/common/target.H +++ b/src/include/usr/targeting/common/target.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -54,17 +54,20 @@ //****************************************************************************** // Forward declarations to allow friend functions to work //****************************************************************************** -namespace fapi + + +namespace fapi2 { - class ReturnCode; - class Target; - namespace platAttrSvc + namespace platAttrSvc { - fapi::ReturnCode getTargetingAttr(const fapi::Target *, - const TARGETING::ATTRIBUTE_ID, const uint32_t, void *); - fapi::ReturnCode setTargetingAttr(const fapi::Target *, - const TARGETING::ATTRIBUTE_ID, const uint32_t, void *); + + bool setTargetingAttrHelper(TARGETING::Target * , + const TARGETING::ATTRIBUTE_ID , + const uint32_t , void * ); + bool getTargetingAttrHelper(TARGETING::Target * , + const TARGETING::ATTRIBUTE_ID , + const uint32_t , void * ); } } @@ -351,8 +354,7 @@ class Target void getAttrTankTargetPosData(uint16_t & o_pos, uint8_t & o_unitPos, uint8_t & o_node) const; - - private: // Private helper interfaces + private: // Private helper interfaces /** * @brief Tries to get the target's specified attribute value @@ -404,6 +406,7 @@ class Target uint32_t i_size, const void* i_pAttrData) const; + /** * @brief Gets a pointer to the target's associated attribute * @@ -573,15 +576,19 @@ class Target friend class AssociationManager; friend class AttributeTank; - // Friend functions to allow FAPI Attribute code to directly call - // _tryGetAttr and _trySetAttr for code size optimization - friend fapi::ReturnCode fapi::platAttrSvc::getTargetingAttr( - const fapi::Target *, TARGETING::ATTRIBUTE_ID, const uint32_t, - void *); - friend fapi::ReturnCode fapi::platAttrSvc::setTargetingAttr( - const fapi::Target *, TARGETING::ATTRIBUTE_ID, const uint32_t, - void *); + + + friend bool fapi2:: + platAttrSvc:: + setTargetingAttrHelper(TARGETING::Target*, + const TARGETING::ATTRIBUTE_ID , + const uint32_t , void * ); + friend bool fapi2:: + platAttrSvc:: + getTargetingAttrHelper(TARGETING::Target * , + const TARGETING::ATTRIBUTE_ID , + const uint32_t , void * ); /* * @brief allow targetattrbulksync access to the target class store. */ diff --git a/src/makefile b/src/makefile index d271d0432..ba27e06a2 100644 --- a/src/makefile +++ b/src/makefile @@ -141,6 +141,7 @@ EXTENDED_MODULES += istep16 EXTENDED_MODULES += istep21 EXTENDED_MODULES += isteps EXTENDED_MODULES += targeting +EXTENDED_MODULES += fapi2 EXTENDED_MODULES += extinitsvc EXTENDED_MODULES += istepdisp EXTENDED_MODULES += hwas @@ -168,7 +169,6 @@ EXTENDED_MODULES += $(if $(CONFIG_CONSOLE_OUTPUT_ERRORDISPLAY),errldisplay) EXTENDED_MODULES += $(if $(CONFIG_BMC_IPMI),ipmi) - #*************************************** # Working test modules #*************************************** @@ -211,6 +211,7 @@ TESTCASE_MODULES += testscom #@TODO RTC: 137561 Enable this test case when interupt story is complete #TESTCASE_MODULES += testintr +TESTCASE_MODULES += testfapi2 #TODO: Need to re-enable testmdia (RTC 135217) #TESTCASE_MODULES += $(if $(CONFIG_VPO_COMPILE),,testmdia) diff --git a/src/usr/diag/mdia/mdiasm.C b/src/usr/diag/mdia/mdiasm.C index e58f611e2..45629a400 100644 --- a/src/usr/diag/mdia/mdiasm.C +++ b/src/usr/diag/mdia/mdiasm.C @@ -49,7 +49,6 @@ using namespace TARGETING; using namespace ERRORLOG; using namespace std; -using namespace fapi; using namespace DeviceFW; namespace MDIA diff --git a/src/usr/fapi2/attribute_service.C b/src/usr/fapi2/attribute_service.C new file mode 100644 index 000000000..be9bee453 --- /dev/null +++ b/src/usr/fapi2/attribute_service.C @@ -0,0 +1,386 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/attribute_service.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file attribute_service.C +/// +/// @brief Implements the platform functions that access attributes for FAPI2 +/// + +//****************************************************************************** +// Includes +//****************************************************************************** + +// The following file checks at compile time that all HWPF attributes are +// handled by Hostboot. This is done to ensure that the HTML file listing +// supported HWPF attributes lists attributes handled by Hostboot + +#include <stdint.h> +#include <return_code.H> +#include <fapi2platattrmacros.H> +#include <fapi2_attribute_service.H> +#include <attribute_service.H> +#include <attribute_plat_check.H> +#include <attribute_ids.H> +#include <targeting/common/attributes.H> +#include <attributeenums.H> +#include <target.H> +#include <target_types.H> +#include <hwpf_fapi2_reasoncodes.H> + +#include <devicefw/driverif.H> +#include <plat_attr_override_sync.H> +#include <vpd/spdenums.H> + +#include <errl/errlmanager.H> + +#include <targeting/common/targetservice.H> +#include <targeting/common/predicates/predicatectm.H> +#include <targeting/common/utilFilter.H> + +//****************************************************************************** +// Implementation +//****************************************************************************** + +namespace fapi2 +{ +namespace platAttrSvc +{ + +/// +/// @brief Gets the TARGETING object for the input FAPI target +/// See doxygen in attribute_service.H +/// +errlHndl_t getTargetingTarget(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + TARGETING::Target* & o_pTarget, + const TARGETING::TYPE i_expectedType) +{ + errlHndl_t l_errl = NULL; + do + { + if (i_pFapiTarget.get() == NULL) + { + // Fapi Target object isnt point to a real target + FAPI_ERR("getTargetingTarget. NULL Fapi Target"); + + /*@ + * @errortype + * @moduleid fapi2::MOD_FAPI2_GET_TARGETING_TARGET + * @reasoncode RC_NULL_FAPI_TARGET + * @userdata1[0:31] Fapi2 Expected Type + * @userdata1[32:63] <unused> + * @userdata2[0:7] Is Chip + * @userdata2[8:15] Is Chiplet + * @userdata2[16:63] <unused> + * @devdesc Unable to resolve FapiTarget from input + * @custdesc Firmware Error + */ + l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + MOD_FAPI2_GET_TARGETING_TARGET, + RC_NULL_FAPI_TARGET, + i_expectedType, + TWO_UINT8_TO_UINT16( + i_pFapiTarget.isChip(), + i_pFapiTarget.isChiplet())); + + l_errl->collectTrace(FAPI_TRACE_NAME); + l_errl->collectTrace(FAPI_IMP_TRACE_NAME); + + break; + } + + o_pTarget = reinterpret_cast<TARGETING::Target*>(i_pFapiTarget.get()); + if(i_expectedType != TARGETING::TYPE_NA) + { + TARGETING::TYPE l_type = o_pTarget->getAttr<TARGETING::ATTR_TYPE>(); + + if (l_type != i_expectedType) + { + FAPI_ERR("getTargetingTarget. Type: %d, expected %d", l_type, + i_expectedType); + /*@ + * @errortype + * @moduleid fapi2::MOD_FAPI2_GET_TARGETING_TARGET + * @reasoncode RC_MISMATCHED_FAPI_TARG_TARGET + * @userdata1[0:31] Actual Type + * @userdata1[32:63] Expected Type + * @userdata2[0:31] Initial FAPI2 Type + * @userdata2[32:47] Is Chip + * @userdata2[48:63] Is Chiplet + * @devdesc When coverting from FAPI2::target to + * Targeting::target the resulting + Targeting::target's was incorrect + * @custdesc Firmware Error + */ + l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + MOD_FAPI2_GET_TARGETING_TARGET, + RC_MISMATCHED_FAPI_TARG_TARGET, + TWO_UINT32_TO_UINT64(l_type, + i_expectedType), + TWO_UINT32_TO_UINT64( + i_pFapiTarget.getType(), + TWO_UINT16_TO_UINT32( + i_pFapiTarget.isChip(), + i_pFapiTarget.isChiplet()))); + + l_errl->collectTrace(FAPI_TRACE_NAME); + l_errl->collectTrace(FAPI_IMP_TRACE_NAME); + break; + } + } + } while(0); + + return l_errl; +} + +bool getTargetingAttrHelper(TARGETING::Target * l_pTargTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, void * o_pAttr) +{ + return l_pTargTarget->_tryGetAttr(i_targAttrId, i_attrSize, o_pAttr); +} + +/// +/// @brief Gets a Targeting attribute, this is called by the macro that maps a +/// FAPI Attribute get to a TARGETING attribute and should not be called +/// directly. +/// See doxygen in H file. +/// +ReturnCode getTargetingAttr( + const Target< TARGET_TYPE_ALL, plat_target_handle_t >& i_pFapiTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, + void * o_pAttr) +{ + errlHndl_t l_errl = NULL; + ReturnCode l_rc; + TARGETING::Target * l_pTargTarget = NULL; + l_errl = getTargetingTarget(i_pFapiTarget, l_pTargTarget); + + if (l_errl) + { + FAPI_ERR("getTargetingAttr: Error from getTargetingTarget"); + l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl)); + } + else + { + // Note directly calling Target's private _tryGetAttr function for code + // size optimization, the public function is a template function that + // cannot be called with a variable attribute ID, the template function + // checks at compile time that the Targeting attribute is readable, but + // that is already checked by the Targeting compiler + bool l_success = getTargetingAttrHelper(l_pTargTarget, + i_targAttrId, + i_attrSize, o_pAttr); + + if (!l_success) + { + FAPI_ERR("getTargetingAttr: Error from _tryGetAttr"); + } + } + return l_rc; +} + +bool setTargetingAttrHelper(TARGETING::Target * l_pTargTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, + void * o_pAttr) +{ + return l_pTargTarget->_trySetAttr(i_targAttrId, i_attrSize, o_pAttr); +} + +/// +/// @brief Sets a Targeting attribute, this is called by the macro that maps a +/// FAPI Attribute set to a FAPI2 TARGETING attribute and should not be +/// called directly +/// See doxygen in H file +/// +ReturnCode setTargetingAttr( + const Target<TARGET_TYPE_ALL, plat_target_handle_t >& i_pFapiTarget, + const TARGETING::ATTRIBUTE_ID i_targAttrId, + const uint32_t i_attrSize, + void * i_pAttr) +{ + ReturnCode l_rc; + errlHndl_t l_errl = NULL; + TARGETING::Target * l_pTargTarget = NULL; + l_errl = getTargetingTarget(i_pFapiTarget, l_pTargTarget); + + if (l_errl) + { + FAPI_ERR("setTargetingAttr: Error from getTargetingTarget"); + l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl)); + } + else + { + // Note directly calling Target's private _trySetAttr function for code + // size optimization, the public function is a template function that + // cannot be called with a variable attribute ID, the template function + // checks at compile time that the Targeting attribute is readable, but + // that is already checked by the Targeting compiler + bool l_success = setTargetingAttrHelper(l_pTargTarget, + i_targAttrId, + i_attrSize, + i_pAttr); + + if (!l_success) + { + FAPI_ERR("setTargetingAttr: Error from _trySetAttr"); + } + } + return l_rc; +} + +//****************************************************************************** +// platGetTargetName function +//****************************************************************************** +ReturnCode platGetTargetName(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + uint8_t & o_name) +{ + ReturnCode l_rc; + errlHndl_t l_errl = NULL; + TARGETING::Target * l_pHbTarget = NULL; + o_name = ENUM_ATTR_NAME_NONE; + + do + { + l_errl = getTargetingTarget(i_pFapiTarget, l_pHbTarget); + + if (l_errl) + { + FAPI_ERR("platGetTargetName: Error from getTargetingTarget"); + l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl)); + break; + } + + TARGETING::MODEL l_model = + l_pHbTarget->getAttr<TARGETING::ATTR_MODEL>(); + + if (l_model == TARGETING::MODEL_NIMBUS) + { + o_name = ENUM_ATTR_NAME_NIMBUS; + } + else if (l_model == TARGETING::MODEL_CUMULUS) + { + o_name = ENUM_ATTR_NAME_CUMULUS; + } + else if (l_model == TARGETING::MODEL_CENTAUR) + { + o_name = ENUM_ATTR_NAME_CENTAUR; + } + else + { + FAPI_ERR("platGetTargetName. Unknown name 0x%x", l_model); + + /*@ + * @errortype + * @moduleid fapi2::MOD_FAPI2_GET_TARGETING_TARGET + * @reasoncode RC_UNKNOWN_MODEL + * @userdata1[0:31] FAPI2 Type + * @userdata1[32:63] HB Target HUID + * @userdata2[0:31] HB Type + * @userdata2[32:63] HB Model + * @devdesc HB target found with unknown model attribute + * @custdesc Firmware Error + */ + l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + MOD_FAPI2_GET_TARGETING_TARGET, + RC_UNKNOWN_MODEL, + TWO_UINT32_TO_UINT64( + i_pFapiTarget.getType(), + TARGETING::get_huid(l_pHbTarget) + ), + TWO_UINT32_TO_UINT64( + l_pHbTarget-> + getAttr<TARGETING::ATTR_TYPE>(), + l_model)); + + l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl)); + break; + } + } while (0); + + return l_rc; +} + +//****************************************************************************** +// platGetFunctional function +//****************************************************************************** +ReturnCode platGetFunctional(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + uint8_t & o_functional) +{ + errlHndl_t l_errl = NULL; + ReturnCode l_rc; + TARGETING::Target * l_pHbTarget = NULL; + o_functional = 0; + + l_errl = getTargetingTarget(i_pFapiTarget, l_pHbTarget); + + if (l_errl) + { + FAPI_ERR("platGetFunctional: Error from getTargetingTarget"); + l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl)); + } + else + { + TARGETING::PredicateIsFunctional l_functional; + if (l_functional(l_pHbTarget)) + { + o_functional = 1; + } + } + + return l_rc; +} + +//****************************************************************************** +// fapi::platAttrSvc::platGetTargetPos function +//****************************************************************************** +ReturnCode platGetTargetPos(const Target<TARGET_TYPE_ALL>& i_pFapiTarget, + uint32_t & o_pos) +{ + errlHndl_t l_errl = NULL; + ReturnCode l_rc; + TARGETING::Target * l_pTarget = NULL; + + // Get the Targeting Target + l_errl = getTargetingTarget(i_pFapiTarget, l_pTarget); + + if (l_errl) + { + FAPI_ERR("getTargetName: Error from getTargetingTarget"); + l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl)); + } + else + { + uint16_t l_pos = l_pTarget->getAttr<TARGETING::ATTR_POSITION>(); + o_pos = l_pos; + } + + return l_rc; +} + +} // End platAttrSvc namespace + +} // End fapi2 namespace diff --git a/src/usr/fapi2/fapi2.mk b/src/usr/fapi2/fapi2.mk new file mode 100755 index 000000000..4fe67e6b0 --- /dev/null +++ b/src/usr/fapi2/fapi2.mk @@ -0,0 +1,89 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/fapi2/fapi2.mk $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2015,2016 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# +# @file src/usr/fapi2/fapi2.mk +# +# @brief Makefile for fapi2 module +# + +EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ + +#Hostboot objects +OBJS += plat_utils.o +OBJS += attribute_service.o +OBJS += plat_attribute_service.o +OBJS += plat_attr_override_sync.o +OBJS += plat_hwp_invoker.o + + +#EKB Objects (mirrored in src/import) +OBJS += error_info.o +OBJS += ffdc.o + +#Generated Objects +OBJS += fapi2_attribute_service.o +OBJS += fapi2_chip_ec_feature.o + +#------------------------------------------------------------------------------ +# Set fapi2 build environment +#------------------------------------------------------------------------------ + +# Chip directory +CHIPS += p9 + +FAPI2_ERROR_XML += $(wildcard \ + $(ROOTPATH)/src/import/chips/p9/procedures/xml/error_info/*.xml) +FAPI2_ERROR_XML += $(wildcard \ + $(ROOTPATH)/src/import/hwpf/fapi2/xml/error_info/*.xml) + +# Attribute XML files. +FAPI2_ATTR_XML += $(wildcard \ + $(ROOTPATH)/src/import/hwpf/fapi2/xml/attribute_info/*.xml) +FAPI2_ATTR_XML += $(wildcard \ + $(ROOTPATH)/src/import/chips/p9/procedures/xml/attribute_info/*.xml) + +# Chip SCOM address header files. +FAPI2_PLAT_INCLUDE += $(addsuffix /common/include, \ + $(addprefix $(ROOTPATH)/src/import/chips/$CHIPS)) + +#------------------------------------------------------------------------------ +# The PLAT HWP RC and FFDC parser file generated from Error XML files +#------------------------------------------------------------------------------ +PLAT_HWP_ERR_PARSER = platHwpErrParser.H +GENDIR_PLUGINS = $(ROOTPATH)/obj/genfiles/plugins +GENPLUGINTARGET = $(addprefix $(GENDIR_PLUGINS)/, $(1)) +GENFILES_PLUGINS = ${PLAT_HWP_ERR_PARSER} +$(call GENPLUGINTARGET, ${PLAT_HWP_ERR_PARSER}) : \ + $(ROOTPATH)/src/usr/fapi2/platCreateHwpErrParser.pl ${FAPI2_ERROR_XML} + $< $(dir $@) ${FAPI2_ERROR_XML} + + +# Add targets from 'BUILD_GENERATED' into the Hostboot 'GEN_PASS'. +GEN_PASS_BODY += $(GEN_TARGETS) +CLEAN_TARGETS += $(GEN_TARGETS) + +VPATH += ${ROOTPATH}/src/import/hwpf/fapi2/src/ +VPATH += ${GENPATH} diff --git a/src/usr/fapi2/makefile b/src/usr/fapi2/makefile new file mode 100755 index 000000000..26dcfca2b --- /dev/null +++ b/src/usr/fapi2/makefile @@ -0,0 +1,51 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/fapi2/makefile $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2015,2016 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# +# @file src/usr/fapi2/makefile +# +# @brief Makefile rule for fapi2 module +# + +ROOTPATH = ../../.. +GENPATH?=$(ROOTPATH)/obj/genfiles + +MODULE = fapi2 +SUBDIRS += test.d + +include ${ROOTPATH}/src/build/mkrules/verbose.rules.mk +define __CLEAN_TARGET +CLEAN_TARGETS += $(1) +endef + +include fapi2.mk + +include ${ROOTPATH}/src/import/tools/build/common.dir/script.rules.mk +include ${ROOTPATH}/src/import/hwpf/fapi2/tools/parseErrorInfo.mk +include ${ROOTPATH}/src/import/hwpf/fapi2/tools/parseAttributeInfo.mk +include ${ROOTPATH}/src/import/hwpf/fapi2/tools/createIfAttrService.mk + +include ${ROOTPATH}/config.mk + +vpath %.C ${GENDIR}
\ No newline at end of file diff --git a/src/usr/fapi2/platCreateHwpErrParser.pl b/src/usr/fapi2/platCreateHwpErrParser.pl new file mode 100755 index 000000000..4c2fc8ec8 --- /dev/null +++ b/src/usr/fapi2/platCreateHwpErrParser.pl @@ -0,0 +1,272 @@ +#!/usr/bin/perl +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/fapi2/platCreateHwpErrParser.pl $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2015,2016 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + +# +# Purpose: This perl script will parse HWP Error XML files and create a +# file containing functions that parses the return code and FFDC +# data in HWP error logs +# +# Author: Thi Tran +# + +use strict; + +#------------------------------------------------------------------------------ +# Print Command Line Help +#------------------------------------------------------------------------------ +my $numArgs = $#ARGV + 1; +if ($numArgs < 2) +{ + print ("Usage: platCreateHwpErrParser.pl <output dir> <filename1> <filename2> ...\n"); + print (" This perl script will parse HWP Error XML files and create\n"); + print (" a file called fapiPlatHwpErrParser.H that contains functions to\n"); + print (" parse the return code and FFDC data in HWP error logs\n"); + exit(1); +} + +#------------------------------------------------------------------------------ +# Specify perl modules to use +#------------------------------------------------------------------------------ +use Digest::MD5 qw(md5_hex); +use XML::Simple; +my $xml = new XML::Simple (KeyAttr=>[]); + +# Uncomment to enable debug output +#use Data::Dumper; + +#------------------------------------------------------------------------------ +# Open output files for writing +#------------------------------------------------------------------------------ +my $rcFile = $ARGV[0]; +$rcFile .= "/"; +$rcFile .= "platHwpErrParser.H"; +open(TGFILE, ">", $rcFile); + +#------------------------------------------------------------------------------ +# Print start of file information +#------------------------------------------------------------------------------ +print TGFILE "// platHwpErrParser.H\n"; +print TGFILE "// This file is generated by perl script platCreateHwpErrParser.pl\n\n"; +print TGFILE "#ifndef PLATHWPERRPARSER_H_\n"; +print TGFILE "#define PLATHWPERRPARSER_H_\n\n"; +print TGFILE "#ifdef PARSER\n\n"; +print TGFILE "namespace fapi2\n"; +print TGFILE "{\n\n"; +print TGFILE "void parseHwpRc(ErrlUsrParser & i_parser,\n"; +print TGFILE " void * i_pBuffer,\n"; +print TGFILE " const uint32_t i_buflen)\n"; +print TGFILE "{\n"; +print TGFILE " uint64_t l_rc_64 = ntohll(*(static_cast<uint64_t *>(i_pBuffer)));\n"; +print TGFILE " switch(l_rc)\n"; +print TGFILE " {\n"; + +#------------------------------------------------------------------------------ +# For each XML file +#------------------------------------------------------------------------------ +foreach my $argnum (1 .. $#ARGV) +{ + #-------------------------------------------------------------------------- + # Read XML file + #-------------------------------------------------------------------------- + my $infile = $ARGV[$argnum]; + my $errors = $xml->XMLin($infile, ForceArray => ['hwpError']); + + # Uncomment to get debug output of all errors + #print "\nFile: ", $infile, "\n", Dumper($errors), "\n"; + + #-------------------------------------------------------------------------- + # For each Error + #-------------------------------------------------------------------------- + foreach my $err (@{$errors->{hwpError}}) + { + #---------------------------------------------------------------------- + # Get the description, remove newlines, leading and trailing spaces and + # multiple spaces + #---------------------------------------------------------------------- + my $desc = $err->{description}; + $desc =~ s/\n/ /g; + $desc =~ s/^ +//g; + $desc =~ s/ +$//g; + $desc =~ s/ +/ /g; + $desc =~ s/\"//g; + + #---------------------------------------------------------------------- + # Print the RC description + # Note that this uses the same code to calculate the error enum value + # as fapiParseErrorInfo.pl. This code must be kept in sync + #---------------------------------------------------------------------- + my $errHash128Bit = md5_hex($err->{rc}); + my $errHash24Bit = substr($errHash128Bit, 0, 6); + + print TGFILE " case 0x$errHash24Bit:\n"; + print TGFILE " i_parser.PrintString(\"HwpReturnCode\", \"$err->{rc}\");\n"; + print TGFILE " i_parser.PrintString(\"HWP Error description\", \"$desc\");\n"; + print TGFILE " break;\n"; + } +} + +#------------------------------------------------------------------------------ +# Print end of fapiParseHwpRc function +#------------------------------------------------------------------------------ +print TGFILE " default:\n"; +print TGFILE " i_parser.PrintNumber(\"Unrecognized Error ID\", \"0x%x\", l_rc);\n"; +print TGFILE " }\n"; +print TGFILE "}\n\n"; + +#------------------------------------------------------------------------------ +# Print start of fapiParseHwpFfdc function +#------------------------------------------------------------------------------ +print TGFILE "void parseHwpFfdc(ErrlUsrParser & i_parser,\n"; +print TGFILE " void * i_pBuffer,\n"; +print TGFILE " const uint32_t i_buflen)\n"; +print TGFILE "{\n"; +print TGFILE " const uint32_t CFAM_DATA_LEN = 4;\n"; +print TGFILE " const uint32_t SCOM_DATA_LEN = 8;\n"; +print TGFILE " const uint32_t POS_LEN = 4;\n"; +print TGFILE " uint8_t * l_pBuffer = static_cast<uint8_t *>(i_pBuffer);\n"; +print TGFILE " uint32_t l_buflen = i_buflen;\n\n"; +print TGFILE " // The first uint32_t is the FFDC ID\n"; +print TGFILE " uint32_t * l_pFfdcId = static_cast<uint32_t *>(i_pBuffer);\n"; +print TGFILE " uint32_t l_ffdcId = ntohl(*l_pFfdcId);\n"; +print TGFILE " l_pBuffer += sizeof(l_ffdcId);\n"; +print TGFILE " l_buflen -= sizeof(l_ffdcId);\n"; +print TGFILE " switch(l_ffdcId)\n"; +print TGFILE " {\n"; + +#------------------------------------------------------------------------------ +# For each XML file +#------------------------------------------------------------------------------ +foreach my $argnum (1 .. $#ARGV) +{ + #-------------------------------------------------------------------------- + # Read XML file + #-------------------------------------------------------------------------- + my $infile = $ARGV[$argnum]; + my $errors = $xml->XMLin($infile, ForceArray => + ['hwpError', 'ffdc', 'registerFfdc', 'cfamRegister', 'scomRegister']); + + # Uncomment to get debug output of all errors + #print "\nFile: ", $infile, "\n", Dumper($errors), "\n"; + + #-------------------------------------------------------------------------- + # If it is an FFDC section resulting from a <hwpError><ffdc> element, print + # out the FFDC name and hexdump the data + #-------------------------------------------------------------------------- + foreach my $err (@{$errors->{hwpError}}) + { + foreach my $ffdc (@{$err->{ffdc}}) + { + #------------------------------------------------------------------ + # Figure out the FFDC ID stored in the data. This is calculated in + # the same way as fapiParseErrorInfo.pl. This code must be kept in + # sync + #------------------------------------------------------------------ + my $ffdcName = $err->{rc} . "_" . $ffdc; + my $ffdcHash128Bit = md5_hex($ffdcName); + my $ffdcHash32Bit = substr($ffdcHash128Bit, 0, 8); + + print TGFILE " case 0x$ffdcHash32Bit:\n"; + print TGFILE " i_parser.PrintString(\"HwpReturnCode\", \"$err->{rc}\");\n"; + print TGFILE " i_parser.PrintString(\"FFDC:\", \"$ffdc\");\n"; + print TGFILE " if (l_buflen) "; + print TGFILE "{i_parser.PrintHexDump(l_pBuffer, l_buflen);}\n"; + print TGFILE " break;\n"; + } + } + + #-------------------------------------------------------------------------- + # If it is an FFDC section resulting from a <registerFfdc> element, print + # out the ID and walk through the registers, printing each out + #-------------------------------------------------------------------------- + foreach my $registerFfdc (@{$errors->{registerFfdc}}) + { + #---------------------------------------------------------------------- + # Figure out the FFDC ID stored in the data. This is calculated in the + # same way as fapiParseErrorInfo.pl. This code must be kept in sync + #---------------------------------------------------------------------- + my $ffdcName = $registerFfdc->{id}; + my $ffdcHash128Bit = md5_hex($ffdcName); + my $ffdcHash32Bit = substr($ffdcHash128Bit, 0, 8); + print TGFILE " case 0x$ffdcHash32Bit:\n"; + print TGFILE " i_parser.PrintString(\"Register FFDC:\", \"$ffdcName\");\n"; + print TGFILE " while (l_buflen > 0)\n"; + print TGFILE " {\n"; + print TGFILE " if (l_buflen >= POS_LEN)\n"; + print TGFILE " {\n"; + print TGFILE " uint32_t * l_pBufferTemp = reinterpret_cast<uint32_t *>(l_pBuffer);\n"; + print TGFILE " i_parser.PrintNumber(\"Chip Position:\",\"%X\",ntohl(*l_pBufferTemp));\n"; + print TGFILE " l_pBufferTemp = NULL;\n"; + print TGFILE " l_pBuffer+= POS_LEN;\n"; + print TGFILE " l_buflen -= POS_LEN;\n"; + print TGFILE " }\n"; + foreach my $cfamRegister (@{$registerFfdc->{cfamRegister}}) + { + print TGFILE " if (l_buflen >= CFAM_DATA_LEN)\n"; + print TGFILE " {\n"; + print TGFILE " i_parser.PrintString(\"CFAM Register:\", \"$cfamRegister\");\n"; + print TGFILE " i_parser.PrintHexDump(l_pBuffer, CFAM_DATA_LEN);\n"; + print TGFILE " l_pBuffer+= CFAM_DATA_LEN;\n"; + print TGFILE " l_buflen -= CFAM_DATA_LEN;\n"; + print TGFILE " }\n"; + } + foreach my $scomRegister (@{$registerFfdc->{scomRegister}}) + { + + print TGFILE " if (l_buflen >= SCOM_DATA_LEN)\n"; + print TGFILE " {\n"; + print TGFILE " i_parser.PrintString(\"SCOM Register:\", \"$scomRegister\");\n"; + print TGFILE " i_parser.PrintHexDump(l_pBuffer, SCOM_DATA_LEN);\n"; + print TGFILE " l_pBuffer+= SCOM_DATA_LEN;\n"; + print TGFILE " l_buflen -= SCOM_DATA_LEN;\n"; + print TGFILE " }\n"; + } + print TGFILE " }\n"; + print TGFILE " break;\n"; + } +} + +#------------------------------------------------------------------------------ +# Print end of parseHwpFfdc function +#------------------------------------------------------------------------------ +print TGFILE " default:\n"; +print TGFILE " i_parser.PrintNumber(\"Unrecognized FFDC\", \"0x%x\", l_ffdcId);\n"; +print TGFILE " if (l_buflen) "; +print TGFILE "{i_parser.PrintHexDump(l_pBuffer, l_buflen);}\n"; +print TGFILE " }\n\n"; +print TGFILE "}\n\n"; + +#------------------------------------------------------------------------------ +# Print end of file info +#------------------------------------------------------------------------------ +print TGFILE "}\n\n"; +print TGFILE "#endif\n"; +print TGFILE "#endif\n"; + +#------------------------------------------------------------------------------ +# Close output file +#------------------------------------------------------------------------------ +close(TGFILE); + diff --git a/src/usr/fapi2/plat_attr_override_sync.C b/src/usr/fapi2/plat_attr_override_sync.C new file mode 100644 index 000000000..315fd7ca4 --- /dev/null +++ b/src/usr/fapi2/plat_attr_override_sync.C @@ -0,0 +1,610 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/plat_attr_override_sync.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/** + * @file fapiPlatAttrOverrideSync.C + * + * @brief Implements the functions for Attribute Override and Sync + * + */ + +//****************************************************************************** +// Includes +//****************************************************************************** +#include <limits.h> +#include <sys/msg.h> +#include <string.h> +#include <vector> +#include <sys/msg.h> +#include <errl/errlentry.H> +#include <errl/errlmanager.H> +#include <mbox/mboxif.H> +#include <plat_attr_override_sync.H> +#include <fapiPlatTrace.H> +#include <hwpf_fapi2_reasoncodes.H> +#include <targeting/common/utilFilter.H> +#include <targeting/common/attributeTank.H> + +namespace fapi2 +{ + +//****************************************************************************** +// Global Variables +//****************************************************************************** + +#ifndef __HOSTBOOT_RUNTIME +// Set by a debug tool to directly apply an Attribute Override +TARGETING::AttributeTank::AttributeHeader g_attrOverrideHeader; +uint8_t g_attrOverride[AttrOverrideSync::MAX_DIRECT_OVERRIDE_ATTR_SIZE_BYTES]; +uint8_t g_attrOverrideFapiTank = 0; +#endif + +//****************************************************************************** +// Apply a HWPF Attribute Override written directly into Hostboot memory from +// the Simics/VBU console. This function is called by a Simics/VBU debug tool +//****************************************************************************** +void directOverride() +{ +#ifndef __HOSTBOOT_RUNTIME + // Apply the attribute override + if (g_attrOverrideFapiTank) + { + FAPI_IMP("directOverride: Applying override to FAPI tank " + "Id: 0x%08x, TargType: 0x%08x, Pos: 0x%04x, UPos: 0x%02x", + g_attrOverrideHeader.iv_attrId, g_attrOverrideHeader.iv_targetType, + g_attrOverrideHeader.iv_pos, g_attrOverrideHeader.iv_unitPos); + FAPI_IMP("directOverride: Applying override to FAPI tank " + "Node: 0x%02x, Flags: 0x%02x, Size: 0x%08x", + g_attrOverrideHeader.iv_node, g_attrOverrideHeader.iv_flags, + g_attrOverrideHeader.iv_valSize); + + theAttrOverrideSync().iv_overrideTank.setAttribute( + g_attrOverrideHeader.iv_attrId, + g_attrOverrideHeader.iv_targetType, + g_attrOverrideHeader.iv_pos, + g_attrOverrideHeader.iv_unitPos, + g_attrOverrideHeader.iv_node, + g_attrOverrideHeader.iv_flags, + g_attrOverrideHeader.iv_valSize, + &g_attrOverride); + } + else + { + // Convert the FAPI targeting type to TARGETING + TARGETING::TYPE l_targetType = TARGETING::TYPE_SYS; + + switch (g_attrOverrideHeader.iv_targetType) + { + case fapi2::TARGET_TYPE_DIMM: + l_targetType = TARGETING::TYPE_DIMM; + break; + case fapi2::TARGET_TYPE_PROC_CHIP: + l_targetType = TARGETING::TYPE_PROC; + break; + case fapi2::TARGET_TYPE_MEMBUF_CHIP: + l_targetType = TARGETING::TYPE_MEMBUF; + break; + case fapi2::TARGET_TYPE_EX_CHIPLET: + l_targetType = TARGETING::TYPE_EX; + break; + case fapi2::TARGET_TYPE_MBA_CHIPLET: + l_targetType = TARGETING::TYPE_MBA; + break; + case fapi2::TARGET_TYPE_MCS_CHIPLET: + l_targetType = TARGETING::TYPE_MCS; + break; + case fapi2::TARGET_TYPE_XBUS_ENDPOINT: + l_targetType = TARGETING::TYPE_XBUS; + break; + case fapi2::TARGET_TYPE_ABUS_ENDPOINT: + l_targetType = TARGETING::TYPE_ABUS; + break; + case fapi2::TARGET_TYPE_L4: + l_targetType = TARGETING::TYPE_L4; + break; + } + + FAPI_IMP("directOverride: Applying override to TARG tank " + "Id: 0x%08x, TargType: 0x%08x, Pos: 0x%04x, UPos: 0x%02x", + g_attrOverrideHeader.iv_attrId, l_targetType, + g_attrOverrideHeader.iv_pos, g_attrOverrideHeader.iv_unitPos); + FAPI_IMP("directOverride: Applying override to TARG tank " + "Node: 0x%02x, Flags: 0x%02x, Size: 0x%08x", + g_attrOverrideHeader.iv_node, g_attrOverrideHeader.iv_flags, + g_attrOverrideHeader.iv_valSize); + + TARGETING::Target::theTargOverrideAttrTank().setAttribute( + g_attrOverrideHeader.iv_attrId, + l_targetType, + g_attrOverrideHeader.iv_pos, + g_attrOverrideHeader.iv_unitPos, + g_attrOverrideHeader.iv_node, + g_attrOverrideHeader.iv_flags, + g_attrOverrideHeader.iv_valSize, + &g_attrOverride); + } +#endif +} + +//****************************************************************************** +AttrOverrideSync & theAttrOverrideSync() +{ + return Singleton<AttrOverrideSync>::instance(); +} + +//****************************************************************************** +AttrOverrideSync::AttrOverrideSync() {} + +//****************************************************************************** +AttrOverrideSync::~AttrOverrideSync() {} + +//****************************************************************************** +void AttrOverrideSync::monitorForFspMessages() +{ +#ifndef __HOSTBOOT_RUNTIME + FAPI_IMP("monitorForFspMessages starting"); + + // Register a message queue with the mailbox + msg_q_t l_pMsgQ = msg_q_create(); + errlHndl_t l_pErr = MBOX::msgq_register(MBOX::HB_HWPF_ATTR_MSGQ, l_pMsgQ); + + if (l_pErr) + { + // In the unlikely event that registering fails, the code will commit an + // error and then wait forever for a message to appear on the queue + FAPI_ERR("monitorForFspMessages: Error registering msgq with mailbox"); + errlCommit(l_pErr, HWPF_COMP_ID); + } + + while (1) + { + msg_t * l_pMsg = msg_wait(l_pMsgQ); + + if (l_pMsg->type == MSG_SET_OVERRIDES) + { + // FSP is setting attribute override(s). + uint64_t l_tank = l_pMsg->data[0]; + TARGETING::AttributeTank::AttributeSerializedChunk l_chunk; + l_chunk.iv_size = l_pMsg->data[1]; + l_chunk.iv_pAttributes = static_cast<uint8_t *>(l_pMsg->extra_data); + + if (l_chunk.iv_pAttributes == NULL) + { + FAPI_ERR("monitorForFspMessages: tank %d, size %d, NULL data pointer", + l_tank, l_chunk.iv_size); + } + else if (l_tank == TARGETING::AttributeTank::TANK_LAYER_FAPI) + { + FAPI_INF( + "monitorForFspMessages: MSG_SET_OVERRIDES FAPI (size %lld)", + l_pMsg->data[1]); + iv_overrideTank.deserializeAttributes(l_chunk); + } + else + { + FAPI_INF( + "monitorForFspMessages: MSG_SET_OVERRIDES TARG (size %lld)", + l_pMsg->data[1]); + TARGETING::Target::theTargOverrideAttrTank(). + deserializeAttributes(l_chunk); + } + + // Free the memory + free(l_pMsg->extra_data); + l_pMsg->extra_data = NULL; + l_pMsg->data[0] = 0; + l_pMsg->data[1] = 0; + + if (msg_is_async(l_pMsg)) + { + msg_free(l_pMsg); + } + else + { + // Send the message back as a response + msg_respond(l_pMsgQ, l_pMsg); + } + } + else if (l_pMsg->type == MSG_CLEAR_ALL_OVERRIDES) + { + // FSP is clearing all attribute overrides. + FAPI_INF("monitorForFspMessages: MSG_CLEAR_ALL_OVERRIDES"); + iv_overrideTank.clearAllAttributes(); + TARGETING::Target::theTargOverrideAttrTank().clearAllAttributes(); + + if (msg_is_async(l_pMsg)) + { + msg_free(l_pMsg); + } + else + { + // Send the message back as a response + msg_respond(l_pMsgQ, l_pMsg); + } + } + else + { + FAPI_ERR("monitorForFspMessages: Unrecognized message 0x%x", + l_pMsg->type); + free(l_pMsg->extra_data); + l_pMsg->extra_data = NULL; + msg_free(l_pMsg); + } + } +#endif +} + +//****************************************************************************** +errlHndl_t AttrOverrideSync::sendAttrsToFsp( + const MAILBOX_MSG_TYPE i_msgType, + const TARGETING::AttributeTank::TankLayer i_tankLayer, + std::vector<TARGETING::AttributeTank::AttributeSerializedChunk> & + io_attributes) +{ + errlHndl_t l_pErr = NULL; + +#ifndef __HOSTBOOT_RUNTIME + std::vector<TARGETING::AttributeTank::AttributeSerializedChunk>::iterator + l_itr; + + // Send Attributes through the mailbox chunk by chunk. + for (l_itr = io_attributes.begin(); l_itr != io_attributes.end(); ++l_itr) + { + msg_t * l_pMsg = msg_allocate(); + l_pMsg->type = i_msgType; + l_pMsg->data[0] = i_tankLayer; + l_pMsg->data[1] = (*l_itr).iv_size; + l_pMsg->extra_data = (*l_itr).iv_pAttributes; + + // Send the message and wait for a response, the response message is not + // read, it just ensures that the code waits until the FSP is done + // Note: A possible performance boost could be to send only the last + // message synchronously to avoid the small delay between each + // message + l_pErr = MBOX::sendrecv(MBOX::FSP_HWPF_ATTR_MSGQ, l_pMsg); + + if (l_pErr) + { + FAPI_ERR("sendAttrsToFsp: Error sending to FSP"); + msg_free(l_pMsg); + l_pMsg = NULL; + break; + } + + // Mailbox freed the chunk data + (*l_itr).iv_pAttributes = NULL; + msg_free(l_pMsg); + l_pMsg = NULL; + } + + // Free any memory (only in error case will there be memory to free) and + // clear the vector of Attribute Chunks + for (l_itr = io_attributes.begin(); l_itr != io_attributes.end(); ++l_itr) + { + free((*l_itr).iv_pAttributes); + (*l_itr).iv_pAttributes = NULL; + } + io_attributes.clear(); +#endif + + return l_pErr; +} + +//****************************************************************************** +void AttrOverrideSync::sendAttrOverridesAndSyncsToFsp() +{ +#ifndef __HOSTBOOT_RUNTIME + const uint32_t MAILBOX_CHUNK_SIZE = 4096; + + if (MBOX::mailbox_enabled()) + { + errlHndl_t l_pErr = NULL; + + // Non-const overrides may have been cleared by being written to. + // Therefore, clear the FSP Attribute Overrides for this node and + // send the current set of overrides to the FSP for this node + + // Clear all current FSP Attribute Overrides for this node + msg_t * l_pMsg = msg_allocate(); + l_pMsg->type = MSG_CLEAR_ALL_OVERRIDES; + l_pMsg->data[0] = 0; + l_pMsg->data[1] = 0; + l_pMsg->extra_data = NULL; + + // Send the message + l_pErr = MBOX::send(MBOX::FSP_HWPF_ATTR_MSGQ, l_pMsg); + + if (l_pErr) + { + FAPI_ERR( + "sendAttrOverridesAndSyncsToFsp: Error clearing overrides"); + errlCommit(l_pErr, HWPF_COMP_ID); + msg_free(l_pMsg); + l_pMsg = NULL; + } + else + { + l_pMsg = NULL; + + // Send Hostboot Attribute Overrides to the FSP + for (uint32_t i = TARGETING::AttributeTank::TANK_LAYER_FAPI; + i <= TARGETING::AttributeTank::TANK_LAYER_TARG; i++) + { + std::vector<TARGETING::AttributeTank::AttributeSerializedChunk> + l_attributes; + + // Note that NODE_FILTER_NOT_ALL_NODES retrieves all overrides + // that are not for all nodes - i.e. overrides for this node. + // The FSP already has all overrides for all nodes. + if (i == TARGETING::AttributeTank::TANK_LAYER_FAPI) + { + iv_overrideTank.serializeAttributes( + TARGETING::AttributeTank::ALLOC_TYPE_MALLOC, + MAILBOX_CHUNK_SIZE, l_attributes, + TARGETING::AttributeTank::NODE_FILTER_NOT_ALL_NODES); + } + else + { + TARGETING::Target::theTargOverrideAttrTank(). + serializeAttributes( + TARGETING::AttributeTank::ALLOC_TYPE_MALLOC, + MAILBOX_CHUNK_SIZE, l_attributes, + TARGETING::AttributeTank:: + NODE_FILTER_NOT_ALL_NODES); + } + + if (l_attributes.size()) + { + l_pErr = sendAttrsToFsp(MSG_SET_OVERRIDES, + static_cast<TARGETING::AttributeTank::TankLayer>(i), + l_attributes); + + if (l_pErr) + { + FAPI_ERR("sendAttrOverridesAndSyncsToFsp: Error sending overrides (%d)", i); + errlCommit(l_pErr, HWPF_COMP_ID); + break; + } + } + } + + // Send Hostboot Attributes to Sync to the FSP + for (uint32_t i = TARGETING::AttributeTank::TANK_LAYER_FAPI; + i <= TARGETING::AttributeTank::TANK_LAYER_TARG; i++) + { + std::vector<TARGETING::AttributeTank::AttributeSerializedChunk> + l_attributes; + + if (i == TARGETING::AttributeTank::TANK_LAYER_FAPI) + { + iv_syncTank.serializeAttributes( + TARGETING::AttributeTank::ALLOC_TYPE_MALLOC, + MAILBOX_CHUNK_SIZE, l_attributes); + } + else + { + TARGETING::Target::theTargSyncAttrTank(). + serializeAttributes( + TARGETING::AttributeTank::ALLOC_TYPE_MALLOC, + MAILBOX_CHUNK_SIZE, l_attributes); + } + + if (l_attributes.size()) + { + l_pErr = sendAttrsToFsp(MSG_SET_SYNC_ATTS, + static_cast<TARGETING::AttributeTank::TankLayer>(i), + l_attributes); + + if (l_pErr) + { + FAPI_ERR("sendAttrOverridesAndSyncsToFsp: Error sending syncs (%d)", i); + errlCommit(l_pErr, HWPF_COMP_ID); + break; + } + else + { + // Clear Sync tank + if (i == TARGETING::AttributeTank::TANK_LAYER_FAPI) + { + iv_syncTank.clearAllAttributes(); + } + else + { + TARGETING::Target::theTargSyncAttrTank(). + clearAllAttributes(); + } + } + } + } + } + } +#endif +} + +//****************************************************************************** +void AttrOverrideSync::getAttrOverridesFromFsp() +{ +#ifndef __HOSTBOOT_RUNTIME + FAPI_IMP("Requesting Attribute Overrides from the FSP"); + + errlHndl_t l_pErr = NULL; + + msg_t * l_pMsg = msg_allocate(); + l_pMsg->type = MSG_GET_OVERRIDES; + l_pMsg->data[0] = 0; + l_pMsg->data[1] = 0; + l_pMsg->extra_data = NULL; + + // Send the message and wait for a response, the response message is not + // read, it just ensures that the code waits until the FSP is done sending + // attribute overrides + l_pErr = MBOX::sendrecv(MBOX::FSP_HWPF_ATTR_MSGQ, l_pMsg); + + if (l_pErr) + { + FAPI_ERR("getAttrOverridesFromFsp: Error sending to FSP"); + errlCommit(l_pErr, HWPF_COMP_ID); + } + + msg_free(l_pMsg); + l_pMsg = NULL; +#endif +} + +//****************************************************************************** +bool AttrOverrideSync::getAttrOverride(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>* const i_pTarget, + void * o_pVal) const +{ + // Very fast check to see if there are any overrides at all + if (!(iv_overrideTank.attributesExist())) + { + return false; + } + + // Check to see if there are any overrides for this attr ID + if (!(iv_overrideTank.attributeExists(i_attrId))) + { + return false; + } + + // Do the work of figuring out the target's type/position/node and find out + // if there is an override for this target + uint32_t l_targetType = getTargetType(i_pTarget); + + // Get the Target pointer + TARGETING::Target * l_pTarget = + reinterpret_cast<TARGETING::Target*>(i_pTarget->get()); + uint16_t l_pos = 0; + uint8_t l_unitPos = 0; + uint8_t l_node = 0; + l_pTarget->getAttrTankTargetPosData(l_pos, l_unitPos, l_node); + + FAPI_INF("getAttrOverride: Checking for override for ID: 0x%08x, " + "TargType: 0x%08x, Pos/Upos/Node: 0x%08x", + i_attrId, l_targetType, + (static_cast<uint32_t>(l_pos) << 16) + + (static_cast<uint32_t>(l_unitPos) << 8) + l_node); + + bool l_override = iv_overrideTank.getAttribute(i_attrId, l_targetType, + l_pos, l_unitPos, l_node, o_pVal); + + if (l_override) + { + FAPI_INF("getAttrOverride: Returning Override for ID: 0x%08x", + i_attrId); + } + + return l_override; +} + +//****************************************************************************** +bool AttrOverrideSync::getAttrOverrideFunc(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>& i_pTarget, + void * o_pVal) +{ + + return Singleton<AttrOverrideSync>::instance().getAttrOverride(i_attrId, + &i_pTarget, o_pVal); +} + +//****************************************************************************** +void AttrOverrideSync::setAttrActions(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>* i_pTarget, + const uint32_t i_size, + const void * i_pVal) +{ + // Figure out if effort should be expended figuring out the target's type/ + // position in order to clear any non-const attribute overrides and/or to + // store the attribute for syncing to Cronus + + bool l_clearAnyNonConstOverride = false; + + // Very fast check to see if there are any overrides at all for this Attr ID + if (iv_overrideTank.attributesExist()) + { + // Fast check to see if there are any overrides for this attr ID + if (iv_overrideTank.attributeExists(i_attrId)) + { + l_clearAnyNonConstOverride = true; + } + } + + bool l_syncAttribute = TARGETING::AttributeTank::syncEnabled(); + + if (l_clearAnyNonConstOverride || l_syncAttribute) + { + uint32_t l_targetType = getTargetType(i_pTarget); + + // Get the Target pointer + TARGETING::Target * l_pTarget = + reinterpret_cast<TARGETING::Target*>(i_pTarget->get()); + uint16_t l_pos = 0; + uint8_t l_unitPos = 0; + uint8_t l_node = 0; + l_pTarget->getAttrTankTargetPosData(l_pos, l_unitPos, l_node); + + if (l_clearAnyNonConstOverride) + { + // Clear any non const override for this attribute because the + // attribute is being written + iv_overrideTank.clearNonConstAttribute(i_attrId, l_targetType, + l_pos, l_unitPos, l_node); + } + + if (l_syncAttribute) + { + // Write the attribute to the SyncAttributeTank to sync to Cronus + iv_syncTank.setAttribute(i_attrId, l_targetType, l_pos, l_unitPos, + l_node, 0, i_size, i_pVal); + } + } +} + +//****************************************************************************** +void AttrOverrideSync::setAttrActionsFunc(const AttributeId i_attrId, + const Target<TARGET_TYPE_ALL>& i_pTarget, + const uint32_t i_size, + const void * i_pVal) +{ + Singleton<AttrOverrideSync>::instance().setAttrActions(i_attrId, &i_pTarget, + i_size, i_pVal); +} + + +//****************************************************************************** +uint32_t AttrOverrideSync::getTargetType( + const Target<TARGET_TYPE_ALL>* i_pTarget) +{ + uint32_t l_targetType = fapi2::TARGET_TYPE_SYSTEM; + + if (i_pTarget != NULL) + { + l_targetType = i_pTarget->getType(); + } + + return l_targetType; +} + +} // End fapi namespace diff --git a/src/usr/fapi2/plat_attribute_service.C b/src/usr/fapi2/plat_attribute_service.C new file mode 100644 index 000000000..9e3c0d823 --- /dev/null +++ b/src/usr/fapi2/plat_attribute_service.C @@ -0,0 +1,40 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/plat_attribute_service.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_attribute_service.C +/// +/// @brief Implements the specialized platform functions that access +/// attributes for FAPI2 +/// + +namespace fapi2 +{ + +namespace platAttrSvc +{ + +} // End platAttrSvc namespace + +} // End fapi2 namespace diff --git a/src/usr/fapi2/plat_hwp_invoker.C b/src/usr/fapi2/plat_hwp_invoker.C new file mode 100644 index 000000000..3d4fa89cb --- /dev/null +++ b/src/usr/fapi2/plat_hwp_invoker.C @@ -0,0 +1,53 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/plat_hwp_invoker.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_hwp_invoker.C +/// +/// @brief Implements the platform functions that access attributes for FAPI2 +/// + + +#include <plat_hwp_invoker.H> +#include <return_code.H> + +//****************************************************************************** +// Implementation +//****************************************************************************** + +namespace fapi2 +{ + + //@todo RTC:124673 + /** + * @brief Converts a fapi::ReturnCode to a HostBoot PLAT error log + */ + errlHndl_t fapiRcToErrl(ReturnCode & io_rc, + ERRORLOG::errlSeverity_t i_sev) + { + errlHndl_t errl = NULL; + return errl; + } +} +//end fapi2
\ No newline at end of file diff --git a/src/usr/fapi2/plat_utils.C b/src/usr/fapi2/plat_utils.C new file mode 100644 index 000000000..aa146e45b --- /dev/null +++ b/src/usr/fapi2/plat_utils.C @@ -0,0 +1,978 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/plat_utils.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file plat_utils.C +/// +/// @brief Implements the plat_utils.H utility functions. +/// +/// Note that platform code must provide the implementation. +/// + +#include <sys/time.h> +#include <utils.H> +#include <plat_trace.H> +#include <return_code.H> +#include <error_info.H> +#include <assert.h> +#include <plat_utils.H> +#include <errl/errlentry.H> +#include <errl/errlmanager.H> +#include <hwpf_fapi2_reasoncodes.H> + +//****************************************************************************** +// Trace descriptors +//****************************************************************************** +trace_desc_t* g_fapiTd; +trace_desc_t* g_fapiImpTd; +trace_desc_t* g_fapiScanTd; +trace_desc_t* g_fapiMfgTd; + + +//****************************************************************************** +// Global TracInit objects. Construction will initialize the trace buffer +//****************************************************************************** +TRAC_INIT(&g_fapiTd, FAPI_TRACE_NAME, 2*KILOBYTE); +TRAC_INIT(&g_fapiImpTd, FAPI_IMP_TRACE_NAME, 2*KILOBYTE); +TRAC_INIT(&g_fapiScanTd, FAPI_SCAN_TRACE_NAME, 4*KILOBYTE); +TRAC_INIT(&g_fapiMfgTd, FAPI_MFG_TRACE_NAME, 4*KILOBYTE); +namespace fapi2 +{ + +// Define global current_err +//thread_local ReturnCode current_err; +ReturnCode current_err; +/// +/// @brief Translates a FAPI callout priority to an HWAS callout priority +/// +/// @param[i] i_fapiPri FAPI callout priority +/// +/// @return HWAS callout priority +/// +HWAS::callOutPriority xlateCalloutPriority( + const fapi2::CalloutPriorities::CalloutPriority i_fapiPri) +{ + // Use the CalloutPriority enum value as an index + HWAS::callOutPriority l_priority = HWAS::SRCI_PRIORITY_HIGH; + size_t l_index = i_fapiPri; + + const HWAS::callOutPriority HWAS_PRI[] = {HWAS::SRCI_PRIORITY_LOW, + HWAS::SRCI_PRIORITY_MED, + HWAS::SRCI_PRIORITY_HIGH}; + + if (l_index < (sizeof(HWAS_PRI)/sizeof(HWAS::callOutPriority))) + { + l_priority = HWAS_PRI[l_index]; + } + else + { + FAPI_ERR("fapi2::xlateCalloutPriority: Unknown priority 0x%x, assuming HIGH", + i_fapiPri); + } + + return l_priority; +} + +/// +/// * @brief Translates a FAPI Clock HW callout to an HWAS clock callout +/// +/// * @param[i] i_fapiClock FAPI Clock HW callout +/// +/// * @return HWAS Clock HW callout +/// +HWAS::clockTypeEnum xlateClockHwCallout( + const fapi2::HwCallouts::HwCallout i_fapiClock) +{ + // Use the HwCallout enum value as an index + HWAS::clockTypeEnum l_clock = HWAS::TODCLK_TYPE; + size_t l_index = i_fapiClock; + + const HWAS::clockTypeEnum HWAS_CLOCK[] = { + HWAS::TODCLK_TYPE, + HWAS::MEMCLK_TYPE, + HWAS::OSCREFCLK_TYPE, + HWAS::OSCPCICLK_TYPE}; + + if (l_index < (sizeof(HWAS_CLOCK)/sizeof(HWAS::clockTypeEnum))) + { + l_clock = HWAS_CLOCK[l_index]; + } + else + { + FAPI_ERR("fapi::xlateClockHwCallout: Unknown clock 0x%x, assuming TOD", + i_fapiClock); + } + + return l_clock; +} + +/// +/// * @brief Translates a FAPI Part HW callout to an HWAS part callout +/// +/// * @param[i] i_fapiPart FAPI part HW callout +/// +/// * @return HWAS part HW callout +/// +HWAS::partTypeEnum xlatePartHwCallout( + const fapi2::HwCallouts::HwCallout i_fapiPart) +{ + // Use the HwCallout enum value as an index + HWAS::partTypeEnum l_part = HWAS::NO_PART_TYPE; + + // clock xlate function above assumes indexes match + // between 2 enums. seems better to do it explicitly + + switch (i_fapiPart) + { + case HwCallouts::FLASH_CONTROLLER_PART: + l_part = HWAS::FLASH_CONTROLLER_PART_TYPE; + break; + case HwCallouts::PNOR_PART: + l_part = HWAS::PNOR_PART_TYPE; + break; + case HwCallouts::SBE_SEEPROM_PART: + l_part = HWAS::SBE_SEEPROM_PART_TYPE; + break; + case HwCallouts::VPD_PART: + l_part = HWAS::VPD_PART_TYPE; + break; + case HwCallouts::LPC_SLAVE_PART: + l_part = HWAS::LPC_SLAVE_PART_TYPE; + break; + case HwCallouts::GPIO_EXPANDER_PART: + l_part = HWAS::GPIO_EXPANDER_PART_TYPE; + break; + case HwCallouts::SPIVID_SLAVE_PART: + l_part = HWAS::SPIVID_SLAVE_PART_TYPE; + break; + case HwCallouts::TOD_CLOCK: + l_part = HWAS::TOD_CLOCK; + break; + case HwCallouts::MEM_REF_CLOCK: + l_part = HWAS::MEM_REF_CLOCK; + break; + case HwCallouts::PROC_REF_CLOCK: + l_part = HWAS::PROC_REF_CLOCK; + break; + case HwCallouts::PCI_REF_CLOCK: + l_part = HWAS::PCI_REF_CLOCK; + break; + + } + + return l_part; +} + +/// +/// * @brief Translates a FAPI procedure callout to an HWAS procedure callout +/// +/// * @param[i] i_fapiProc FAPI procedure callout +/// +/// * @return HWAS procedure callout +/// +HWAS::epubProcedureID xlateProcedureCallout( + const fapi2::ProcedureCallouts::ProcedureCallout i_fapiProc) +{ + // Use the ProcedureCallout enum value as an index + HWAS::epubProcedureID l_proc = HWAS::EPUB_PRC_HB_CODE; + size_t l_index = i_fapiProc; + + //@TODO RTC:124673 - need to verify the order still matches + const HWAS::epubProcedureID HWAS_PROC[] = { + HWAS::EPUB_PRC_HB_CODE, + HWAS::EPUB_PRC_LVL_SUPP, + HWAS::EPUB_PRC_MEMORY_PLUGGING_ERROR, + HWAS::EPUB_PRC_EIBUS_ERROR}; + + if (l_index < (sizeof(HWAS_PROC)/sizeof(HWAS::epubProcedureID))) + { + l_proc = HWAS_PROC[l_index]; + } + else + { + FAPI_ERR("fapi2::xlateProcedureCallout: Unknown proc 0x%x, assuming CODE", + i_fapiProc); + } + + return l_proc; +} + +/// +/// * @brief Translates a FAPI2 target type to a Targeting target type +/// +/// * @param[i] i_targetType FAPI2 target type +/// * @param[o] o_class Targeting class +/// * @param[o] o_type Targeting type +/// +void xlateTargetType(const fapi2::TargetType i_targetType, + TARGETING::CLASS & o_class, + TARGETING::TYPE & o_type) +{ + switch (i_targetType) + { + case fapi2::TARGET_TYPE_SYSTEM: + o_class = TARGETING::CLASS_SYS; + o_type = TARGETING::TYPE_SYS; + break; + case fapi2::TARGET_TYPE_DIMM: + o_class = TARGETING::CLASS_LOGICAL_CARD; + o_type = TARGETING::TYPE_DIMM; + break; + case fapi2::TARGET_TYPE_PROC_CHIP: + o_class = TARGETING::CLASS_CHIP; + o_type = TARGETING::TYPE_PROC; + break; + case fapi2::TARGET_TYPE_MEMBUF_CHIP: + o_class = TARGETING::CLASS_CHIP; + o_type = TARGETING::TYPE_MEMBUF; + break; + case fapi2::TARGET_TYPE_EX: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_EX; + break; + case fapi2::TARGET_TYPE_MBA: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_MBA; + break; + case fapi2::TARGET_TYPE_MCS: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_MCS; + break; + case fapi2::TARGET_TYPE_XBUS: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_XBUS; + break; + case fapi2::TARGET_TYPE_L4: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_L4; + break; + case fapi2::TARGET_TYPE_CORE: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_CORE; + break; + case fapi2::TARGET_TYPE_EQ: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_EQ; + break; + case fapi2::TARGET_TYPE_MCA: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_MCA; + break; + case fapi2::TARGET_TYPE_MCBIST: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_MCBIST; + break; + case fapi2::TARGET_TYPE_MI: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_MI; + break; + case fapi2::TARGET_TYPE_CAPP: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_CAPP; + break; + case fapi2::TARGET_TYPE_DMI: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_DMI; + break; + case fapi2::TARGET_TYPE_OBUS: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_OBUS; + break; + case fapi2::TARGET_TYPE_NV: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_NVBUS; + break; + case fapi2::TARGET_TYPE_SBE: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_SBE; + break; + case fapi2::TARGET_TYPE_PPE: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_PPE; + break; + case fapi2::TARGET_TYPE_PERV: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_PERV; + break; + case fapi2::TARGET_TYPE_PEC: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_PEC; + break; + case fapi2::TARGET_TYPE_PHB: + o_class = TARGETING::CLASS_UNIT; + o_type = TARGETING::TYPE_PHB; + break; + default: + o_class = TARGETING::CLASS_NA; + o_type = TARGETING::TYPE_NA; + } +} + +/// +/// @brief Is this target type pair a physical parent <-> child? +/// @return Return true if the types have physically parent <-> child +/// relationship; false otherwise. +/// +bool isPhysParentChild(const TargetType i_parentType, + const TargetType i_childType) +{ + bool l_result = false; + if (i_parentType == TARGET_TYPE_PROC_CHIP) + { + if ( (i_childType & (TARGET_TYPE_EX | + TARGET_TYPE_MCS | + TARGET_TYPE_XBUS | + TARGET_TYPE_ABUS | + TARGET_TYPE_CORE | + TARGET_TYPE_EQ | + TARGET_TYPE_MCA | + TARGET_TYPE_MCBIST | + TARGET_TYPE_MI | + TARGET_TYPE_CAPP | + TARGET_TYPE_DMI | + TARGET_TYPE_OBUS | + TARGET_TYPE_NV | + TARGET_TYPE_SBE | + TARGET_TYPE_PPE | + TARGET_TYPE_PERV | + TARGET_TYPE_PEC)) != 0 ) + { + l_result = true; + } + } + else if (i_parentType == TARGET_TYPE_MEMBUF_CHIP) + { + if ( (i_childType & (TARGET_TYPE_MBA | TARGET_TYPE_L4)) != 0 ) + { + l_result = true; + } + } + return l_result; +} + +/// +/// @brief Processes any FFDC in the ReturnCode Error Information and adds them +/// to the error log +/// +/// @param[i] i_errInfo Reference to ReturnCode Error Information +/// @param[io] io_pError Errorlog Handle +/// +void processEIFfdcs(const ErrorInfo & i_errInfo, + errlHndl_t io_pError) +{ + // Iterate through the FFDC sections, adding each to the error log + uint32_t l_size = 0; + + for (auto itr = i_errInfo.iv_ffdcs.begin(); + itr != i_errInfo.iv_ffdcs.end(); ++itr) + { + const void * l_pFfdc = (*itr)->getData(l_size); + uint32_t l_ffdcId = (*itr)->getFfdcId(); + + // Add the FFDC ID as the first word, then the FFDC data + FAPI_DBG("processEIFfdcs: Adding %d bytes of FFDC (id:0x%08x)", l_size, + l_ffdcId); + ERRORLOG::ErrlUD * l_pUD = io_pError->addFFDC( + HWPF_COMP_ID, &l_ffdcId, sizeof(l_ffdcId), 1, + HWPF_FAPI2_UDT_HWP_FFDC); + + if (l_pUD) + { + io_pError->appendToFFDC(l_pUD, l_pFfdc, l_size); + } + } +} + +/// +/// @brief Processes any HW callouts requests in the ReturnCode Error +/// Information and adds them to the error log +/// +/// @param[i] i_errInfo Reference to ReturnCode Error Information +/// @param[io] io_pError Errorlog Handle +/// +void processEIHwCallouts(const ErrorInfo & i_errInfo, + errlHndl_t io_pError) +{ + // Iterate through the HW callout requests, adding each to the error log + for (auto itr = i_errInfo.iv_hwCallouts.begin(); + itr != i_errInfo.iv_hwCallouts.end(); ++itr) + { + HWAS::callOutPriority l_priority = + xlateCalloutPriority((*itr)->iv_calloutPriority); + + HwCallouts::HwCallout l_hw = ((*itr)->iv_hw); + + TARGETING::Target * l_pRefTarget = + reinterpret_cast<TARGETING::Target*>((*itr)->iv_refTarget.get()); + + if ( ((l_hw == HwCallouts::TOD_CLOCK) || + (l_hw == HwCallouts::MEM_REF_CLOCK) || + (l_hw == HwCallouts::PROC_REF_CLOCK) || + (l_hw == HwCallouts::PCI_REF_CLOCK)) && + l_pRefTarget != NULL) + { + HWAS::clockTypeEnum l_clock = + xlateClockHwCallout((*itr)->iv_hw); + + FAPI_ERR("processEIHwCallouts: Adding clock-callout" + " (clock:%d, pri:%d)", + l_clock, l_priority); + + // Force PCI clocks to be deconfigured and garded + if( l_hw == HwCallouts::PCI_REF_CLOCK ) + { + io_pError->addClockCallout(l_pRefTarget, + l_clock, + l_priority, + HWAS::DECONFIG, + HWAS::GARD_Predictive); + } + else + { + io_pError->addClockCallout(l_pRefTarget, l_clock, l_priority); + } + } + else if ( (l_hw == HwCallouts::FLASH_CONTROLLER_PART) || + (l_hw == HwCallouts::PNOR_PART) || + (l_hw == HwCallouts::SBE_SEEPROM_PART) || + (l_hw == HwCallouts::VPD_PART) || + (l_hw == HwCallouts::LPC_SLAVE_PART) || + (l_hw == HwCallouts::GPIO_EXPANDER_PART) || + (l_hw == HwCallouts::SPIVID_SLAVE_PART) ) + { + HWAS::partTypeEnum l_part = + xlatePartHwCallout((*itr)->iv_hw); + + FAPI_ERR("processEIHwCallouts: Adding part-callout" + " (part:%d, pri:%d)", + l_part, l_priority); + io_pError->addPartCallout(l_pRefTarget, l_part, l_priority); + } + else + { + FAPI_ERR("processEIHwCallouts: Unsupported HW callout (%d)", l_hw); + io_pError->addPartCallout(l_pRefTarget, HWAS::NO_PART_TYPE, + l_priority); + io_pError->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE, l_priority); + } + } +} + +/// +/// @brief Processes any Procedure callouts requests in the ReturnCode Error +/// Information and adds them to the error log +/// +/// @param[i] i_errInfo Reference to ReturnCode Error Information +/// @param[io] io_pError Errorlog Handle +/// +void processEIProcCallouts(const ErrorInfo & i_errInfo, + errlHndl_t io_pError) +{ + // Iterate through the procedure callout requests, adding each to the error + // log + for (auto itr = i_errInfo.iv_procedureCallouts.begin(); + itr != i_errInfo.iv_procedureCallouts.end(); ++itr) + { + HWAS::epubProcedureID l_procedure = + xlateProcedureCallout((*itr)->iv_procedure); + + HWAS::callOutPriority l_priority = + xlateCalloutPriority((*itr)->iv_calloutPriority); + + FAPI_DBG("processEIProcCallouts: Adding proc-callout" + " (proc:0x%02x, pri:%d)", + l_procedure, l_priority); + io_pError->addProcedureCallout(l_procedure, l_priority); + } +} + +/// +/// @brief Processes any Bus callouts requests in the ReturnCode Error +/// Information and adds them to the error log +/// +/// @param[i] i_errInfo Reference to ReturnCode Error Information +/// @param[io] io_pError Errorlog Handle +/// +void processEIBusCallouts(const ErrorInfo & i_errInfo, + errlHndl_t io_pError) +{ + // Iterate through the bus callout requests, adding each to the error log + for (auto itr = i_errInfo.iv_busCallouts.begin(); + itr != i_errInfo.iv_busCallouts.end(); ++itr) + { + TARGETING::Target * l_pTarget1 = + reinterpret_cast<TARGETING::Target*>((*itr)->iv_target1.get()); + + TARGETING::Target * l_pTarget2 = + reinterpret_cast<TARGETING::Target*>((*itr)->iv_target2.get()); + + HWAS::callOutPriority l_priority = + xlateCalloutPriority((*itr)->iv_calloutPriority); + + bool l_busTypeValid = true; + HWAS::busTypeEnum l_busType = HWAS::FSI_BUS_TYPE; + TARGETING::TYPE l_type1 = l_pTarget1->getAttr<TARGETING::ATTR_TYPE>(); + TARGETING::TYPE l_type2 = l_pTarget2->getAttr<TARGETING::ATTR_TYPE>(); + + if ( ((l_type1 == TARGETING::TYPE_MCS) && + (l_type2 == TARGETING::TYPE_MEMBUF)) || + ((l_type1 == TARGETING::TYPE_MEMBUF) && + (l_type2 == TARGETING::TYPE_MCS)) ) + { + l_busType = HWAS::DMI_BUS_TYPE; + } + else if ((l_type1 == TARGETING::TYPE_ABUS) && + (l_type2 == TARGETING::TYPE_ABUS)) + { + l_busType = HWAS::A_BUS_TYPE; + } + else if ((l_type1 == TARGETING::TYPE_XBUS) && + (l_type2 == TARGETING::TYPE_XBUS)) + { + l_busType = HWAS::X_BUS_TYPE; + } + else + { + FAPI_ERR("processEIBusCallouts: Bus between target types not known (0x%08x:0x%08x)", + l_type1, l_type2); + l_busTypeValid = false; + } + + if (l_busTypeValid) + { + FAPI_DBG("processEIBusCallouts: Adding bus-callout" + " (bus:%d, pri:%d)", + l_busType, l_priority); + io_pError->addBusCallout(l_pTarget1, l_pTarget2, l_busType, + l_priority); + } + } +} + +/// +/// @brief Processes any Callout/Deconfigure/GARD requests in the +/// ReturnCode Error Information and adds them to the error log +/// +/// @param[i] i_errInfo Reference to ReturnCode Error Information +/// @param[io] io_pError Errorlog Handle +/// +void processEICDGs(const ErrorInfo & i_errInfo, + errlHndl_t io_pError) +{ + // Iterate through the CGD requests, adding each to the error log + for (auto itr = i_errInfo.iv_CDGs.begin(); + itr != i_errInfo.iv_CDGs.end(); ++itr) + { + TARGETING::Target * l_pTarget = + reinterpret_cast<TARGETING::Target*>((*itr)->iv_target.get()); + + HWAS::callOutPriority l_priority = + xlateCalloutPriority((*itr)->iv_calloutPriority); + + HWAS::DeconfigEnum l_deconfig = HWAS::NO_DECONFIG; + if ((*itr)->iv_deconfigure) + { + l_deconfig = HWAS::DELAYED_DECONFIG; + } + + HWAS::GARD_ErrorType l_gard = HWAS::GARD_NULL; + if ((*itr)->iv_gard) + { + l_gard = HWAS::GARD_Unrecoverable; + } + + FAPI_DBG("processEICDGs: Calling out target" + " (huid:%.8x, pri:%d, deconf:%d, gard:%d)", + TARGETING::get_huid(l_pTarget), l_priority, l_deconfig, + l_gard); + io_pError->addHwCallout(l_pTarget, l_priority, l_deconfig, l_gard); + } + +} + +/// +/// @brief Returns child targets to Callout/Deconfigure/GARD +/// +/// @param[i] i_parentTarget FAPI2 Parent Target +/// @param[i] i_childType FAPI2 Child Type +/// @param[i] i_childPort Child Port Number +/// For DIMMs: MBA Port Number +/// Else unused +/// @param[i] i_childNum Child Number +/// For DIMMs: DIMM Socket Number +/// For Chips: Chip Position +/// For Chiplets: Chiplet Position +/// +void getChildTargetsForCDG( + const fapi2::Target<fapi2::TARGET_TYPE_ALL>& i_parentTarget, + const fapi2::TargetType i_childType, + const uint8_t i_childPort, + const uint8_t i_childNum, + TARGETING::TargetHandleList & o_childTargets) +{ + o_childTargets.clear(); + + do + { + // Get the parent TARGETING::Target + TARGETING::Target * l_pTargParent = + reinterpret_cast<TARGETING::Target *>(i_parentTarget.get()); + + if (l_pTargParent == NULL) + { + FAPI_ERR("getChildTargetsForCDG: NULL Target pointer"); + break; + } + + // Find if the child target type is a dimm, chip or chiplet + bool l_childIsDimm = false; + bool l_childIsChip = false; + bool l_childIsChiplet = false; + + if (i_childType == fapi2::TARGET_TYPE_DIMM) + { + l_childIsDimm = true; + } + else + { + l_childIsChip = fapi2::Target<TARGET_TYPE_ALL>::isChip(i_childType); + if (!l_childIsChip) + { + l_childIsChiplet = fapi2::Target<TARGET_TYPE_ALL>:: + isChiplet(i_childType); + } + } + + // Translate the FAPI child target type into TARGETING Class/Type + TARGETING::CLASS l_targChildClass = TARGETING::CLASS_NA; + TARGETING::TYPE l_targChildType = TARGETING::TYPE_NA; + xlateTargetType(i_childType, l_targChildClass, l_targChildType); + + if (l_targChildType == TARGETING::TYPE_NA) + { + FAPI_ERR("getChildTargetsForCDG: Could not xlate child type (0x%08x)", + i_childType); + break; + } + + // Get the child targets + TARGETING::TargetHandleList l_targChildList; + + if ( isPhysParentChild(i_parentTarget.getType(), i_childType) ) + { + // Child by containment + TARGETING::getChildChiplets(l_targChildList, l_pTargParent, + l_targChildType); + FAPI_ERR("getChildTargetsForCDG: Got %d candidate children by containment", + l_targChildList.size()); + } + else + { + // Assumption is child by affinity + TARGETING::getChildAffinityTargets(l_targChildList, l_pTargParent, + l_targChildClass, + l_targChildType); + FAPI_ERR("getChildTargetsForCDG: Got %d candidate children by affinity", + l_targChildList.size()); + } + + // Filter out child targets based on type and input port/number + for (TARGETING::TargetHandleList::const_iterator + l_itr = l_targChildList.begin(); + l_itr != l_targChildList.end(); ++l_itr) + { + if (l_childIsDimm) + { + // Match i_childPort and i_childNum + if ( ((i_childPort == ErrorInfoChildrenCDG::ALL_CHILD_PORTS) || + (i_childPort == + (*l_itr)->getAttr<TARGETING::ATTR_MBA_PORT>())) + && + ((i_childNum == ErrorInfoChildrenCDG::ALL_CHILD_NUMBERS) || + (i_childNum == + (*l_itr)->getAttr<TARGETING::ATTR_MBA_DIMM>())) ) + { + o_childTargets.push_back(*l_itr); + } + } + else if (l_childIsChip) + { + // Match i_childNum + if ((i_childNum == ErrorInfoChildrenCDG::ALL_CHILD_NUMBERS) || + (i_childNum == + (*l_itr)->getAttr<TARGETING::ATTR_POSITION>())) + { + o_childTargets.push_back(*l_itr); + } + } + else if (l_childIsChiplet) + { + // Match i_childNum + if ((i_childNum == ErrorInfoChildrenCDG::ALL_CHILD_NUMBERS) || + (i_childNum == + (*l_itr)->getAttr<TARGETING::ATTR_CHIP_UNIT>())) + { + o_childTargets.push_back(*l_itr); + } + } + else + { + // Do not match on anything + o_childTargets.push_back(*l_itr); + } + } + } while(0); +} + +/// +/// @brief Processes any Children Callout/Deconfigure/GARD requests in the +/// ReturnCode Error Information and adds them to the error log +/// +/// @param[i] i_errInfo Reference to ReturnCode Error Information +/// @param[io] io_pError Errorlog Handle +/// +void processEIChildrenCDGs(const ErrorInfo & i_errInfo, + errlHndl_t io_pError) +{ + // Iterate through the Child CGD requests, adding each to the error log + for (auto itr = i_errInfo.iv_childrenCDGs.begin(); + itr != i_errInfo.iv_childrenCDGs.end(); ++itr) + { + HWAS::callOutPriority l_priority = + xlateCalloutPriority((*itr)->iv_calloutPriority); + + HWAS::DeconfigEnum l_deconfig = HWAS::NO_DECONFIG; + if ((*itr)->iv_deconfigure) + { + l_deconfig = HWAS::DELAYED_DECONFIG; + } + + HWAS::GARD_ErrorType l_gard = HWAS::GARD_NULL; + if ((*itr)->iv_gard) + { + l_gard = HWAS::GARD_Unrecoverable; + } + + // Get a list of children to callout + TARGETING::TargetHandleList l_children; + getChildTargetsForCDG((*itr)->iv_parent, + (*itr)->iv_childType, + (*itr)->iv_childPort, + (*itr)->iv_childNumber, + l_children); + + // Callout/Deconfigure/GARD each child as appropriate + for (TARGETING::TargetHandleList::const_iterator + itr = l_children.begin(); + itr != l_children.end(); ++itr) + { + FAPI_DBG("processEIChildrenCDGs: Calling out target" + " (huid:%.8x, pri:%d, deconf:%d, gard:%d)", + TARGETING::get_huid(*itr), l_priority, l_deconfig, + l_gard); + io_pError->addHwCallout(*itr, l_priority, l_deconfig, l_gard); + } + } +} + +/// +/// @brief Converts a fapi2::ReturnCode to a HostBoot PLAT error log +/// See doxygen in plat_utils.H +/// +errlHndl_t rcToErrl(ReturnCode & io_rc, + ERRORLOG::errlSeverity_t i_sev) +{ + errlHndl_t l_pError = NULL; + + FAPI_DBG("Entering rcToErrl"); + + if (io_rc) + { + uint64_t l_rcValue = io_rc; + + // ReturnCode contains an error. Find out which component of the HWPF + // created the error + ReturnCode::returnCodeCreator l_creator = io_rc.getCreator(); + if (l_creator == ReturnCode::CREATOR_PLAT) + { + // PLAT error. Release the errlHndl_t + FAPI_ERR("rcToErrl: PLAT error: 0x%08x", l_rcValue); + //@TODO RTC:143127 + //l_pError = reinterpret_cast<errlHndl_t> (io_rc.releaseData()); + } + else if (l_creator == ReturnCode::CREATOR_HWP) + { + // HWP Error. Create an error log + FAPI_ERR("rcToErrl: HWP error: 0x%08x", l_rcValue); + + /*@ + * @errortype + * @moduleid MOD_FAPI2_RC_TO_ERRL + * @reasoncode RC_HWP_GENERATED_ERROR + * @userdata1 RC value from HWP + * @userdata2 <unused> + * @devdesc HW Procedure generated error. See User Data. + * @custdesc Error initializing processor/memory subsystem + * during boot. See FRU list for repair actions + */ + l_pError = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + MOD_FAPI2_RC_TO_ERRL, + RC_HWP_GENERATED_ERROR, + l_rcValue); + + // Add the rcValue as FFDC. This will explain what the error was + l_pError->addFFDC(HWPF_COMP_ID, &l_rcValue, sizeof(l_rcValue), 1, + HWPF_FAPI2_UDT_HWP_RCVALUE); + + // Get the Error Information Pointer + const ErrorInfo* l_pErrorInfo = io_rc.getErrorInfo(); + if (l_pErrorInfo) + { + // There is error information associated with the ReturnCode + processEIFfdcs(*l_pErrorInfo, l_pError); + processEIProcCallouts(*l_pErrorInfo, l_pError); + processEIBusCallouts(*l_pErrorInfo, l_pError); + processEICDGs(*l_pErrorInfo, l_pError); + processEIChildrenCDGs(*l_pErrorInfo, l_pError); + processEIHwCallouts(*l_pErrorInfo, l_pError); + } + else + { + FAPI_ERR("rcToErrl: No Error Information"); + } + } + else + { + // FAPI error. Create an error log + FAPI_ERR("rcToErrl: FAPI error: 0x%08x", l_rcValue); + + // The errlog reason code is the HWPF compID and the rcValue LSB + uint16_t l_reasonCode = l_rcValue; + l_reasonCode &= 0xff; + l_reasonCode |= HWPF_COMP_ID; + + // HostBoot errlog tags for FAPI errors are in hwpfReasonCodes.H + l_pError = new ERRORLOG::ErrlEntry(i_sev, + MOD_FAPI2_RC_TO_ERRL, + l_reasonCode); + + // FAPI may have added Error Information. + // Get the Error Information Pointer + const ErrorInfo* l_pErrorInfo = io_rc.getErrorInfo(); + if (l_pErrorInfo) + { + processEIFfdcs(*l_pErrorInfo, l_pError); + processEIProcCallouts(*l_pErrorInfo, l_pError); + processEIBusCallouts(*l_pErrorInfo, l_pError); + processEICDGs(*l_pErrorInfo, l_pError); + processEIChildrenCDGs(*l_pErrorInfo, l_pError); + processEIHwCallouts(*l_pErrorInfo, l_pError); + } + } + + // add the fapi traces to the elog + l_pError->collectTrace(FAPI_TRACE_NAME, 256 ); + l_pError->collectTrace(FAPI_IMP_TRACE_NAME, 384 ); + l_pError->collectTrace(FAPI_SCAN_TRACE_NAME, 256 ); + } + + FAPI_DBG("Exiting rcToErrl"); + return l_pError; +} + +/// +/// @brief Log an error. +/// +void logError( + fapi2::ReturnCode & io_rc, + fapi2::errlSeverity_t i_sev, + bool i_unitTestError ) +{ + FAPI_DBG("Entering logError"); + + // ENUM CONVERSION FAPI to PLATFORM + errlHndl_t l_pError = NULL; + + FAPI_INF("logError"); + + // Convert a FAPI severity to a ERRORLOG severity + ERRORLOG::errlSeverity_t l_sev = ERRORLOG::ERRL_SEV_UNRECOVERABLE; + switch (i_sev) + { + case fapi2::FAPI2_ERRL_SEV_RECOVERED: + l_sev = ERRORLOG::ERRL_SEV_RECOVERED; + break; + case fapi2::FAPI2_ERRL_SEV_PREDICTIVE: + l_sev = ERRORLOG::ERRL_SEV_PREDICTIVE; + break; + case fapi2::FAPI2_ERRL_SEV_UNRECOVERABLE: + // l_sev set above + break; + default: + FAPI_ERR("severity (i_sev) of %d is unknown",i_sev); + break; + } + + // Convert the return code to an error log. + // This will set the return code to FAPI2_RC_SUCCESS and clear any + // PLAT Data, HWP FFDC data, and Error Target associated with it. + l_pError = rcToErrl(io_rc, l_sev); + + // Commit the error log. This will delete the error log and set the handle + // to NULL. + if (i_unitTestError) + { + errlCommit(l_pError, CXXTEST_COMP_ID); + } + else + { + errlCommit(l_pError, HWPF_COMP_ID); + } + + return; +} + +ReturnCode delay(uint64_t i_nanoSeconds, uint64_t i_simCycles) +{ + nanosleep( 0, i_nanoSeconds ); + return FAPI2_RC_SUCCESS; +} + +/// +/// @brief Assert a condition, and halt +/// +/// @param[in] a boolean representing the assertion +/// +void Assert(bool i_expression) +{ + assert(i_expression); +} + +bool platIsScanTraceEnabled() +{ + // SCAN trace can be dynamically turned on/off, always return true here + return 1; +} + +} //end namespace diff --git a/src/usr/fapi2/test/fapi2HwpTest.C b/src/usr/fapi2/test/fapi2HwpTest.C new file mode 100644 index 000000000..c90431ecb --- /dev/null +++ b/src/usr/fapi2/test/fapi2HwpTest.C @@ -0,0 +1,277 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/fapi2HwpTest.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +#include <errl/errlmanager.H> +#include <errl/errlentry.H> +#include <fapi2.H> +#include <hwpf_fapi2_reasoncodes.H> +#include <fapi2TestUtils.H> + +namespace fapi2 +{ + + +//****************************************************************************** +// fapi2HwpTest +//****************************************************************************** +errlHndl_t fapi2HwpTest() +{ + int numTests = 0; + int numFails = 0; + errlHndl_t l_errl = NULL; + + do + { + // Create a vector of TARGETING::Target pointers + TARGETING::TargetHandleList l_chipList; + + // Get a list of all of the proc chips + TARGETING::getAllChips(l_chipList, TARGETING::TYPE_PROC, false); + + TARGETING::Target * l_nimbusProc = NULL; + + //Take the first NIMBUS proc and use it + for(uint32_t i = 0; i < l_chipList.size(); i++) + { + if(TARGETING::MODEL_NIMBUS == + l_chipList[i]->getAttr<TARGETING::ATTR_MODEL>()) + { + l_nimbusProc = l_chipList[i]; + break; + } + } + numTests++; + if(l_nimbusProc == NULL) + { + // Send an errorlog because we cannot find any NIMBUS procs. + FAPI_ERR("FAPI2_GETPARENT:: could not find Nimbus proc, skipping tests"); + numFails++; + /*@ + * @errortype ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid fapi2::MOD_FAPI2_PLAT_HWP_TEST + * @reasoncode fapi2::RC_NO_PROCS_FOUND + * @userdata1 Model Type we looked for + * @userdata2 Unused + * @devdesc Could not find NIMBUS procs in system model + */ + l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + fapi2::MOD_FAPI2_PLAT_HWP_TEST, + fapi2::RC_NO_PROCS_FOUND, + TARGETING::MODEL_NIMBUS, + NULL, + true/*SW Error*/); + errlCommit(l_errl,HWPF_COMP_ID); + break; + } + + TARGETING::Target* targeting_targets[NUM_TARGETS]; + generateTargets(l_nimbusProc, targeting_targets); + + for( uint64_t x = 0; x < NUM_TARGETS; x++ ) + { + if(targeting_targets[x] == NULL) + { + FAPI_ERR("Unable to find target for item %d in targeting_targets", x); + + /*@ + * @errortype ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid fapi2::MOD_FAPI2_PLAT_HWP_TEST + * @reasoncode fapi2::RC_NO_PATH_TO_TARGET_FOUND + * @userdata1 Index of target in array of objects + * @userdata2 Unused + * @devdesc Could not find a path to the target of that type + */ + l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + fapi2::MOD_FAPI2_PLAT_HWP_TEST, + fapi2::RC_NO_PATH_TO_TARGET_FOUND, + x, + NULL, + true/*SW Error*/); + errlCommit(l_errl,HWPF_COMP_ID); + } + } + + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> fapi2_procTarget(l_nimbusProc); + fapi2::Target<fapi2::TARGET_TYPE_EQ> fapi2_eqTarget(targeting_targets[MY_EQ]); + fapi2::Target<fapi2::TARGET_TYPE_EX> fapi2_exTarget(targeting_targets[MY_EX]); + fapi2::Target<fapi2::TARGET_TYPE_CORE> fapi2_coreTarget( + targeting_targets[MY_CORE]); + fapi2::Target<fapi2::TARGET_TYPE_MCS> fapi2_mcsTarget(targeting_targets[MY_MCS]); + fapi2::Target<fapi2::TARGET_TYPE_MCA> fapi2_mcaTarget(targeting_targets[MY_MCA]); + fapi2::Target<fapi2::TARGET_TYPE_MCBIST> fapi2_mcbistTarget( + targeting_targets[MY_MCBIST]); + fapi2::Target<fapi2::TARGET_TYPE_PEC> fapi2_pecTarget(targeting_targets[MY_PEC]); + fapi2::Target<fapi2::TARGET_TYPE_PHB> fapi2_phbTarget(targeting_targets[MY_PHB]); + fapi2::Target<fapi2::TARGET_TYPE_XBUS> fapi2_xbusTarget( + targeting_targets[MY_XBUS]); + fapi2::Target<fapi2::TARGET_TYPE_OBUS> fapi2_obusTarget( + targeting_targets[MY_OBUS]); + fapi2::Target<fapi2::TARGET_TYPE_NV> fapi2_nvbusTarget( + targeting_targets[MY_NVBUS]); + fapi2::Target<fapi2::TARGET_TYPE_PPE> fapi2_ppeTarget(targeting_targets[MY_PPE]); + fapi2::Target<fapi2::TARGET_TYPE_PERV> fapi2_pervTarget( + targeting_targets[MY_PERV]); + fapi2::Target<fapi2::TARGET_TYPE_SBE> fapi2_sbeTarget(targeting_targets[MY_SBE]); + fapi2::Target<fapi2::TARGET_TYPE_CAPP> fapi2_cappTarget( + targeting_targets[MY_CAPP]); + + + int scratchWriteValue = 5; + + //Get/Set Attr for all of the targets + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_proc, fapi2_procTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_proc !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_eq, fapi2_eqTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_eq !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_ex, fapi2_exTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_ex !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_core, fapi2_coreTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_core !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_mcs, fapi2_mcsTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_mcs !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_mca, fapi2_mcaTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_mca !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_mcbist, fapi2_mcbistTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_mcbist !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_pec, fapi2_pecTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_pec !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_phb, fapi2_phbTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_phb !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_xbus, fapi2_xbusTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_xbus !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_obus, fapi2_obusTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_obus !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_nv, fapi2_nvbusTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_nv !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_ppe, fapi2_ppeTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_ppe !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_perv, fapi2_pervTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_perv !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_sbe, fapi2_sbeTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_sbe !!"); + } + numTests++; + FAPI_INVOKE_HWP(l_errl, p9_sample_procedure_capp, fapi2_cappTarget, scratchWriteValue); + if(l_errl != NULL) + { + l_errl = NULL; + numFails++; + TS_FAIL("Error occured in p9_sample_procedure_capp !!"); + } + }while(0); + FAPI_INF("test_sampleHWPs:: Test Complete. %d/%d fails", numFails,numTests); + return l_errl; +} + +}
\ No newline at end of file diff --git a/src/usr/fapi2/test/fapi2Test.H b/src/usr/fapi2/test/fapi2Test.H new file mode 100644 index 000000000..76a86a183 --- /dev/null +++ b/src/usr/fapi2/test/fapi2Test.H @@ -0,0 +1,68 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/fapi2Test.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __FAPI2TEST_H__ +#define __FAPI2TEST_H__ + +/** + * @file fapi2Test.H + * + * @brief Test case for SCOM code +*/ + +#include <cxxtest/TestSuite.H> +#include <errl/errlmanager.H> +#include <errl/errlentry.H> +#include <targeting/common/targetservice.H> +#include <fapi2.H> +#include <p9_sample_procedure.H> +#include <hwp_executor.H> +#include <plat_hwp_invoker.H> +#include <pnor/pnorif.H> +#include <targeting/common/utilFilter.H> +#include <fapi2TestUtils.H> +#include <hwpf_fapi2_reasoncodes.H> + +#include "fapi2HwpTest.C" + +using namespace fapi2; + +class fapi2Test: public CxxTest::TestSuite +{ +public: + +/** +* @brief Test some basic HWPs that hit all targets +* that runs through the FAPI2 macros +* +*/ +void test_fapi2HwpTest(void) +{ + FAPI_INF(">>test_fapi2HwpTest starting..."); + fapi2HwpTest(); + FAPI_INF(">>test_fapi2HwpTest exiting..."); +} +}; + +#endif
\ No newline at end of file diff --git a/src/usr/fapi2/test/fapi2TestUtils.C b/src/usr/fapi2/test/fapi2TestUtils.C new file mode 100644 index 000000000..896a94ba8 --- /dev/null +++ b/src/usr/fapi2/test/fapi2TestUtils.C @@ -0,0 +1,314 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/fapi2TestUtils.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file fapi2TestUtils.C +/// +/// @brief FAPI2 utility functions +/// +/// Note that platform code must provide the implementation. +/// + +#include <fapi2.H> +#include "fapi2TestUtils.H" + + +//This is subject to change, try to keep updated +#define NUM_EQS 6 +#define NUM_EXS 12 +#define NUM_CORES 24 +#define NUM_L2S 12 +#define NUM_L3S 12 +#define NUM_MCS 4 +#define NUM_MCAS 8 +#define NUM_MCBISTS 2 +#define NUM_PECS 3 +#define NUM_PHBS 6 +#define NUM_XBUS 1 +#define NUM_OBUS 2 +#define NUM_NVBUS 2 +#define NUM_PPES 21 +#define NUM_PERVS 55 +#define NUM_CAPPS 2 +#define NUM_SBES 1 + +namespace fapi2 +{ + +void generateTargets(TARGETING::Target* i_pMasterProcChip, + TARGETING::Target* o_targetList[]) +{ + for( uint64_t x = 0; x < NUM_TARGETS; x++ ) + { + o_targetList[x] = NULL; + } + + // Set up entity path for NIMBUS proc + TARGETING::EntityPath l_epath; + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + + //Setup EQs, COREs, and EXs + for(int i = 0; i < NUM_EQS; i++) + { + l_epath.addLast(TARGETING::TYPE_EQ,i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_EQ] = + TARGETING::targetService().toTarget(l_epath); + for(int j = 0; j < NUM_EXS; j++) + { + l_epath.addLast(TARGETING::TYPE_EX,i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_EX] = + TARGETING::targetService().toTarget(l_epath); + for(int k = 0; k < NUM_CORES; k++) + { + l_epath.addLast(TARGETING::TYPE_CORE,k); + if(TARGETING::targetService().toTarget(l_epath)!=NULL) + { + o_targetList[MY_CORE] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + break; + } + else + { + l_epath.removeLast(); + } + } + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup MCSs and MCAs + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_MCS; i++) + { + l_epath.addLast(TARGETING::TYPE_MCS, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_MCS] = + TARGETING::targetService().toTarget(l_epath); + for(int j = 0; j < NUM_MCAS; j++) + { + l_epath.addLast(TARGETING::TYPE_MCA,j); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_MCA] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup MCBISTs + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_MCBISTS; i++) + { + l_epath.addLast(TARGETING::TYPE_MCBIST, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_MCBIST] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup PECs and PHBs + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_PECS; i++) + { + l_epath.addLast(TARGETING::TYPE_PEC, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_PEC] = + TARGETING::targetService().toTarget(l_epath); + for(int j = 0; j < NUM_PHBS; j++) + { + l_epath.addLast(TARGETING::TYPE_PHB,j); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_PHB] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup XBUS + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_XBUS; i++) + { + l_epath.addLast(TARGETING::TYPE_XBUS, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_XBUS] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup OBUSs + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_OBUS; i+=3) + { + l_epath.addLast(TARGETING::TYPE_OBUS, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_OBUS] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup NVBUS + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_NVBUS; i++) + { + l_epath.addLast(TARGETING::TYPE_NVBUS, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_NVBUS] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup PPEs + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_PPES; i++) + { + l_epath.addLast(TARGETING::TYPE_PPE, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_PPE] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup CAPPs + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_CAPPS; i++) + { + l_epath.addLast(TARGETING::TYPE_CAPP, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_CAPP] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup SBE + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_SBES; i++) + { + l_epath.addLast(TARGETING::TYPE_SBE, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_SBE] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } + + //Setup PERVs + i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); + for(int i = 0; i < NUM_PERVS; i++) + { + l_epath.addLast(TARGETING::TYPE_PERV, i); + if(TARGETING::targetService().toTarget(l_epath) != NULL) + { + o_targetList[MY_PERV] = + TARGETING::targetService().toTarget(l_epath); + break; + } + else + { + l_epath.removeLast(); + } + } +} + +} // End namespace fapi2 diff --git a/src/usr/fapi2/test/fapi2TestUtils.H b/src/usr/fapi2/test/fapi2TestUtils.H new file mode 100644 index 000000000..15ddb0b6a --- /dev/null +++ b/src/usr/fapi2/test/fapi2TestUtils.H @@ -0,0 +1,66 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/fapi2TestUtils.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +/// +/// @file fapi2TestUtils.H +/// +/// @brief FAPI2 utility functions +/// +/// Note that platform code must provide the implementation. +/// + +#ifndef FAPI2TESTUTILS_H_ +#define FAPI2TESTUTILS_H_ + +#include <fapi2.H> + +namespace fapi2 +{ +// Setup some targets to use +enum{ + MY_EQ, + MY_EX, + MY_CORE, + MY_MCS, + MY_MCA, + MY_MCBIST, + MY_PEC, + MY_PHB, + MY_XBUS, + MY_OBUS, + MY_NVBUS, + MY_PPE, + MY_PERV, + MY_CAPP, + MY_SBE, + NUM_TARGETS +}; + + +void generateTargets(TARGETING::Target* i_pMasterProcChip, + TARGETING::Target* o_targetList[]); + +} // End namespace fapi2 + +#endif diff --git a/src/usr/fapi2/test/makefile b/src/usr/fapi2/test/makefile new file mode 100644 index 000000000..ffebf05e3 --- /dev/null +++ b/src/usr/fapi2/test/makefile @@ -0,0 +1,47 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/fapi2/test/makefile $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2015,2016 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# @file src/usr/fapi2/test/makefile +# +# @brief Makefile for fapi2 test case directory +# +ROOTPATH = ../../../.. +MODULE = testfapi2 + +EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ +EXTRAINCDIR += ${ROOTPATH}/src/usr/fapi2/test/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/ + + +# Procedures +OBJS += p9_sample_procedure.o +OBJS += fapi2TestUtils.o + +TESTS += fapi2Test.H + +include ${ROOTPATH}/config.mk + +vpath %.C ${GENDIR} + diff --git a/src/usr/fapi2/test/p9_sample_procedure.C b/src/usr/fapi2/test/p9_sample_procedure.C new file mode 100644 index 000000000..1d4cf32e9 --- /dev/null +++ b/src/usr/fapi2/test/p9_sample_procedure.C @@ -0,0 +1,386 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/p9_sample_procedure.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <cxxtest/TestSuite.H> +#include <p9_sample_procedure.H> +#include <fapi2.H> +#include <plat_attribute_service.H> + + +//------------------------------------------------------------------------------ +/// @file p9_sample_procedure.C +/// +/// @brief These procedures test FAPI_ATTR_GET, FAPI_ATTR_SET, +/// and FAPI_TRY and FAPI_ERR. This is primarily here to +/// to make sure these compile okay. +//------------------------------------------------------------------------------ + + +fapi2::ReturnCode p9_sample_procedure_proc( + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on PROC Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, + i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on PROC Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, + i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", + l_attr_scratch, + expectedValue); + + + fapi_try_exit: + + FAPI_ERR("Exiting ..."); + + return fapi2::current_err; + +} + + +fapi2::ReturnCode p9_sample_procedure_ex( + fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on EX Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on EX Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_eq( + fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on EQ Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on EQ Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_core( + fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on CORE Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on CORE Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + + + +fapi2::ReturnCode p9_sample_procedure_mcs( + fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on MCS Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on MCS Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_mca( + fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on MCA Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on MCA Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_mcbist( + fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on MCBIST Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on MCBIST Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_xbus( + fapi2::Target<fapi2::TARGET_TYPE_XBUS>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on XBUS Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on XBUS Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_capp( + fapi2::Target<fapi2::TARGET_TYPE_CAPP>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on CAPP Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on CAPP Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_obus( + fapi2::Target<fapi2::TARGET_TYPE_OBUS>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on OBUS Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on OBUS Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_nv( + fapi2::Target<fapi2::TARGET_TYPE_NV>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on NV Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on NV Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_sbe( + fapi2::Target<fapi2::TARGET_TYPE_SBE>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on SBE Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on SBE Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_ppe( + fapi2::Target<fapi2::TARGET_TYPE_PPE>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on PPE Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on PPE Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_perv( + fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on PERV Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on PERV Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_phb( + fapi2::Target<fapi2::TARGET_TYPE_PHB>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on PHB Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on PHB Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + +fapi2::ReturnCode p9_sample_procedure_pec( + fapi2::Target<fapi2::TARGET_TYPE_PEC>& i_target, + uint8_t expectedValue) +{ + uint8_t l_attr_scratch = 0; + FAPI_ERR("Entering ..."); + FAPI_ERR("Set Scratch Attr on PEC Target"); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + expectedValue)); + + FAPI_ERR("Get Scratch Attr on PEC Target"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target, + l_attr_scratch)); + FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue); + +fapi_try_exit: + FAPI_ERR("Exiting ..."); + return fapi2::current_err; + +} + diff --git a/src/usr/fapi2/test/p9_sample_procedure.H b/src/usr/fapi2/test/p9_sample_procedure.H new file mode 100644 index 000000000..e931e7624 --- /dev/null +++ b/src/usr/fapi2/test/p9_sample_procedure.H @@ -0,0 +1,117 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/fapi2/test/p9_sample_procedure.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +//------------------------------------------------------------------------------ +/// @file p9_sample_procedure.H +/// +/// @brief This procedure is a sample p9 procedure for compilation testing +//------------------------------------------------------------------------------ + +#ifndef _P9_SAMPLE_PROCEDURE_H_ +#define _P9_SAMPLE_PROCEDURE_H_ + + +#include <fapi2.H> +#include <error_scope.H> + +typedef fapi2::ReturnCode (*p9_sample_procedure_FP_t)(const + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&); + +/// @brief This sample function has some CFAM/SCOM access for compilation +/// testing +/// +/// @param[in] i_target Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +extern "C" +{ + +fapi2::ReturnCode p9_sample_procedure_proc( + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, + uint8_t expectedValue); + + +fapi2::ReturnCode p9_sample_procedure_ex( + fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, + uint8_t expectedValue); + + +fapi2::ReturnCode p9_sample_procedure_eq( + fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_core( + fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target, + uint8_t expectedValue); + + +fapi2::ReturnCode p9_sample_procedure_mcs( + fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_mca( + fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_mcbist( + fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_xbus( + fapi2::Target<fapi2::TARGET_TYPE_XBUS>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_capp( + fapi2::Target<fapi2::TARGET_TYPE_CAPP>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_obus( + fapi2::Target<fapi2::TARGET_TYPE_OBUS>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_nv( + fapi2::Target<fapi2::TARGET_TYPE_NV>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_sbe( + fapi2::Target<fapi2::TARGET_TYPE_SBE>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_ppe( + fapi2::Target<fapi2::TARGET_TYPE_PPE>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_perv( + fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_phb( + fapi2::Target<fapi2::TARGET_TYPE_PHB>& i_target, + uint8_t expectedValue); + +fapi2::ReturnCode p9_sample_procedure_pec( + fapi2::Target<fapi2::TARGET_TYPE_PEC>& i_target, + uint8_t expectedValue); +} + +#endif // _P9_SAMPLE_PROCEDURE_H_ diff --git a/src/usr/initservice/extinitsvc/extinitsvctasks.H b/src/usr/initservice/extinitsvc/extinitsvctasks.H index 964649179..8d1c44ab4 100644 --- a/src/usr/initservice/extinitsvc/extinitsvctasks.H +++ b/src/usr/initservice/extinitsvc/extinitsvctasks.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -240,6 +240,19 @@ const TaskInfo g_exttaskinfolist[] = { EXT_IMAGE, // Extended Module } }, + /** + * @brief fapi2 task, + */ + { + "libfapi2.so" , // taskname + NULL, // no pointer to fn + { + INIT_TASK, // task type + EXT_IMAGE, // Extended Module + } + }, + + // @todo RTC:137627 - remove for p9 bringup #if (0) // No mdia in VPO diff --git a/src/usr/isteps/istep07/call_mss_freq.C b/src/usr/isteps/istep07/call_mss_freq.C index 2ba73a9f7..20df3f06b 100644 --- a/src/usr/isteps/istep07/call_mss_freq.C +++ b/src/usr/isteps/istep07/call_mss_freq.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -54,7 +54,6 @@ using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; using namespace TARGETING; -using namespace fapi; // // Wrapper function to call mss_freq diff --git a/src/usr/isteps/istep07/call_mss_volt.C b/src/usr/isteps/istep07/call_mss_volt.C index c6ef47aa8..33671fec5 100644 --- a/src/usr/isteps/istep07/call_mss_volt.C +++ b/src/usr/isteps/istep07/call_mss_volt.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -59,75 +59,77 @@ using namespace ISTEP_ERROR; using namespace ERRORLOG; using namespace TARGETING; -// helper function to call multiple mss_volt_hwps -void call_mss_volt_hwp (std::vector<TARGETING::ATTR_VMEM_ID_type>& i_VmemList, - TARGETING::TargetHandleList& i_membufTargetList, - IStepError& io_StepError, - fapi::ReturnCode(*mss_volt_hwp)(std::vector<fapi::Target>&)) -{ - /* @TODO: RTC:133830 Add wrapper back when ready - errlHndl_t l_err; - //for each unique VmemId filter it out of the list of membuf targets - //to create a subsetlist of membufs with just that vmemid - std::vector<TARGETING::ATTR_VMEM_ID_type>::iterator l_vmem_iter; - for (l_vmem_iter = i_VmemList.begin(); - l_vmem_iter != i_VmemList.end(); - ++l_vmem_iter) - { - // declare a vector of fapi targets to pass to mss_volt procedures - std::vector<fapi::Target> l_membufFapiTargets; - - for (TargetHandleList::const_iterator - l_membuf_iter = i_membufTargetList.begin(); - l_membuf_iter != i_membufTargetList.end(); - ++l_membuf_iter) - { - // make a local copy of the target for ease of use - const TARGETING::Target* l_membuf_target = *l_membuf_iter; - if (l_membuf_target->getAttr<ATTR_VMEM_ID>()==*l_vmem_iter) - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "===== add to fapi::Target vector vmem_id=0x%08X " - "target HUID %.8X", - l_membuf_target->getAttr<ATTR_VMEM_ID>(), - TARGETING::get_huid(l_membuf_target)); - - fapi::Target l_membuf_fapi_target(fapi::TARGET_TYPE_MEMBUF_CHIP, - (const_cast<TARGETING::Target*>(l_membuf_target)) ); - - l_membufFapiTargets.push_back( l_membuf_fapi_target ); - } - } - - //now have the a list of fapi membufs with just the one VmemId - //call the HWP on the list of fapi targets - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "===== mss_volt HWP( vector )" ); - - FAPI_INVOKE_HWP(l_err, mss_volt_hwp, l_membufFapiTargets); - - // process return code. - if ( l_err ) - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR 0x%.8X: mss_volt HWP( ) ", - l_err->reasonCode()); - - // Create IStep error log and cross reference to error that occurred - io_StepError.addErrorDetails( l_err ); - - // Commit Error - errlCommit( l_err, HWPF_COMP_ID ); - - } - else - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS : mss_volt_dimm_count HWP( )" ); - } - } - */ -} +// // helper function to call multiple mss_volt_hwps +// void call_mss_volt_hwp ( +// std::vector<TARGETING::ATTR_VMEM_ID_type>& i_VmemList, +// TARGETING::TargetHandleList& i_membufTargetList, +// IStepError& io_StepError, +// fapi2::ReturnCode(*mss_volt_hwp)( +// std::vector<fapi::Target>&)) +// { +// /* @TODO: RTC:133830 Add wrapper back when ready +// errlHndl_t l_err; +// //for each unique VmemId filter it out of the list of membuf targets +// //to create a subsetlist of membufs with just that vmemid +// std::vector<TARGETING::ATTR_VMEM_ID_type>::iterator l_vmem_iter; +// for (l_vmem_iter = i_VmemList.begin(); +// l_vmem_iter != i_VmemList.end(); +// ++l_vmem_iter) +// { +// // declare a vector of fapi targets to pass to mss_volt procedures +// std::vector<fapi::Target> l_membufFapiTargets; +// +// for (TargetHandleList::const_iterator +// l_membuf_iter = i_membufTargetList.begin(); +// l_membuf_iter != i_membufTargetList.end(); +// ++l_membuf_iter) +// { +// // make a local copy of the target for ease of use +// const TARGETING::Target* l_membuf_target = *l_membuf_iter; +// if (l_membuf_target->getAttr<ATTR_VMEM_ID>()==*l_vmem_iter) +// { +// TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, +// "===== add to fapi::Target vector vmem_id=0x%08X " +// "target HUID %.8X", +// l_membuf_target->getAttr<ATTR_VMEM_ID>(), +// TARGETING::get_huid(l_membuf_target)); +// +// fapi::Target l_membuf_fapi_target(fapi::TARGET_TYPE_MEMBUF_CHIP, +// (const_cast<TARGETING::Target*>(l_membuf_target)) ); +// +// l_membufFapiTargets.push_back( l_membuf_fapi_target ); +// } +// } +// +// //now have the a list of fapi membufs with just the one VmemId +// //call the HWP on the list of fapi targets +// TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, +// "===== mss_volt HWP( vector )" ); +// +// FAPI_INVOKE_HWP(l_err, mss_volt_hwp, l_membufFapiTargets); +// +// // process return code. +// if ( l_err ) +// { +// TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, +// "ERROR 0x%.8X: mss_volt HWP( ) ", +// l_err->reasonCode()); +// +// // Create IStep error log and cross reference to error that occurred +// io_StepError.addErrorDetails( l_err ); +// +// // Commit Error +// errlCommit( l_err, HWPF_COMP_ID ); +// +// } +// else +// { +// TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, +// "SUCCESS : mss_volt_dimm_count HWP( )" ); +// } +// } +// */ +// } // // Wrapper function to call mss_volt diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C index 47c03879b..f3760ede6 100644 --- a/src/usr/isteps/istep21/call_host_start_payload.C +++ b/src/usr/isteps/istep21/call_host_start_payload.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -56,7 +56,6 @@ using namespace ERRORLOG; using namespace ISTEP; using namespace ISTEP_ERROR; using namespace TARGETING; -using namespace fapi; namespace ISTEP_21 { diff --git a/src/usr/makefile b/src/usr/makefile index 60f3722df..f0ef233fe 100644 --- a/src/usr/makefile +++ b/src/usr/makefile @@ -40,6 +40,7 @@ SUBDIRS += scom.d SUBDIRS += xscom.d SUBDIRS += targeting.d SUBDIRS += initservice.d +SUBDIRS += fapi2.d SUBDIRS += pnor.d SUBDIRS += i2c.d SUBDIRS += vfs.d diff --git a/src/usr/scom/runtime/handleSpecialWakeup.C b/src/usr/scom/runtime/handleSpecialWakeup.C index 0a97b41dd..c41e922d5 100644 --- a/src/usr/scom/runtime/handleSpecialWakeup.C +++ b/src/usr/scom/runtime/handleSpecialWakeup.C @@ -5,8 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ -/* [+] Google Inc. */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -42,7 +41,6 @@ extern "C" extern trace_desc_t* g_trac_scom; using namespace TARGETING; -using namespace fapi; errlHndl_t handleSpecialWakeup(TARGETING::Target* i_exTarget, bool i_enableDisable) diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 5d83c431d..813204720 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -454,6 +454,100 @@ </attribute> <attribute> + <id>SCRATCH_INT8_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int8_t> + </int8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT8_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT8_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int8_t> + </int8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT8_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_UINT16_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <uint16_t> + </uint16_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_UINT16_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> +<attribute> + <id>SCRATCH_UINT16_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <uint16_t> + </uint16_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_UINT16_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT16_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int16_t> + </int16_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT16_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> +<attribute> + <id>SCRATCH_INT16_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int16_t> + </int16_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT16_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>SCRATCH_UINT32_1</id> <description>Scratch attribute that can be used for dev/test</description> <simpleType> @@ -486,6 +580,38 @@ </attribute> <attribute> + <id>SCRATCH_INT32_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT32_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT32_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT32_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>SCRATCH_UINT64_1</id> <description>Scratch attribute that can be used for dev/test</description> <simpleType> @@ -518,6 +644,38 @@ </attribute> <attribute> + <id>SCRATCH_INT64_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int64_t> + </int64_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT64_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT64_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int64_t> + </int64_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT64_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>SCRATCH_UINT8_ARRAY_1</id> <description>Scratch attribute that can be used for dev/test</description> <simpleType> @@ -552,6 +710,108 @@ </attribute> <attribute> + <id>SCRATCH_INT8_ARRAY_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int8_t> + </int8_t> + <array>32</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT8_ARRAY_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT8_ARRAY_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int8_t> + </int8_t> + <array>2, 3, 4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT8_ARRAY_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_UINT16_ARRAY_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <uint16_t> + </uint16_t> + <array>16</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_UINT16_ARRAY_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_UINT16_ARRAY_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <uint16_t> + </uint16_t> + <array>2, 3, 4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_UINT16_ARRAY_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT16_ARRAY_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int16_t> + </int16_t> + <array>16</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT16_ARRAY_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT16_ARRAY_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int16_t> + </int16_t> + <array>2, 3, 4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT16_ARRAY_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>SCRATCH_UINT32_ARRAY_1</id> <description>Scratch attribute that can be used for dev/test</description> <simpleType> @@ -586,6 +846,41 @@ </attribute> <attribute> + <id>SCRATCH_INT32_ARRAY_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int32_t> + </int32_t> + <array>8</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT32_ARRAY_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT32_ARRAY_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int32_t> + </int32_t> + <array>2,3</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT32_ARRAY_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + + +<attribute> <id>SCRATCH_UINT64_ARRAY_1</id> <description>Scratch attribute that can be used for dev/test</description> <simpleType> @@ -620,6 +915,40 @@ </attribute> <attribute> + <id>SCRATCH_INT64_ARRAY_1</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int64_t> + </int64_t> + <array>4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT64_ARRAY_1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>SCRATCH_INT64_ARRAY_2</id> + <description>Scratch attribute that can be used for dev/test</description> + <simpleType> + <int64_t> + </int64_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_SCRATCH_INT64_ARRAY_2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>DUMMY_RW</id> <description>Dummy attribute with read/write permissions</description> <simpleType> @@ -15887,9 +16216,9 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <id>WOF_ENABLED</id> <description> Defines if the Workload Optimization Frequency (WOF) system feature - where OCC algorithms will change (typically boost) the operational - frequency based on measured power available and any currently idling - cores. + where OCC algorithms will change (typically boost) the operational + frequency based on measured power available and any currently idling + cores. </description> <simpleType> <uint8_t> @@ -16290,7 +16619,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC12</id> <description>F0RC0C - Training Control Word; - Default value - 00. Values Range from 00 to 07 decimal.No need to calculate; User can override with desired experimental value. + Default value - 00. Values Range from 00 to 07 decimal.No need to calculate; User can override with desired experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16313,7 +16642,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <id>EFF_DIMM_DDR4_RC13</id> <description>F0RC0D - DIMM Configuration Control Word; Default value - 0x0B. Values Range from 00 to 15 decimal. - Dynamically calculated using 4 bits[0:3] Bit 0 - Address Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / Quad CS mode etc); + Dynamically calculated using 4 bits[0:3] Bit 0 - Address Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / Quad CS mode etc); creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16334,7 +16663,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC14</id> - <description>F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY and assign; Values Range from 00 to 0F. + <description>F0RC0E - Parity Control Word; Default value - 00. Check from ATTR_EFF_CA_PARITY and assign; Values Range from 00 to 0F. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16379,7 +16708,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC_1x</id> <description>F0RC1x - Internal VrefCA Control Word; - Default value - 00. Values Range from 00 to 3F.No need to calculate; User can override with desired experimental value. + Default value - 00. Values Range from 00 to 3F.No need to calculate; User can override with desired experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16402,7 +16731,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC_2x</id> <description>F0RC2x: I2C Bus Control Word; - Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. + Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16425,7 +16754,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC_3x</id> <description>F0RC3x - Fine Granularity RDIMM Operating Speed; - Default value = (Operating Freq - 1250)/20. Values Range from 00 to 61 Hex. + Default value = (Operating Freq - 1250)/20. Values Range from 00 to 61 Hex. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16494,7 +16823,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC_6x</id> <description>F0RC6x: CW Data Control Word; - Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. + Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16563,7 +16892,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC_9x</id> <description>F0RC9x1: QxODT[1:0] Write Pattern Control Word; - Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. + Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16586,7 +16915,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC_Ax</id> <description>F0RCAx1: QxODT[1:0] Read Pattern Control Word; - Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. + Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -16608,7 +16937,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <attribute> <id>EFF_DIMM_DDR4_RC_Bx</id> - <description>F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. + <description>F0RCBx: IBT and MRS Snoop Control Word; Default value - 07. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. creator: mss_eff_cnfg consumer: mss_dram_init firmware notes: none @@ -17296,4 +17625,1459 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <readable/> </attribute> +<attribute> + <id>PFET_POWERUP_DELAY_NS</id> + <description> + Time (in nanoseconds) between PFET controller steps (7 of them) when turning + the PFES ON + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <readable/> + <persistency>non-volatile</persistency> + <hwpfToHbAttrMap> + <id>ATTR_PFET_POWERUP_DELAY_NS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>STOP_IMAGE_ADDR</id> + <description> + Addres of Stop Image + </description> + <simpleType> + <uint64_t> + </uint64_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>STOP_IMAGE_SIZE</id> + <description> + Address of Stop Image + </description> + <simpleType> + <uint64_t> + </uint64_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<!--<attribute> + <id>FREQ_PROC_REFCLOCK_KHZ</id> + <description> + The frequency of the processor refclock in kHz. + Provided by the Machine Readable Workbook. + This can be overridden to adjust the refclock frequency. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_PROC_REFCLOCK_KHZ</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<!--<attribute> + <id>FREQ_MEM_REFCLOCK</id> + <description> + The frequency of the memory refclock in MHz. + Provided by the Machine Readable Workbook. + This is read by the set_ref_clock HWP to find out the desired frequency. + This can be overridden to adjust the refclock frequency. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_MEM_REFCLOCK</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<attribute> + <id>MEM_IN_SYNCH_MODE</id> + <description> + Run the memory clocks in synchronous mode with the nest clocks. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_MEM_IN_SYNCH_MODE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>MAX_ALLOWED_DIMM_FREQ</id> + <description> + Maximum frequency (in MHz) that this system can run the DIMMs at. + There are 4 possible values determined by the dimm configuration. + [0]=One rank, single drop + [1]=Two rank, single drop + [2]=One rank, dual drop + [3]=Two rank, dual drop + A value of zero would indicate an unsupported configuration. + </description> + <simpleType> + <uint32_t> + </uint32_t> + <array>0,1, 2, 3</array> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_MAX_ALLOWED_DIMM_FREQ</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<!--<attribute> + <id>PROC_DPLL_DIVIDER</id> + <description> + The product of the DPLL internal prescalar divide (CD_DIV124_DC) + and the output divider(CD_DPLLOUT124_DC). This estalishes the step size of + the DPLL in terms of this number divided into the processor reference clock. + + Platform default: 8 + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_DPLL_DIVIDER</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<attribute> + <id>EXTERNAL_VRM_STEPSIZE</id> + <description> + Step delay (binary in microseconds) after a voltage change + + Consumer: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + + Provided by the Machine Readable Workbook after system characterization. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_EXTERNAL_VRM_STEPSIZE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>AVSBUS_FREQUENCY</id> + <description> + AVSBus Clock Frequency (binary in KHz) + + Consumer: p9_ocb_init.C + + Overridden by the Machine Readable Workbook. + + If default of 0 is read, HWP will set AVSBus frequency to 1MHz. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_AVSBUS_FREQUENCY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VDD_AVSBUS_BUSNUM</id> + <description> + Defines the AVSBus (0 or 1) which has the core VDD rail VRM + + Producer: Machine Readable Workbook + Consumers: p9_set_evid; + p9_set_voltage (tool); + p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VDD_AVSBUS_BUSNUM</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VDN_AVSBUS_BUSNUM</id> + <description> + Defines the AVSBus (0 or 1) which has the chip VDN rail VRM + + Producer: Machine Readable Workbook + Consumers: p9_set_evid; + p9_set_voltage (tool); + p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VDN_AVSBUS_BUSNUM</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VDD_AVSBUS_RAIL</id> + <description> + Defines the AVSBus rail selector number (0 - 15) for the VDD VRM on the bus + defined by ATTR_AVSBUS_VDD_BUSNUM. + + Producer: Machine Readable Workbook + Consumers: p9_set_evid; + p9_set_voltage (tool); + p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VDD_AVSBUS_RAIL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VDN_AVSBUS_RAIL</id> + <description> + Defines the AVSBus rail selector number (0 - 15) for the VDN VRM on the bus + defined by ATTR_AVSBUS_VDN_BUSNUM. + + Producer: Machine Readable Workbook + Consumers: + p9_set_avsbus_voltage (tool); + p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VDN_AVSBUS_RAIL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VCS_I2C_BUSNUM</id> + <description> + Defines the I2C bus number (0 - 15) that has the VCS VRM. + + Producer: Machine Readable Workbook + Consumers: p9_set_evid; + sp9_set_voltage (tool) + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VCS_I2C_BUSNUM</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VDD_BOOT_VOLTAGE</id> + <description> + Voltage (binary in 1mV units) to apply to the VDD VRM for booting. Value + chosen is system dependent and is a combination of the part's Vital Product + Data (VPD) (typically the PowerSave value) and the minimum allowed for + correct operation of the fabric bus. + + Producer: Machine Readable Workbook + + Consumer: p9_setup_evid + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VDD_BOOT_VOLTAGE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VCS_BOOT_VOLTAGE</id> + <description> + Voltage (binary in 1mV units) to apply to the VCS VRM for booting. Value + chosen is system dependent and is a combination of the part's Vital Product + Data (VPD) (typically the PowerSave value) and the minimum allowed for + correct operation of the fabric bus. + + Producer: Machine Readable Workbook + + Consumer: p9_setup_evid + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VCS_BOOT_VOLTAGE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>SPIPSS_FREQUENCY</id> + <description> + SPIPSS Clock Frequency (binary in KHz) + + Valid range: 500KHz to 2500KHz + + Consumer: p8_pss_init + + Overridden by the Machine Readable Workbook. + + If default of 0 is read, HWP will set SPIPSS frequency to 10MHz. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_SPIPSS_FREQUENCY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>APSS_CHIP_SELECT</id> + <description> + Defines which of the PSS chip selects (0 or 1) that the APSS is connected + + Provided by the Machine Readable Workbook. + Consumer: p8_pss_init + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_APSS_CHIP_SELECT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<enumerationType> + <id>APSS_CHIP_SELECT</id> + <description>Enumeration indicating the ATTR_APSS_CHIP_SELECT</description> + <enumerator> + <name>NONE</name> + <value>0xFF</value> + </enumerator> + <enumerator> + <name>CS0</name> + <value>0x00</value> + </enumerator> + <enumerator> + <name>CS1</name> + <value>0x01</value> + </enumerator> +</enumerationType> + +<!--<attribute> + <id>PROC_R_LOADLINE_VDD</id> + <description> + Impedance (binary microOhms) of the load line from a processor VDD VRM to the + Processor Module pins. This value is applied to each processor instance. + + Consumer: p9_hcd_image_build_pstate -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Producer: Machine Readable Workbook (per the power subsystem design) + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_R_LOADLINE_VDD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<!--<attribute> + <id>PROC_R_DISTLOSS_VDD</id> + <description> + Impedance (binary in microOhms) of the VDD distribution loss sense point + to the circuit. This value is applied to each processor instance. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_R_DISTLOSS_VDD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<!--<attribute> + <id>PROC_VRM_VOFFSET_VDD</id> + <description> + Offset voltage (binary in microvolts) to apply to the VDD VRM distribution to + the processor module. This value is applied to each processor instance. + Note: no loadline may be present in the system; thus, a value of 0 is legal. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_VRM_VOFFSET_VDD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<attribute> + <id>PROC_R_LOADLINE_VDN</id> + <description> + Impedance (binary microOhms) of the load line from a processor VDN VRM to the + Processor Module pins. This value is applied to each processor instance. + Note: no loadline may be present in the system; thus, a value of 0 is legal. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_R_LOADLINE_VDN</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>PROC_R_DISTLOSS_VDN</id> + <description> + Impedance (binary in microOhms) of the VDN distribution loss sense point + to the circuit. This value is applied to each processor instance. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p9_build_gpstate_table.C + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_R_DISTLOSS_VDN</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>PROC_VRM_VOFFSET_VDN</id> + <description> + Offset voltage (binary in microvolts) to apply to the VDN VRM distribution to + the processor module. This value is applied to each processor instance. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p8_build_gpstate_table.C + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_VRM_VOFFSET_VDN</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<!--<attribute> + <id>PROC_R_LOADLINE_VCS</id> + <description> + Impedance (binary microOhms) of the load line from a processor VCS VRM to the + Processor Module pins. This value is applied to each processor instance. + Note: no loadline may be present in the system; thus, a value of 0 is legal. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_R_LOADLINE_VCS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<!--<attribute> + <id>PROC_R_DISTLOSS_VCS</id> + <description> + Impedance (binary in microOhms) of the VCS distribution loss sense point + to the circuit. This value is applied to each processor instance. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p9_build_gpstate_table.C + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_R_DISTLOSS_VCS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<!--<attribute> + <id>PROC_VRM_VOFFSET_VCS</id> + <description> + Offset voltage (binary in microvolts) to apply to the VCS VRM distribution to + the processor module. This value is applied to each processor instance. + + Producer: Machine Readable Workbook (via the power subsystem design per system) + + Consumer: p8_build_gpstate_table.C + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PROC_VRM_VOFFSET_VCS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<attribute> + <id>FREQ_EXT_BIAS_ULTRATURBO</id> + <description> + UltraTurbo Frequency Bias - % of bias (signed twos complement in 0.5 percent + steps) used in calculating the frequency associated with a Pstate. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + CME Quad Pstate Region (CQPR) for CM Quad Manager + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_EXT_BIAS_ULTRATURBO</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>FREQ_EXT_BIAS_TURBO</id> + <description> + Turbo Frequency Bias - % of bias (signed twos complement in 0.5 percent + steps) used in calculating the frequency associated with a Pstate. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + CME Quad Pstate Region (CQPR) for CM Quad Manager + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_EXT_BIAS_TURBO</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>FREQ_EXT_BIAS_NOMINAL</id> + <description> + Nominal Frequency Bias - % of bias (signed twos complement in 0.5 percent + steps) used in calculating the frequency associated with a Pstate. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + CME Quad Pstate Region (CQPR) for CM Quad Manager + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_EXT_BIAS_NOMINAL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>FREQ_EXT_BIAS_POWERSAVE</id> + <description> + PowerSave Frequency Bias - % of bias (signed twos complement in 0.5 percent + steps) used in calculating the frequency associated with a Pstate. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + CME Quad Pstate Region (CQPR) for CM Quad Manager + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_EXT_BIAS_POWERSAVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VOLTAGE_VDD_BIAS_ULTRATURBO</id> + <description> + UltraTurbo VDD Voltage Bias - % of bias (signed twos complement in 0.5 percent + steps) that is applied to the UltraTurbo VPD point used in calculating the + the Global Pstate values. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VOLTAGE_VDD_BIAS_ULTRATURBO</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VOLTAGE_VDD_BIAS_TURBO</id> + <description> + Turbo VDD Voltage Bias - % of bias (signed twos complement in 0.5 percent + steps) that is applied to the UltraTurbo VPD point used in calculating the + the Global Pstate values. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VOLTAGE_VDD_BIAS_TURBO</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VOLTAGE_VDD_BIAS_NOMINAL</id> + <description> + Nominal VDD Voltage Bias - % of bias (signed twos complement in 0.5 percent + steps) that is applied to the UltraTurbo VPD point used in calculating the + the Global Pstate values. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VOLTAGE_VDD_BIAS_NOMINAL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VOLTAGE_VDD_BIAS_POWERSAVE</id> + <description> + PowerSave VDD Voltage Bias - % of bias (signed twos complement in 0.5 percent + steps) that is applied to the UltraTurbo VPD point used in calculating the + the Global Pstate values. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VOLTAGE_VDD_BIAS_POWERSAVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VOLTAGE_VCS_BIAS</id> + <description> + VCS Voltage Bias - % of bias (signed twos complement in 0.5 percent + steps) that is applied to the VCS value stored in the UltraTurbo VPD + point for setting the VCS rail. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VOLTAGE_VCS_BIAS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VOLTAGE_VDN_BIAS</id> + <description> + VDN Voltage Bias - % of bias (signed twos complement in 0.5 percent + steps) that is applied to the VDN value stored in the VPD for setting the + VDN rail. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VOLTAGE_VDN_BIAS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VOLTAGE_INT_VDD_BIAS</id> + <description> + TODO (RTC 136996) NEED TO LOOK AT PERCENTAGE IMPLEMENTATION IN CME CODE AS WELL + AS THE IVRM VOLTAGE CALCULATION PROCESS + Internal VDD Voltage Bias - % of bias (signed twos complement in 0.5 percent + steps) that is applied to the Local Pstate voltage *after* the + ATTR_VOLTAGE_VDD_BIAS bias have been applied. + + Producer: Attribute Overrides by Lab/Mfg Characterization Team + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + CME Quad Pstate Region (CQPR) for CM Quad Manager + + Platform default: 0 + </description> + <simpleType> + <int32_t> + </int32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VOLTAGE_INT_VDD_BIAS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>STOP4_DISABLE</id> + <description> + Control CME response to execution of PowerPC STOP instruction + + if OFF, treat STOP4 as STOP4 + if ON, treat STOP4 as STOP2 + + Producer: ??? + + Consumer: p8_hcd_image_build.C + + Platform default: OFF + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_STOP4_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>STOP8_DISABLE</id> + <description> + Control CME response to execution of PowerPC STOP instruction + + if OFF, treat STOP8 as STOP8 + if ON, treat STOP8 as STOP4 + + Producer: ??? + + Consumer: p8_hcd_image_build.C + + Platform default: OFF + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_STOP8_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>STOP11_DISABLE</id> + <description> + Control CME response to execution of PowerPC STOP instruction + + if OFF, treat STOP8 as STOP11 + if ON, treat STOP8 as STOP8 + + Producer: ??? + + Consumer: p8_hcd_image_build.C + + Platform default: OFF + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_STOP11_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>SYSTEM_IVRMS_ENABLED</id> + <description> + System control to allow (if all other attribute tests yield + true values) or categorically disallow IVRM enablement + + Producer: MRWB + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + CME Quad Pstate Region (CQPR) for CM Quad Manager + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_SYSTEM_IVRMS_ENABLED</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>SYSTEM_WOF_ENABLED</id> + <description> + System control to allow Work Load Optimized Frequency (WOF) + algorithms to modify frequency based on active core count and other inputs. + + Producer: MRWB + + Consumers: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE/OCC + + Platform default: FALSE + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_SYSTEM_WOF_ENABLED</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>SYSTEM_RESCLK_STEP_DELAY</id> + <description> + Minimum delay (in nanoseconds) between resonant clock transition steps + + Producer: MRWB + + Consumers: p9_build_pstate_datablock -> + CME Quad Pstate Region (CQPR) for CM Quad Manager + + Platform default: 0 + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_SYSTEM_RESCLK_STEP_DELAY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<!--<attribute> + <id>PFET_POWERUP_DELAY_NS</id> + <description> + Time (in nanoseconds) between PFET controller steps (7 of them) when turning + the PFES ON + + Producer: MRWB + + Consumers: p9_pm_pfet_init + + Platform default: + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PFET_POWERUP_DELAY_NS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute>--> + +<attribute> + <id>PFET_POWERDOWN_DELAY_NS</id> + <description> + Time (in nanoseconds) between PFET controller steps (7 of them) when turning + the PFES OFF + + Producer: MRWB + + Consumers: p9_pm_pfet_init + + Platform default: + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PFET_POWERDOWN_DELAY_NS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>PFET_VDD_VOFF_SEL</id> + <description> + Selection of the OFF setting for the core and cache chiplet VDD PFET controllers + + Producer: MRWB + + Consumers: p9_pm_pfet_init + + Platform default: + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PFET_VDD_VOFF_SEL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<enumerationType> + <id>PFET_VDD_VOFF_SEL</id> + <description> + Enumeration indicating the OFF setting for the core and cache chiplet + DD PFET controllers + </description> + <enumerator> + <name>NOOFF</name> + <value>0</value> + </enumerator> + <enumerator> + <name>ALLBUT1TO7OFF</name> + <value>1</value> + </enumerator> + <enumerator> + <name>ALLBUT2TO7OFF</name> + <value>2</value> + </enumerator> + <enumerator> + <name>ALLBUT3TO7OFF</name> + <value>3</value> + </enumerator> + <enumerator> + <name>ALLBUT4TO7OFF</name> + <value>4</value> + </enumerator> + <enumerator> + <name>ALLBUT5TO7OFF</name> + <value>5</value> + </enumerator> + <enumerator> + <name>ALLBUT6TO7OFF</name> + <value>6</value> + </enumerator> + <enumerator> + <name>ALLBUT7TO7OFF</name> + <value>7</value> + </enumerator> + <enumerator> + <name>ALLOFF</name> + <value>8</value> + </enumerator> +</enumerationType> + +<attribute> + <id>PFET_VCS_VOFF_SEL</id> + <description> + Selection of the OFF setting for the core and cache chiplet VCS PFET controllers + + Producer: MRWB + + Consumers: p9_pm_pfet_init + + Platform default: + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PFET_VCS_VOFF_SEL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<enumerationType> + <id>PFET_VCS_VOFF_SEL</id> + <description> + Enumeration indicating the OFF setting for the core and cache chiplet + VCS PFET controllers + </description> + <enumerator> + <name>NOOFF</name> + <value>0</value> + </enumerator> + <enumerator> + <name>ALLBUT1TO7OFF</name> + <value>1</value> + </enumerator> + <enumerator> + <name>ALLBUT2TO7OFF</name> + <value>2</value> + </enumerator> + <enumerator> + <name>ALLBUT3TO7OFF</name> + <value>3</value> + </enumerator> + <enumerator> + <name>ALLBUT4TO7OFF</name> + <value>4</value> + </enumerator> + <enumerator> + <name>ALLBUT5TO7OFF</name> + <value>5</value> + </enumerator> + <enumerator> + <name>ALLBUT6TO7OFF</name> + <value>6</value> + </enumerator> + <enumerator> + <name>ALLBUT7TO7OFF</name> + <value>7</value> + </enumerator> + <enumerator> + <name>ALLOFF</name> + <value>8</value> + </enumerator> +</enumerationType> + +<attribute> + <id>PBAX_NODEID</id> + <description> + Receive PBAX Nodeid. Value that indicates this PBA's PBAX Node affinity. + This is matched to pbax_nodeid of the PMISC Address phase. + + Provided by the Machine Readable Workbook. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PBAX_NODEID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>PBAX_CHIPID</id> + <description> + Receive PBAX Chipid. Value that indicates this PBA's PBAX Chipid within + the PBAX node. Is matched to pbax_chipid of the Address phase if + pbax_type=unicast. + + Provided by the Machine Readable Workbook. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PBAX_CHIPID</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>PBAX_BRDCST_ID_VECTOR</id> + <description> + Receive PBAX Broadcast Group. Vector that is indexed when decoded PMISC + pbax_type=broadcast with the decoded PMISC pbax_chipid value. If the + bit in this vector at the decoded bit location is a 1, then this receive + engine will participate in the broadcast operation. + + Provided by the Machine Readable Workbook. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_PBAX_BRDCST_ID_VECTOR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>EXTERNAL_VRM_STEPDELAY</id> + <description> + Step delay (binary in microseconds) after a voltage change + + Consumer: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + + Provided by the Machine Readable Workbook after system characterization. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_EXTERNAL_VRM_STEPDELAY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VCS_I2C_RAIL</id> + <description> + Step delay (binary in microseconds) after a voltage change + + Consumer: p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + + Provided by the Machine Readable Workbook after system characterization. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VCS_I2C_RAIL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>VDN_BOOT_VOLTAGE</id> + <description> + Voltage (binary in 1mV units) to apply to the VCS VRM for booting. Value + chosen is system dependent and is a combination of the part's Vital Product + Data (VPD) (typically the PowerSave value) and the minimum allowed for + correct operation of the fabric bus. + + Producer: Machine Readable Workbook + + Consumer: p9_setup_evid + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_VDN_BOOT_VOLTAGE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> +</attribute> + +<attribute> + <id>FAPI_POS</id> + <description> + Logical position of target within a system. This is derived from the SMP location + of each processor and each target's relationship to a proc. + - PROC = based on SMP groupid+chipid + - MEMBUF = PROC:FAPI_POS * [max membuf per proc] + - 1st level child unit = [parent chip]:FAPI_POS * [max children of this type per chip] + - 2nd+ level child unit = [immediate parent unit]:FAPI_POS * [max units below parent] + Note: This should not be used algorithmically by HWPs directly. + Note: Value ignores physical drawer boundaries, the value is unique across the entire + system. + This data is derived from the MRW. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <hwpfToHbAttrMap> + <id>ATTR_FAPI_POS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + <persistency>volatile-zeroed</persistency> + <readable/> +</attribute> + + </attributes> diff --git a/src/usr/targeting/common/xmltohb/common.mk b/src/usr/targeting/common/xmltohb/common.mk index c38b36672..a9111acee 100755 --- a/src/usr/targeting/common/xmltohb/common.mk +++ b/src/usr/targeting/common/xmltohb/common.mk @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2012,2015 +# Contributors Listed Below - COPYRIGHT 2012,2016 # [+] International Business Machines Corp. # # @@ -36,7 +36,7 @@ XMLTOHB_HEADER_TARGETS += attributestrings.H XMLTOHB_HEADER_TARGETS += attributetraits.H XMLTOHB_HEADER_TARGETS += attributestructs.H XMLTOHB_HEADER_TARGETS += pnortargeting.H -XMLTOHB_HEADER_TARGETS += fapiplatattrmacros.H +XMLTOHB_HEADER_TARGETS += fapi2platattrmacros.H XMLTOHB_HEADER_TARGETS += test_ep.H XMLTOHB_HEADER_TARGETS += mapattrmetadata.H XMLTOHB_HEADER_TARGETS += mapsystemattrsize.H @@ -73,8 +73,8 @@ FAPI_ATTR_SOURCES += dram_initialization/proc_setup_bars/proc_setup_bars_memory_ FAPI_ATTR_SOURCES += dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml FAPI_ATTR_SOURCES += dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml FAPI_ATTR_SOURCES += activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml -FAPI_ATTR_SOURCES += runtime_attributes/pm_hwp_attributes.xml -FAPI_ATTR_SOURCES += runtime_attributes/pm_plat_attributes.xml +#FAPI_ATTR_SOURCES += runtime_attributes/pm_hwp_attributes.xml +#FAPI_ATTR_SOURCES += runtime_attributes/pm_plat_attributes.xml FAPI_ATTR_SOURCES += nest_chiplets/proc_pcie_scominit/proc_pcie_scominit_attributes.xml FAPI_ATTR_SOURCES += dmi_training/proc_cen_set_inband_addr/proc_cen_set_inband_addr_attributes.xml FAPI_ATTR_SOURCES += common_attributes.xml diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 3faaf09c5..d6bff1c84 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -46,6 +46,7 @@ <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute> <attribute><id>RESOURCE_IS_CRITICAL</id><default>0</default></attribute> <attribute><id>ORDINAL_ID</id></attribute> + <attribute><id>FAPI_POS</id></attribute> </targetType> <targetType> @@ -2193,6 +2194,7 @@ <default>EQ</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <!-- EX: Use same EX target for both Nimbus and Cumulus @@ -2206,6 +2208,7 @@ <default>EX</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <!-- CORE: Use same CORE target for both Nimbus and Cumulus @@ -2218,6 +2221,7 @@ <default>CORE</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <!-- MCS @@ -2234,6 +2238,7 @@ <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> <attribute><id>IBSCOM_MCS_BASE_ADDR</id></attribute> <attribute><id>EI_BUS_TX_MSBSWAP</id></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2258,6 +2263,7 @@ </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> <attribute><id>EFF_DIMM_SIZE</id></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2281,6 +2287,7 @@ </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> <attribute><id>MSS_FREQ</id></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2351,6 +2358,7 @@ <default>0xE0</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <!-- PHB @@ -2368,6 +2376,7 @@ <default>32</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2399,6 +2408,7 @@ <default>OBUS</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2430,6 +2440,7 @@ <default>NVBUS</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2462,6 +2473,7 @@ <default>PPE</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2493,6 +2505,7 @@ <default>PERV</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2530,6 +2543,7 @@ <attribute><id>CHIP_UNIT</id></attribute> <attribute><id>PEER_TARGET</id></attribute> <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2570,6 +2584,7 @@ <field><id>reserved</id><value>0</value></field> </default> </attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2579,6 +2594,7 @@ <id>MODEL</id> <default>NIMBUS</default> </attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> @@ -2601,6 +2617,7 @@ <default>SBE</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute> + <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute> </targetType> <targetType> diff --git a/src/usr/targeting/common/xmltohb/xmltohb.pl b/src/usr/targeting/common/xmltohb/xmltohb.pl index d8b80dd64..45d1215d9 100755 --- a/src/usr/targeting/common/xmltohb/xmltohb.pl +++ b/src/usr/targeting/common/xmltohb/xmltohb.pl @@ -277,6 +277,16 @@ if( !($cfgSrcOutputDir =~ "none") ) writeFapiPlatAttrMacrosHeaderFileFooter ($fapiPlatAttrMacrosHeaderFile); close $fapiPlatAttrMacrosHeaderFile; + open(FAPI2_PLAT_ATTR_MACROS_FILE,">$cfgSrcOutputDir"."fapi2platattrmacros.H") + or fatal ("FAPI2 platform attribute macro header file: \"$cfgSrcOutputDir" + . "fapi2platattrmacros.H\" could not be opened."); + my $fapi2PlatAttrMacrosHeaderFile = *FAPI2_PLAT_ATTR_MACROS_FILE; + writeFapi2PlatAttrMacrosHeaderFileHeader ($fapi2PlatAttrMacrosHeaderFile); + writeFapi2PlatAttrMacrosHeaderFileContent($attributes,$fapiAttributes, + $fapi2PlatAttrMacrosHeaderFile); + writeFapi2PlatAttrMacrosHeaderFileFooter ($fapi2PlatAttrMacrosHeaderFile); + close $fapi2PlatAttrMacrosHeaderFile; + open(ATTR_ATTRERRL_C_FILE,">$cfgSrcOutputDir"."errludattribute.C") or fatal ("Attribute errlog C file: \"$cfgSrcOutputDir" . "errludattribute.C\" could not be opened."); @@ -893,6 +903,222 @@ VERBATIM } +# FAPI2 ATTRIBUTE SUPPORT +################################################################################ +# Writes the FAPI2 plat attribute macros header file header +################################################################################ +sub writeFapi2PlatAttrMacrosHeaderFileHeader { + my($outFile) = @_; + + print $outFile <<VERBATIM; + +#ifndef FAPI2_FAPIPLATATTRMACROS_H +#define FAPI2_FAPIPLATATTRMACROS_H + +/** + * \@file fapi2platattrmacros.H + * + * \@brief FAPI2 -> HB attribute mappings. This file is autogenerated and + * should not be altered. + */ + +//****************************************************************************** +// Includes +//****************************************************************************** + +// STD +#include <stdint.h> + +//****************************************************************************** +// Macros +//****************************************************************************** + + +namespace fapiToTargeting +{ +namespace fapi2 +{ + +enum { + +VERBATIM +} + +################################################################################ +# Writes the FAPI2 plat attribute macros +################################################################################ + +sub writeFapi2PlatAttrMacrosHeaderFileContent { + my($attributes,$fapiAttributes,$outFile) = @_; + + my $macroSection = ""; + my $attrSection = ""; + + foreach my $attribute (@{$attributes->{attribute}}) + { + foreach my $hwpfToHbAttrMap (@{$attribute->{hwpfToHbAttrMap}}) + { + if( !exists $hwpfToHbAttrMap->{id} + || !exists $hwpfToHbAttrMap->{macro}) + { + fatal("id,macro fields required\n"); + } + + my $fapiReadable = 0; + my $fapiWriteable = 0; + my $instantiated = 0; + + if ($cfgFapiAttributesXmlFile eq "") + { + #No FAPI attributes xml file specified + if(exists $attribute->{readable}) + { + $macroSection .= ' #define ' . $hwpfToHbAttrMap->{id} . + "_GETMACRO(ID,PTARGET,VAL) \\\n" . + " FAPI2_PLAT_ATTR_SVC_GETMACRO_" . + $hwpfToHbAttrMap->{macro} . "(ID,PTARGET,VAL)\n"; + $instantiated = 1; + } + + if(exists $attribute->{writeable}) + { + $macroSection .= ' #ifndef ' . $hwpfToHbAttrMap->{id} . + "_SETMACRO\n"; + $macroSection .= ' #define ' . $hwpfToHbAttrMap->{id} . + "_SETMACRO(ID,PTARGET,VAL) \\\n" . + " FAPI2_PLAT_ATTR_SVC_SETMACRO_" . + $hwpfToHbAttrMap->{macro} . "(ID,PTARGET,VAL)\n"; + $macroSection .= " #endif\n"; + $instantiated = 1; + } + } + else + { + #FAPI attribute xml file specified - validate against FAPI attrs + foreach my $fapiAttr (@{$fapiAttributes->{attribute}}) + { + if( (exists $fapiAttr->{id}) + && ($fapiAttr->{id} eq $hwpfToHbAttrMap->{id}) ) + { + # Check that non-platInit attributes are in the + # volatile-zeroed section and have a direct mapping + if (! exists $fapiAttr->{platInit}) + { + if ($hwpfToHbAttrMap->{macro} ne "DIRECT") + { + fatal("FAPI non-platInit attr " . + "'$hwpfToHbAttrMap->{id}' is " . + "'$hwpfToHbAttrMap->{macro}', " . + "it must be DIRECT"); + } + + if ( (exists $fapiAttr->{persistent})) + { + if ($attribute->{persistency} ne "non-volatile") + { + fatal("FAPI non-platInit attr " . + "'$hwpfToHbAttrMap->{id}' is " . + "'$attribute->{persistency}', " . + "it must be non-volatile"); + } + } + else + { + # Check that platInit attributes + # have a non-volatile persistency + if($attribute->{persistency} ne + "volatile-zeroed") + { + fatal("FAPI non-platInit attr " . + "'$hwpfToHbAttrMap->{id}' is " . + "'$attribute->{persistency}', " . + "it must be volatile-zeroed"); + } + } + + } + + # All FAPI attributes are readable + $fapiReadable = 1; + + if(exists $fapiAttr->{writeable}) + { + $fapiWriteable = 1; + } + + last; + } + } + + if($fapiReadable) + { + if(exists $attribute->{readable}) + { + $macroSection .= ' #define ' . $hwpfToHbAttrMap->{id} . + "_GETMACRO(ID,PTARGET,VAL) \\\n" . + " FAPI2_PLAT_ATTR_SVC_GETMACRO_" . + $hwpfToHbAttrMap->{macro} . "(ID,PTARGET,VAL)\n"; + $instantiated = 1; + } + else + { + fatal("FAPI attribute $hwpfToHbAttrMap->{id} requires " . + "platform supply readable attribute."); + } + } + + if($fapiWriteable) + { + if(exists $attribute->{writeable}) + { + $macroSection .= ' #define ' . $hwpfToHbAttrMap->{id} . + "_SETMACRO(ID,PTARGET,VAL) \\\n" . + " FAPI2_PLAT_ATTR_SVC_SETMACRO_" . + $hwpfToHbAttrMap->{macro} . "(ID,PTARGET,VAL)\n"; + $instantiated = 1; + } + else + { + fatal("FAPI attribute $hwpfToHbAttrMap->{id} requires " + . "platform supply writeable attribute."); + } + } + } + + if($instantiated) + { + $attrSection .= + $hwpfToHbAttrMap->{id} . " = " . + " TARGETING::ATTR_" . + $attribute->{id} . ",\n"; + } + } + } + + print $outFile $attrSection; + print $outFile "};\n\n"; + print $outFile $macroSection; + print $outFile "\n"; +} + +################################################################################ +# Writes the plat attribute macros header file footer +################################################################################ + +sub writeFapi2PlatAttrMacrosHeaderFileFooter { + my($outFile) = @_; + +print $outFile <<VERBATIM; +} // End namespace platAttrSvc + +} // End namespace fapi2 + +#endif // FAPI_FAPIPLATATTRMACROS_H + +VERBATIM + +} + ################################################################################ # Writes the pnor targeting header format file ################################################################################ @@ -1241,7 +1467,7 @@ VERBATIM } ################################################################################ -# Writes the struct file header +# Writes the struct file -er ################################################################################ sub writeStructFileHeader { diff --git a/src/usr/targeting/xmltohb/makefile b/src/usr/targeting/xmltohb/makefile index eb0b05ac2..47d54492e 100644 --- a/src/usr/targeting/xmltohb/makefile +++ b/src/usr/targeting/xmltohb/makefile @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2011,2015 +# Contributors Listed Below - COPYRIGHT 2011,2016 # [+] International Business Machines Corp. # # @@ -47,9 +47,16 @@ VPATH = ${COMMON_TARGETING_REL_PATH} FAPI_ATTR_SOURCE_DIR = ${ROOTPATH}/src/usr/hwpf/hwp -XMLTOHB_FAPIATTR_SOURCES = \ + +XMLTOHB_FAPIATTR_SOURCES += \ ${addprefix ${FAPI_ATTR_SOURCE_DIR}/, ${FAPI_ATTR_SOURCES}} +# Attribute XML files. +FAPI2_ATTR_XML += $(wildcard $(ROOTPATH)/src/import/chips/p9/procedures/xml/attribute_info/*) +FAPI2_ATTR_XML += $(wildcard $(ROOTPATH)/src/import/hwpf/fapi2/xml/attribute_info/*) + +XMLTOHB_FAPIATTR_SOURCES += ${FAPI2_ATTR_XML} + XMLTOHB_COMMON_ATTRIBUTE_SOURCES = attribute_types.xml XMLTOHB_COMMON_TARGET_SOURCES = target_types.xml @@ -73,23 +80,23 @@ VMM_CONSTS_FILE = \ GENFILES = ${XMLTOHB_TARGETS} #debug : -# @echo COMMON_TARGETING_PATH_PREFIX = ${COMMON_TARGETING_PATH_PREFIX} -# @echo COMMON_TARGETING_REL_PATH = ${COMMON_TARGETING_REL_PATH} -# @echo COMMON_TARGETING_MAKEFILE = ${COMMON_TARGETING_MAKEFILE} -# @echo XMLTOHB_HEADER_TARGETS = ${XMLTOHB_HEADER_TARGETS} -# @echo XMLTOHB_SOURCE_TARGETS = ${XMLTOHB_SOURCE_TARGETS} -# @echo XMLTOHB_SYSTEM_BINARIES = ${XMLTOHB_SYSTEM_BINARIES} -# @echo XMLTOHB_TARGETS = ${XMLTOHB_TARGETS} -# @echo XMLTOHB_GENERIC_SOURCES = ${XMLTOHB_GENERIC_SOURCES} -# @echo FAPI_ATTR_SOURCES = ${FAPI_ATTR_SOURCES} -# @echo FAPI_ATTR_SOURCE_DIR = ${FAPI_ATTR_SOURCE_DIR} -# @echo XMLTOHB_FAPIATTR_SOURCES = ${XMLTOHB_FAPIATTR_SOURCES} -# @echo XMLTOHB_COMMON_ATTRIBUTE_SOURCES = ${XMLTOHB_COMMON_ATTRIBUTE_SOURCES} -# @echo XMLTOHB_COMMON_TARGET_SOURCES = ${XMLTOHB_COMMON_TARGET_SOURCES} -# @echo XMLTOHB_HB_ATTRIBUTE_SOURCES = ${XMLTOHB_HB_ATTRIBUTE_SOURCES} -# @echo XMLTOHB_HB_TARGET_SOURCES = ${XMLTOHB_HB_TARGET_SOURCES} -# @echo XMLTOHB_MERGED_COMMON_TARGET_SOURCES = ${XMLTOHB_MERGED_COMMON_TARGET_SOURCES} -# @echo VPATH = ${VPATH} +# @echo COMMON_TARGETING_PATH_PREFIX = ${COMMON_TARGETING_PATH_PREFIX} +# @echo COMMON_TARGETING_REL_PATH = ${COMMON_TARGETING_REL_PATH} +# @echo COMMON_TARGETING_MAKEFILE = ${COMMON_TARGETING_MAKEFILE} +# @echo XMLTOHB_HEADER_TARGETS = ${XMLTOHB_HEADER_TARGETS} +# @echo XMLTOHB_SOURCE_TARGETS = ${XMLTOHB_SOURCE_TARGETS} +# @echo XMLTOHB_SYSTEM_BINARIES = ${XMLTOHB_SYSTEM_BINARIES} +# @echo XMLTOHB_TARGETS = ${XMLTOHB_TARGETS} +# @echo XMLTOHB_GENERIC_SOURCES = ${XMLTOHB_GENERIC_SOURCES} +# @echo FAPI_ATTR_SOURCES = ${FAPI_ATTR_SOURCES} +# @echo FAPI_ATTR_SOURCE_DIR = ${FAPI_ATTR_SOURCE_DIR} +# @echo XMLTOHB_FAPIATTR_SOURCES = ${XMLTOHB_FAPIATTR_SOURCES} +# @echo XMLTOHB_COMMON_ATTRIBUTE_SOURCES = ${XMLTOHB_COMMON_ATTRIBUTE_SOURCES} +# @echo XMLTOHB_COMMON_TARGET_SOURCES = ${XMLTOHB_COMMON_TARGET_SOURCES} +# @echo XMLTOHB_HB_ATTRIBUTE_SOURCES = ${XMLTOHB_HB_ATTRIBUTE_SOURCES} +# @echo XMLTOHB_HB_TARGET_SOURCES = ${XMLTOHB_HB_TARGET_SOURCES} +# @echo XMLTOHB_MERGED_COMMON_TARGET_SOURCES = ${XMLTOHB_MERGED_COMMON_TARGET_SOURCES} +# @echo VPATH = ${VPATH} EXTRA_PARTS = $(addprefix $(IMGDIR)/, $(XMLTOHB_SYSTEM_BINARIES)) |
