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* update DPLL and IVRM initsJoe McGill2017-10-232-2/+3
* PGPE: Move all state data to a fixed spotRahul Batra2017-10-2310-541/+500
* STOP: IPC FixesYue Du2017-10-232-36/+32
* PM Complex Suspend and Safe ModeRahul Batra2017-10-2314-639/+993
* STOP: speed up self restore by droping pm_exit after instr runningYue Du2017-10-231-0/+6
* Defining generic RingId_t type for transitional eCMD releaseKahn Evans2017-10-231-0/+1
* STOP: Using PANIC codes at every pk_haltYue Du2017-10-2320-109/+113
* HW404292: Assert analog fence in cache_chiplet_resetYue Du2017-10-233-7/+21
* STOP: OISR Routing for ErrorsYue Du2017-10-231-2/+2
* STOP: DD2 set PPM_WRITE_DISABLE along with wakeup_notify_selectYue Du2017-10-232-2/+18
* STOP: writing all 1s to lpid of each thread regardless fuse or notYue Du2017-10-232-4/+44
* STOP: Conditional compile current error check to save cme sizeYue Du2017-10-235-0/+69
* p9_sbe_chiplet_reset,p9_sbe_arrayinitAnusha Reddy Rangareddygari2017-10-231-1/+14
* STOP: Acquire pcbmux after assert glsmux in cme exitYue Du2017-10-232-87/+37
* Enablement of additional eq_ana_bndy rings for Nimbus DD2Sumit Kumar2017-10-237-45/+182
* Increased the size of buildTag in xip header by another 4BytesRaja Das2017-10-235-16/+5
* PM: Updated QPMR and SGPE Header with 24x7 offset and length.Prem Shanker Jha2017-10-234-13/+19
* STOP: FIX phantom wakeup vs. wakeup_notify_selectYue Du2017-10-235-50/+190
* STOP: Atomic lock of cache clock controller and PCB slaveYue Du2017-10-233-0/+50
* CME Pstate Updates(Platform Interdependence)Rahul Batra2017-10-239-29/+32
* Core Init additions to put ABIST engines in parallel mode for Nimbus DD1.0Thi Tran2017-10-235-3/+18
* TOR API cleanup: Removing support for GET_CPLT_LEVEL_RINGSClaus Michael Olsen2017-10-233-538/+14
* STOP: Fix DSL and enable the solutionYue Du2017-10-232-9/+25
* p9_pstate_parameter_block: access #W and populate parameter block stucturePrasad Bg Ranganath2017-10-231-0/+30
* WOF/PGPE Bug Fixes(Set 2)Rahul Batra2017-10-2316-343/+437
* PM: Incorporated support for enabling/disabling queued scan mode.Prem Shanker Jha2017-10-231-0/+1
* Add ec_abst ring to p9n.hw_imageThi Tran2017-10-233-2/+12
* Meshctrl setup updateAnusha Reddy Rangareddygari2017-10-231-0/+4
* PM: Add CME_INSTRUCTION_TRACE_ENABLE attribute support for debug controlGreg Still2017-10-231-0/+1
* STOP: Change ring_save structure to 0xfff3fc00 PDA locationYue Du2017-10-233-33/+20
* PM: Fix PGPE GPPB downloadGreg Still2017-10-232-1/+3
* p9_tor: cleanup - use p9_ringid_get_chiplet_properties()Martin Peschke2017-10-231-141/+16
* p9_ringId: reorder CHIPLET_TYPE enum entriesMartin Peschke2017-10-231-4/+5
* STOP: PCBMux Savior version 2 + TLBIE workaroundBrian Vanderpool2017-10-238-28/+417
* STOP: SGPE(image/bootloader) and OCC Start Addr CHANGE in SRAMYue Du2017-10-232-6/+12
* Enable CME IAR trace and remove stall events from traceBrian Vanderpool2017-10-232-3/+8
* Use compile directive USE_PPE_IMPRECISE_MODE to block queued scanBrian Vanderpool2017-10-231-0/+4
* p9_tor: fix some random bytes in TOR imageMartin Peschke2017-10-231-0/+6
* PM: VPD in #V order and Natural OrderGreg Still2017-10-231-4/+12
* Hcode: Create centralized memory map headersYue Du2017-10-2347-724/+1051
* STOP: Fix optimize size and quad spwu issue of EIMR bookkeepYue Du2017-10-231-2/+2
* xip_tool: Combining two EKB vs PPE repo directives.Claus Michael Olsen2017-10-232-8/+8
* SGPE:putring: scan bit wise for eq_ana_bndy ringsPrasad Bg Ranganath2017-10-232-4/+9
* STOP: Enable CME SRAM Scrub EngineYue Du2017-10-231-0/+4
* STOP: add sync before change pcbmux statusYue Du2017-10-231-1/+8
* STOP: Fix SPWUYue Du2017-10-232-93/+53
* ana_bndy RS4v2 algorithm support in ring_apply to accommodate properClaus Michael Olsen2017-10-233-218/+223
* p9_xip_tool: fix ring dissect warningsMartin Peschke2017-10-231-0/+7
* Add initial p9c ddr_phy_reset, dimmBadDqBitmapAccessHwp, slew, & unmask_errorsAndre Marin2017-10-231-0/+73
* STOP: Fix SKIP_INITF flag in SGPE for EPMYue Du2017-10-231-5/+5
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