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* Img Build: Updated STOP API version to reflect SPR self save availability.Prem Shanker Jha2019-12-191-0/+7
| | | | | | | | | | | | | | | | Commit version field of associated with self save restore and cpu save API. This is part of the solution identified to address version mismatch and missing commits pertaining to STOP on open power side. Change-Id: I462d84b13e93752813fc2e4bb32d0ee7753ed6ac Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77523 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
* PM: Fix DB0 HangRahul Batra2019-09-051-0/+1
| | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I706ec7b87e777b736153d5765ced0a3f6cea5d96 CQ: SW470688 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81266 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
* OCC assisted PGPE, SGPE Error LoggingAmit Tendolkar2019-08-121-1/+4
| | | | | | | | | | | | | | | | | | | | | | Support basic infrastructure to - create an error log - add trace to the error log - add any user data section to the error log - add callouts to the error log - commit the error log - fix size issues and alignment exceptions - Fixes .. trace buffer parsing, repetitive xgpe logs, added PVR & PIR to log - Fixed severity, removed demo trigger code files RTC: 198654 Change-Id: Ie9842d2631863132ee456d421f0974cf9ade76ce Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75078 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S Still <stillgs@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
* PM: WOV(OCS) HW Procedures Changes (1/2)Rahul Batra2019-06-145-2/+27
| | | | | | | | | | | | | | | | | | | | | | | 1st commit in the series of 2 commits for WOV(Over Current Sampling, OCS) Commit 1: WOV(OCS) HW procedures updates Commit 2: WOV(OCS) PGPE Hcode updates Key_Cronus_Test=PM_REGRESS HW-Image-Prereq: Ieabbc383d2bbbd1df8cf5a2ed5b503c860518cd8 Change-Id: I6234f0f60b9ed57b8b144159f3fe9c0b756df1e3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70513 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
* VDM(Part 3): Image build changes for quad level VDMPrem Shanker Jha2019-05-091-0/+47
| | | | | | | | | | | | | | | | | | | | Commit accomplishes following: - enables CME booting using new CPMR layout - copies new definition of poundw to LPSPB - enables quad level LPSPB - implements new CPMR layout that supports customized LPSPB. - for old VPD version, retains old CPMR layout Change-Id: I66a13579e0edbc046226db259a736416e1e5c268 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75272 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* VDM(Part 2): CME hcode support for per quad VDM.Prem Shanker Jha2019-04-301-1/+2
| | | | | | | | | | | | | | | | | | | | If per quad VDM is enabled by hcode image build through CME header, CME downloads local pstate parameter block and repair rings in second block copy. If per quad VDM is not enabled CME retains legacy behavior. Key_Cronus_Test=PM_REGRESS Change-Id: I97112b6816657a8201d7b8122bca01909ca20aa5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69971 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PPB: Refactor pstate parameter blockPrasad Bg Ranganath2019-03-082-121/+12
| | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS CQ:SW458304 Change-Id: Ia854423e663919a192a8fd271f2656d7d7469406 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70365 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Removing check on sbe region fenceAnusha Reddy Rangareddygari2019-02-042-8/+6
| | | | | | | | | | | | | This fence is not implemented in Axone. Change-Id: I5585616c40f20b7a4a1cbc3e4869ec656428e4b9 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70285 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* VDM(Part 1): Introduced new members in CME and CPMR image headersPrem Shanker Jha2019-01-261-1/+9
| | | | | | | | | | | | | | | | | | commit introduces new members in CPMR and CME image headers. These fields will be utilised in subsequent commits to facilitate and execute downloading of LPSPB customized for a quad. Key_Cronus_Test=PM_REGRESS Change-Id: I9af8f2e6c2570a4bb0ea6a95a458b30b7e25273e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69964 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PGPE: WOV HW procs and Global Parm updates (2/3)Rahul Batra2019-01-254-17/+49
| | | | | | | | | | | | | | | | | | | | | | | | 2nd commit in the series of 3 commits for Workload Optimized Voltage(WOV) Commit 1. Adds WOV attributes Commit 2(Hostboot). WOV HW procedures changes and global parm updates Commit 3(Hcode). PGPE Hcode changes for WOV(undervolting only) feature Key_Cronus_Test=PM_REGRESS HW-Image-Prereq: Iaad4fb8cdff7840ec971f866757492f6e9b2cb87 CMVC-Prereq: 1073981 Change-Id: I07f716f5d12809b8c6efdf76bf545e467cf839d8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69464 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Self Save: Fixed bugs pertaining to SPR self save.Prem Shanker Jha2018-12-082-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit fixes some issues with code found during integration test - replacement of addi with xor instruction during self save API. - fixing instruction generation for MFMSR during self save - data struct updates in STOP API - error RC updates for hcode image build - HOMER parser updates. - removed self save support for URMOR and HRMOR - code changes for compilation with OPAL - populating CME Image header with unsecure HOMER address. Key_Cronus_Test=PM_REGRESS Change-Id: I7cedcc466267c4245255d8d75c01ed695e316720 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66580 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* p9_pibms_reg_dump, p9_pibmem_dump updatesAnusha Reddy Rangareddygari2018-11-292-13/+88
| | | | | | | | | | | | | | | | | * Check the valid bit-rate divisor value * Skip pibmem_repair register scoms for Axone * Check mux config and Fence setup before collecting dumps Change-Id: Iff4d33be96136ec7f4daf6b21659694ae1f87d50 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67533 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
* PM:Fill SGPE/PGPE regions fields in QPMR/PPMR(3/4)Rahul Batra2018-10-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | 3rd commit in series of 4 commits which combined moves SGPE/PGPE SRAM regions, and also allows to do so easily in future. Commit 1(Hcode): Adds fields to OCC Complex Shared SRAM for storing SGPE and PGPE region addresses/size, image header and debug header. Commit 2(Hostboot): Moves around SGPE/PGPE regions, and adds fields to QPMR/PPMR for storing SGPE/PGPE region info Commit 3(Hcode): Populates the newly added SGPE/PGPE region info fields in QPMR/PPMR Commit 4(Hostboot): Adds check for QPMR and PPMR fields in the Hostboot Code Key_Cronus_Test=PM_REGRESS Change-Id: Id9493ba0843c26975e1b72e558501df7140fa10c CQ: SW447651 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67018 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Img Build: HOMER changes for SMF and SPR self save.Prem Shanker Jha2018-10-271-5/+8
| | | | | | | | | | | | | | | | | | | | | Commit conditionnally creates a new self restore region memory layout. It also adds support for self save of SPR. HWP detects the version of self restore code loaded and based on that it retains legacy self restore layout or the new layout. Key_Cronus_Test=PM_REGRESS Change-Id: I0a9723870e63b1dd70c8163cc6a13c35d9cb78ca Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66218 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PM: Move SGPE/PGPE Region and update QPMR/PPMR(2/4)Rahul Batra2018-10-243-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2nd commit in series of 4 commits which combined moves SGPE/PGPE SRAM regions, and also allows to do so easily in future. Commit 1(Hcode): Adds fields to OCC Complex Shared SRAM for storing SGPE and PGPE region addresses/size, image header and debug header. Commit 2(Hostboot): Moves around SGPE/PGPE regions, and adds fields to QPMR/PPMR for storing SGPE/PGPE region info Commit 3(Hcode): Populates the newly added SGPE/PGPE region info fields in QPMR/PPMR Commit 4(Hostboot): Adds check for QPMR and PPMR fields in the Hostboot Code Key_Cronus_Test=PM_REGRESS Change-Id: I81d65030c31645be38a1c39a80277f2e6bc0cb99 CQ: SW447651 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67641 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S Still <stillgs@us.ibm.com>
* Revert "UV Support : Augmented STOP API and self restore for enabling UV"Prem Shanker Jha2018-10-241-2/+1
| | | | | | | | | | | | | Change-Id: I72cac331324a55d276356f021d9985a760e7e00a Original-Change-Id: Iaabd787166422b68179901b7785ab3e8a54d35b8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65875 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* UV Support : Augmented STOP API and self restore for enabling ultravisor.Prem Shanker Jha2018-10-241-1/+2
| | | | | | | | | | | | | | | HW-Image-Coreq: yes HW-Image-Prereq: Ia9ae0d284398af375f1562efff152a6a12a6eb9a Change-Id: Ibf617efa829f9e46aa9fcbbc05b5afc3813cfabb Original-Change-Id: I1f7ca865640dfc0a08aef783fd3595d2f249a672 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/58843 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP API: Changes for SMF and SPR self savePrem Shanker Jha2018-09-261-2/+23
| | | | | | | | | | | | | | | | | | | Commit accomplishes following: - Implementation of new self restore region memory layout - Restore of SPRs pertaining to SMF - Self save of SPRs - Backward compatibility with old self restore layout Key_Cronus_Test=PM_REGRESS Change-Id: I11359e392102d32896251225907eb95a43ba6f78 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66212 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Revert "UV Support : Augmented STOP API and self restore for enabling UV"Prem Shanker Jha2018-09-261-17/+7
| | | | | | | | | | | | Change-Id: Iaabd787166422b68179901b7785ab3e8a54d35b8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65875 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* UV Support : Augmented STOP API and self restore for enabling ultravisor.Prem Shanker Jha2018-09-261-7/+17
| | | | | | | | | | | | | | HW-Image-Coreq: yes HW-Image-Prereq: Ia9ae0d284398af375f1562efff152a6a12a6eb9a Change-Id: I1f7ca865640dfc0a08aef783fd3595d2f249a672 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/58843 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Adding a fapi_assert to flag error if PPE is not halted.Anusha Reddy Rangareddygari2018-08-221-4/+5
| | | | | | | | | | | Change-Id: I5fe5d26d6e29d29a66aa9d03cf24f6f52b5eef6b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64168 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* SMF: SBE updates for SMF (URMOR set and CPMMR[Runtime Wakeup Mode] clear)Greg Still2018-08-221-0/+2
| | | | | | | | | | | | | | | | - set URMOR if MSR[S] bit is set in p9_sbe_load_bootloader - clear CPMMR[Runtime Wakeup Mode] in all cores in p9_sbe_select_ex to ensure Hostboot starts from known state Change-Id: I572a1d9e0ebf8e194c811e2b8c176d145b7361e3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61812 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* SCOM Restore: Increased max eq scom restores entries supported to 255.Prem Shanker Jha2018-08-221-3/+2
| | | | | | | | | | | | | | | | | | | | Commit increases max eq scom restore entries supported from 63 to 255. It updates a field in QPMR header which is read by STOP API and SGPE Hcode. This enables a flexible way to change SCOM restore entries. Key_Cronus_Test=PM_REGRESS HW-Image-Prereq: Ie13a5110384e4161615167b238aecd4e2e0b9902 Change-Id: I036691f2fa152b1f0597e133b37b1795837d6e45 CQ: SW435708 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62222 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Secure memory allocation and setupJenny Huynh2018-08-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_mss_eff_grouping.C: - determines whether secure mem is requested, reserves smf space - always reserve smf at end of range because of end-of-range bit - set addr15 when reporting smf base address - mask off group_id(0) via chip address extension if smf is enabled - updated to set value of attr_smf_enabled - enhanced error reporting with smf config/supported values - made values reported to attr_mss_mcs_group_32 more clear p9_mss_setup_bars.C: - set MCFGPA/MCFGPMA registers with SMF data - fixed scom registers for MCFGPA/MCFGPMA hole setup - added note to leave MCFIR_invalid_smf masked for HW451708/HW451711 - added assert to check for HOLE1 and SMF enable overlaps p9_query_mssinfo.C: - updated to print out SMF reservations - print out HTM/OCC/SMF reservations regardless of mirroring enable p9_fbc_utils.C: - prevent group_id(0)=1 from affecting mappable memory ranges p9_sbe_fabricinit.C: - mask off group_id(0) via chip address extension if smf is enabled p9_setup_sbe_config.C, p9_sbe_attr_setup.C: - use scratch_reg6 bit(16) to pass smf_config value initfiles: - removed setup to use other addr bits as secure bit; core only uses addr15 - added setup for ncu addr15 value in hcode - always set addr15 config bit in bridge unit if smf is supported - set addr15 bit across all mcs if smf is enabled - added in settings to enable smf in nmmu unit - hardcode group_id(0) bit in chipext mask for bridge unit if smf is supported attributes: - ATTR_SMF_ENABLE is a system level attribute - changed SMF_ENABLE->SMF_CONFIG; smf_enabled will be (config && supported) CQ:HW451708 CQ:HW451711 Change-Id: I6cf85600354baa322e959c922f596ecc5c68a458 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57322 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PM: Added support for enable disable of 24x7 IMA.Prem Shanker Jha2018-07-041-0/+1
| | | | | | | | | | | | | | | | | | Commit incorporates an ability to enable or disable 24x7 IMA. It reads an attribute and populates a field of QPMR header. 24x7 firmware is expected to read this field and enable or disable 24x7 IMA by itself. Key_Cronus_Test=NO_TEST Change-Id: I1f1fc738a58f11346f7972eb3c547aac0e2f805f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61667 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP API: API conditionally supports 255 SCOM restore entries for each quad.Prem Shanker Jha2018-06-232-0/+7
| | | | | | | | | | | | | | | | | | | This is first of the series of commits intended for incorporating new mechanisms for SCOM restore. STOP API looks for a specific version in QPMR header of HOMER. If version is greater than 2, it allows - 255 SCOM Restore entries per quad - doesn't divide quad restore region in to L2, L3 and EQ sub-region If version is less than or equal to 2, API provideis legacy functionality. Key_Cronus_Test=PM_REGRESS RTC: 188827 Change-Id: Iac6ee94619302f745fee0c77acc168eaba04c3da Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61074 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PPB: Bug fix in computing IAC Vdn valuePrasad Bg Ranganath2018-06-081-5/+5
| | | | | | | | | | | | | | | | | | | - Hardcode the Vdn Ceff value to 1 as the dimension is not supported in the WOF Tables. This avoids the root of the issue noted which was VPD data dependent in the previous algoithm for an unused element. - Update OCC Pstate Parameter Block comments on Iddq units to 5mA -- This is non-functional update to ensure the header comments represent reality and is for documentation only!!! (no pre/co-req) Key_Cronus_Test=PM_REGRESS Change-Id: I3a790160998eda4e384d9bcb9da7198aa45f457c CQ:SW429936 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60033 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PM: Addressed TODOs in hcode image build HWP.Prem Shanker Jha2018-05-261-11/+6
| | | | | | | | | | | | | | | | | Commit addresses TODOs which were found to be functional. Code has been updated for those which needed an investigation. TODOs which intend design improvement has been deferred for next release. Change-Id: I68eb6c388cc9ff6bb72b79d9de718baa2812beab RTC: 184604 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59317 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PM: Fixes for Livelock ScenariosRahul Batra2018-04-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | -Fixes DPLL Ownership issues during Pstate Start -Fixes WOF Enablement and Quad/Core Active Update(STOP11/5) livelock scenario -Fixes PM Complex Suspend and Quad/Core Active Update(STOP11/5) livelock scenario -Fixes VDM Droop Suspend STOP entries livelock scenario Key_Cronus_Test=PM_REGRESS Change-Id: I14a0dece4c74bc04618f7d1f3838dbe273bace94 CQ: SW425778 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57191 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* p9_pibmem_dump - to support Axone increased pibmem size.Anusha Reddy Rangareddygari2018-04-261-3/+19
| | | | | | | | | | | Change-Id: Iae06ea48ad9838bcc725a75ac8f39b726f8e91cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57396 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Anay K. Desai <anaydesa@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
* PM: Generated Vratio/Vindex tablesRahul Batra2018-04-062-6/+59
| | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I3ecb8a4389c7b888c5323f2d8f013c3a17594cc5 Original-Change-Id: I9313dbe90771a549e14c8e90f2c2ca410616293a CQ: SW421682 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55059 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PGPE: Error Handling SupportRahul Batra2018-04-061-29/+38
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ib6fb30d6b8c0cdc21002b34b708e724f54eac62b Original-Change-Id: I00aca629108aeaca88db34eec8e408f3cd48ff7f CQ: SW414842 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48635 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* WOF: Pass PGPE VPD IQ good normal core per sort for WOF Phase 2Greg Still2018-03-221-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | - p9_pstate_parameter_block fills in repurposed Pstate options field - PGPE checks for non-zero value and uses for number of cores in vratio calc - Forward and backward compatible with present (bad) behavior; both Hostboot and Hcode must both be present for correct behavior - Update p9_dump_pstate_table tool HWP (not consumed by FW). However, it uses the update p9_pstates_pgpe.h, Overlay structure compatible with back levels of p9_dump_pstate_table_wrap tool Key_Cronus_Test=PM_REGRESS Change-Id: I8c3fc1ee00a988cb5c7374fd5b084b6c37fe7575 Original-Change-Id: I2d973fc28bbf645ae030015c609318cb7351d7ec CQ: SW415420 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52931 Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* CME Code Size Reduction ATTEMPT#3Michael Floyd2018-03-222-1429/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -- some IOTA kernel cleanup -- also add checking for IOTA execution stack overflow -- re-coded to eliminate some math library macro usage -- added native 16-bit multiply -- re-coded to remove redundancy from external interrupt handler -- removed dec handler (optional define) and other minor cleanup -- fixed Interrupt initialization code in std_init (all PPE images) -- always inline pstate_db0_clip_bcast & update_vdm_jump_values_in_dpll -- optimized pls calculation code -- optimized pstate init, db1 handler, core good handling -- optimized pmcr requests and pmsr updates (always write for both cores) Key_Cronus_Test=PM_REGRESS Change-Id: I6965a5a581562f0bb1cd735642f592cb4954970b Original-Change-Id: If48fec5832bd5e46cb89f0d6a97d90a488e8ff7b CQ: SW415503 RTC: 178789 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53381 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: Fix Global Parameter Block and PGPE size checks in p9_hcode_image_buildPrasad Bg Ranganath2018-03-221-10/+21
| | | | | | | | | | | | | Change-Id: Ied205304bd0c395b66963bffef1b58722ba04bea CQ:SW416422 CQ:SW416899 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53517 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: Generation of summarized version of STOP Recovery FFDC.Prem Shanker Jha2018-03-221-12/+74
| | | | | | | | | | | | | | | | | | | | | | | A summary of STOP recovery FFDC is created after generation of complete FFDC. It is stored at the end of FFDC section. It is intended for copying to an error log created during second phase of STOP Recovery. Commit also incorporates some changes to support creation of PM Display from STOP Recovery FFDC. Key_Cronus_Test=PM_REGRESS CQ: SW416531 Change-Id: Ieb0bceeb141cc80b18f63b01e881e5ad3b50263d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50414 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Update p9_collect_ppe_state to dynamically collect PPE FFDCAmit Tendolkar2018-03-221-1/+1
| | | | | | | | | | | | | | | | | | | 1- On FSP, avoid RAMming and collect only XIRs 2- On Host: avoid side effects of having to Halt PPE for RAMming: a Avoid Halt, if not already halted or in PMReset, collect only XIRs b Collect max state if already halted, no side-effects Change-Id: I7b27a02aebda0122f7dd7e36eaff869a510e5af5 CQ: SW419011 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54368 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: p9_setup_evid steps voltage to avoid Fleetwood VRM limitationsGreg Still2018-03-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | - use the present value of ATTR_EXT_VRM_STEPSIZE (used by PGPE for Pstate movement) to step the the boot voltage setup during istep 8. This attribute defaults to 50mV. - Done only for rails attached via AVSBus Key_Cronus_Test=PM_REGRESS Change-Id: I63feb361323246c8b92f1e96dc41f8fc19bd0912 CQ: SW420343 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55386 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Include WOF power mode explicitly inside tablesMatt Derksen2018-03-221-2/+21
| | | | | | | | | | | | | | | | New header for mode inclusion. Needed to distinguish which table to use. Change-Id: I037e95288ccb5a963bd24e53484c8731c52d9790 RTC:187340 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54535 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Fix Wakeup terminate prematurely with mixed stop2 and stop4Yue Du2018-03-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | This bug only impact when one core engages the error path As one core detects xstop or fail to startclocks, while we intend to bypass the error core and move on with the good remaining core, whose wakeup will be lost due to the bug Key_Cronus_Test=PM_REGRESS Change-Id: Ib95bdc66f5baac15246a8d69ce9449266217e171 Original-Change-Id: I27012164095b99429d8c46dca5b1c8b3da62e135 CQ: SW420556 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54833 Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Support Suspend Entry/Exit and Fix Pig CollisionYue Du2018-03-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | 1) also cleanup todos in Stop Hcode 2) make STOP3 complete trans in SSH Key_Cronus_Test=PM_REGRESS Change-Id: I83a3387d0666080c60b167234e44564d90f193f5 Original-Change-Id: I28a146e15e455f09f8d8ff588e122d5ecf34110a CQ: SW416550 CQ: HW437955 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54660 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: OCC Pstate Parm Block comments for minimum frequency and Pstate being safeGreg Still2018-02-011-3/+3
| | | | | | | | | | | | | | - No stuctural change; comments only Change-Id: I1cf47e5c05971e57c376441246ef2a6cec4251c8 CQ: SW412658 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51395 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Move PGPE optrace buffer to main memoryAdam Hale2018-02-011-2/+1
| | | | | | | | | | | | Change-Id: I055179e7a081be40fe9c484a204936c5f617d674 Original-Change-Id: I519a843e45f1526ac4cc309af5d03693b075fcf8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46169 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Fix PLS deepest when stop4+ due to self restore wakeupYue Du2018-02-011-0/+1
| | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ib702859ea6e04b3bdec3838fdd88efb5ec7828a4 Original-Change-Id: I4cc1e50a848d627f0ec3917bb8ebd39f20dc9466 CQ: HW420338 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51719 Reviewed-by: YUE DU <daviddu@us.ibm.com> Dev-Ready: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: VDM Prolonged Droop FixRahul Batra2018-02-011-0/+15
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I59877c525798d4846b6b7b3335e39f3f32c7ca38 Original-Change-Id: I73d38d6029a5b84590d1081855e12c145a535869 CQ: SW413192 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51338 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PGPE: Fix FIT and actuation step conflictRahul Batra2018-02-011-1/+1
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: If68934b6767b7900e58f73a5f68527ca81154230 Original-Change-Id: I8cf51a4e044c70871c5f74a5d3a6ecfe64dafd47 CQ: SW411044 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50779 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP/PState: SGPE/PGPE Error Handling SupportYue Du2018-02-011-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upon PGPE Halt 1) SGPE performs STOP Recovery Trigger to set a malfunction alert and removes PGPE IPCs from wake-up decisions. 2) CME is interrupted by QPPM OCC Heartbeat Lost that PGPE stopped updating Upon SGPE Halt 1) PGPE moves to Psafe 2) PGPE performs STOP Recovery Trigger to set a malfunction alert. This commit also includes SGPE Panic Code Cleanup such as debug halt support. However PGPE Panic Code Cleanup is dealt in a different commit Key_Cronus_Test=PM_REGRESS Change-Id: I805b9207ded737bf61ce6eb21239a5797499c341 Original-Change-Id: I893aa1ef21d2f684722b8c10dbbeb92b9505c1c4 CQ: SW410252 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49275 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Expand PGPE optrace to Main Mem - No fnctl coreq rqmt image build vs hcodeAdam Hale2018-02-011-2/+1
| | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I8cac92e4357384fb0ec4acae0152ce455e8eb4cb Original-Change-Id: I823b350ffe1e07108fbadd4b0456c7188839932f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46480 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PGPE: STOP11+WOF+SafeMode FixesRahul Batra2018-02-011-1/+2
| | | | | | | | | | | | | | | | | | | | | -STOP11+WOF Fix -STOP11+WOF+Safe Mode Key_Cronus_Test=PM_REGRESS Change-Id: I97193e780687ea36fe6a20bce976dc00b0da530e Original-Change-Id: I7aae651213174049fa4fe89d6ac92fda2478e90a CQ: SW410652 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48989 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Enhance SBE Deadman FFDC Format and sequencingAmit Tendolkar2018-02-013-41/+76
| | | | | | | | | | | | | | | | | | | | | | | 1. align data per FFDC member names 2. set the atomic lock FFDC so that errl parser works 3. collect sibling core data if in fused mode 4. do not collect ffdc on check_master_stop15 fails, as SBE will do that upon a chip-op request See https://ralgit01.raleigh.ibm.com/gerrit1/#/c/49473 for FW changes Change-Id: I9880cdd3480c84c418b662fb7174291ed7b68cdd RTC: 179364 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50648 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
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