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authorYue Du <daviddu@us.ibm.com>2017-02-23 16:49:56 -0600
committerhostboot <hostboot@us.ibm.com>2018-08-22 17:54:40 -0500
commit53f1e7456266d95df6d876c2555557ad61dbea85 (patch)
tree31808183c72250dd5767b3cfad3018545a85d7f2 /import
parentc8a51c06776ad1d5119f92e9da034387a82051be (diff)
downloadtalos-hcode-53f1e7456266d95df6d876c2555557ad61dbea85.tar.gz
talos-hcode-53f1e7456266d95df6d876c2555557ad61dbea85.zip
STOP: UIH updates on trace and phantom interrupt handling
Change-Id: I4f953b2d0990acecb0beab7b464ff1c8b3461c67 Original-Change-Id: I28df758643540c2140142d4348983dae938dd1f5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36976 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import')
-rwxr-xr-ximport/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c22
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c20
2 files changed, 21 insertions, 21 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
index d25a71c9..5b022920 100755
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
@@ -115,7 +115,7 @@ uint16_t ram_read_lpid( uint32_t core, uint32_t thread )
if (scom_data > 0xFFF )
{
- PK_TRACE("RAMMING ERROR Unexpected LPID core %d : 0x%lX 0xFFF", core, scom_data);
+ PK_TRACE_ERR("ERROR: Unexpected LPID core %d : 0x%lX 0xFFF. HALT CME!", core, scom_data);
PK_PANIC(CME_STOP_ENTRY_BAD_LPID_ERROR);
}
@@ -439,7 +439,7 @@ p9_cme_stop_entry()
// Nap should be done by hardware when auto_stop1 is enabled
// Halt on error if target STOP level == 1(Nap)
- PK_TRACE_INF("ERROR: Stop 1 Requested to CME When AUTO_STOP1 Enabled, HALT CME!");
+ PK_TRACE_ERR("ERROR: Stop 1 Requested to CME When AUTO_STOP1 Enabled, HALT CME!");
PK_PANIC(CME_STOP_ENTRY_WITH_AUTO_NAP);
#endif
@@ -526,7 +526,7 @@ p9_cme_stop_entry()
if (ram_read_lpid(CME_MASK_C0, thread) != POWMAN_RESERVED_LPID)
{
- PK_TRACE("READ LPID not equal to expected value");
+ PK_TRACE_ERR("ERROR: C0 READ LPID not equal to expected value. HALT CME!");
PK_PANIC(CME_STOP_ENTRY_BAD_LPID_ERROR);
}
@@ -541,7 +541,7 @@ p9_cme_stop_entry()
if (ram_read_lpid(CME_MASK_C1, thread) != POWMAN_RESERVED_LPID)
{
- PK_TRACE("READ LPID not equal to expected value");
+ PK_TRACE_ERR("ERROR: C1 READ LPID not equal to expected value. HALT CME!");
PK_PANIC(CME_STOP_ENTRY_BAD_LPID_ERROR);
}
@@ -613,7 +613,7 @@ p9_cme_stop_entry()
{
if (ram_read_lpid(CME_MASK_C0, thread) != lpid_c0[thread])
{
- PK_TRACE("READ LPID not equal to expected value");
+ PK_TRACE_ERR("ERROR: Core0 READ LPID not equal to expected value. HALT CME!");
PK_PANIC(CME_STOP_ENTRY_BAD_LPID_ERROR);
}
}
@@ -622,7 +622,7 @@ p9_cme_stop_entry()
{
if (ram_read_lpid(CME_MASK_C1, thread) != lpid_c1[thread])
{
- PK_TRACE("READ LPID not equal to expected value");
+ PK_TRACE_ERR("ERROR: Core1 READ LPID not equal to expected value. HALT CME!");
PK_PANIC(CME_STOP_ENTRY_BAD_LPID_ERROR);
}
}
@@ -653,9 +653,9 @@ p9_cme_stop_entry()
if (scom_data.value)
{
- PK_TRACE_INF("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!",
+ PK_TRACE_ERR("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!",
core, scom_data.words.upper);
- pk_halt();
+ PK_PANIC(CME_STOP_ENTRY_XSTOP_ERROR);
}
}
@@ -665,9 +665,9 @@ p9_cme_stop_entry()
if (scom_data.value)
{
- PK_TRACE_INF("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!",
+ PK_TRACE_ERR("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!",
core, scom_data.words.upper);
- pk_halt();
+ PK_PANIC(CME_STOP_ENTRY_XSTOP_ERROR);
}
}
@@ -690,7 +690,7 @@ p9_cme_stop_entry()
if (((~scom_data.value) & CLK_REGION_ALL_BUT_PLL) != 0)
{
- PK_TRACE_INF("ERROR: Core Clock Stop Failed. HALT CME!");
+ PK_TRACE_ERR("ERROR: Core Clock Stop Failed. HALT CME!");
PK_PANIC(CME_STOP_ENTRY_STOPCLK_FAILED);
}
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
index c8d79439..985c28c1 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
@@ -198,7 +198,7 @@ p9_sgpe_stop_entry()
if (rc)
{
- PK_TRACE_INF("ERROR: Entry Updates PGPE with Active Cores Failed. HALT SGPE!");
+ PK_TRACE_ERR("ERROR: Entry Updates PGPE with Active Cores Failed. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_IPC_CORE_FAILED);
}
@@ -209,7 +209,7 @@ p9_sgpe_stop_entry()
if (G_sgpe_ipcmsg_update_cores.fields.return_code != SGPE_IPC_RETURN_CODE_ACK)
{
- PK_TRACE_INF("ERROR: Entry Updates PGPE with Active Cores Bad RC. HALT SGPE!");
+ PK_TRACE_ERR("ERROR: Entry Updates PGPE with Active Cores Bad RC. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_IPC_CORE_BAD_RC);
}
}
@@ -251,7 +251,7 @@ p9_sgpe_stop_entry()
if(rc)
{
- PK_TRACE_INF("ERROR: Entry Suspend PGPE Pstate Function Failed. HALT SGPE!");
+ PK_TRACE_ERR("ERROR: Entry Suspend PGPE Pstate Function Failed. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_IPC_PSTATE_FAILED);
}
@@ -263,7 +263,7 @@ p9_sgpe_stop_entry()
if (G_sgpe_ipcmsg_suspend_pstate.fields.return_code != SGPE_IPC_RETURN_CODE_ACK)
{
- PK_TRACE_INF("ERROR: Entry Suspend PGPE Pstate Function Bad RC. HALT SGPE!");
+ PK_TRACE_ERR("ERROR: Entry Suspend PGPE Pstate Function Bad RC. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_IPC_PSTATE_BAD_RC);
}
}
@@ -301,7 +301,7 @@ p9_sgpe_stop_entry()
if ((scom_data.words.upper & BITS32(0, 5)) != 0xC0000000)
{
- PK_TRACE_INF("ERROR: Failed to Obtain Cache %d Clk Ctrl Atomic Lock. Register Content: %x",
+ PK_TRACE_ERR("ERROR: Failed to Obtain Cache %d Clk Ctrl Atomic Lock. Register Content: %x",
qloop, scom_data.words.upper);
PK_PANIC(SGPE_STOP_ENTRY_GET_CLK_LOCK_FAILED);
}
@@ -406,7 +406,7 @@ p9_sgpe_stop_entry()
if (((~(scom_data.words.upper)) & (ex << SHIFT32(9))) != 0)
{
- PK_TRACE("ERROR: L2 clock stop failed. HALT SGPE!");
+ PK_TRACE_ERR("ERROR: L2 clock stop failed. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_L2_STOPCLK_FAILED);
}
@@ -540,7 +540,7 @@ p9_sgpe_stop_entry()
if ((scom_data.words.upper & BITS32(0, 5)) != 0xC0000000)
{
- PK_TRACE_INF("ERROR: Failed to Obtain Cache %d PCB Slave Atomic Lock. Register Content: %x",
+ PK_TRACE_ERR("ERROR: Failed to Obtain Cache %d PCB Slave Atomic Lock. Register Content: %x",
qloop, scom_data.words.upper);
PK_PANIC(SGPE_STOP_ENTRY_GET_SLV_LOCK_FAILED);
}
@@ -871,7 +871,7 @@ p9_sgpe_stop_entry()
if (((~scom_data.value) & CLK_REGION_ALL) != 0)
{
- PK_TRACE("ERROR: Cache clock stop failed. HALT SGPE!");
+ PK_TRACE_ERR("ERROR: Cache clock stop failed. HALT SGPE!");
PK_PANIC(SGPE_STOP_ENTRY_EQ_STOPCLK_FAILED);
}
@@ -935,8 +935,8 @@ p9_sgpe_stop_entry()
if (scom_data.value != 0xa5a5a5a5a5a5a5a5)
{
- PK_TRACE("ERROR: checkword[%x%x] failed. HALT SGPE!",
- scom_data.words.upper, scom_data.words.lower);
+ PK_TRACE_ERR("ERROR: Checkword[%x%x] Failed. HALT SGPE!",
+ scom_data.words.upper, scom_data.words.lower);
PK_PANIC(SGPE_STOP_ENTRY_PBRW_SCAN_HEADER_ERR);
}
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