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authorYue Du <daviddu@us.ibm.com>2017-05-30 15:30:48 -0500
committerhostboot <hostboot@us.ibm.com>2018-08-22 17:54:53 -0500
commit4404541f4c436c2509b500b7ab2fb3196114c140 (patch)
treedd7c62135fc500c9bcb12b577ed4e60e88ad21fe /import
parent927a4ffbc292e27f764bb7e3b2a353a9974d7bad (diff)
downloadtalos-hcode-4404541f4c436c2509b500b7ab2fb3196114c140.tar.gz
talos-hcode-4404541f4c436c2509b500b7ab2fb3196114c140.zip
STOP: Fix STOP1 with Powermixer
Change-Id: Ia993479ed2d126ecbe5c91bdadd0a5e25d7ef799 Original-Change-Id: I42a9cbaab372506de09be183448bc3fcb5362c2c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41139 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import')
-rwxr-xr-ximport/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c81
1 files changed, 45 insertions, 36 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
index 43332b64..8388577d 100755
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
@@ -362,6 +362,30 @@ p9_cme_stop_entry()
// Mark core as to be stopped
G_cme_stop_record.core_running &= ~core;
+ // Request PCB Mux
+
+#if HW405292_NDD1_PCBMUX_SAVIOR
+
+ p9_cme_pcbmux_savior_prologue(core);
+
+#endif
+
+ PK_TRACE("Request PCB mux via SICR[10/11]");
+ out32(CME_LCL_SICR_OR, core << SHIFT32(11));
+
+ // Poll Infinitely for PCB Mux Grant
+ while((core & (in32(CME_LCL_SISR) >> SHIFT32(11))) != core);
+
+ PK_TRACE("PCB Mux Granted on Core[%d]", core);
+
+#if HW405292_NDD1_PCBMUX_SAVIOR
+
+ p9_cme_pcbmux_savior_epilogue(core);
+
+#endif
+
+ // Stop 1
+
if(core_stop1)
{
PK_TRACE_DBG("Check: core[%d] core_stop1[%d]", core, core_stop1);
@@ -387,6 +411,24 @@ p9_cme_stop_entry()
CME_PUTSCOM(PPM_SSHSRC, core_stop1, scom_data.value);
*/
+ core = core & ~core_stop1;
+
+ if (!core)
+ {
+ // not catchup or catchup with stop2, terminates
+ entry_ongoing = 0;
+
+ // otherwise, go back to origin core and continue
+ if (origin_core && (origin_level > STOP_LEVEL_2))
+ {
+ core = origin_core;
+ target_level = origin_level;
+ entry_ongoing = 1;
+ }
+
+ break;
+ }
+
#else
// Nap should be done by hardware when auto_stop1 is enabled
@@ -398,42 +440,6 @@ p9_cme_stop_entry()
}
-
-#if HW405292_NDD1_PCBMUX_SAVIOR
-
- p9_cme_pcbmux_savior_prologue(core);
-
-#endif
-
- PK_TRACE("Request PCB mux via SICR[10/11]");
- out32(CME_LCL_SICR_OR, core << SHIFT32(11));
-
- // Poll Infinitely for PCB Mux Grant
- while((core & (in32(CME_LCL_SISR) >> SHIFT32(11))) != core);
-
- PK_TRACE("PCB Mux Granted on Core[%d]", core);
-
-#if HW405292_NDD1_PCBMUX_SAVIOR
-
- p9_cme_pcbmux_savior_epilogue(core);
-
-#endif
-
-#if HW386841_NDD1_DSL_STOP1_FIX
-
- // check target after getting PCBMUX for Stop1 Workaround
- if (core_stop1)
- {
- core = core & ~core_stop1;
-
- if (!core)
- {
- break;
- }
- }
-
-#endif
-
//----------------------------------------------------------------------
PK_TRACE("+++++ +++++ STOP LEVEL 2 ENTRY +++++ +++++");
//----------------------------------------------------------------------
@@ -747,6 +753,9 @@ p9_cme_stop_entry()
PK_TRACE("Drop sdis_n(flushing LCBES condition) via CPLT_CONF0[34]");
CME_PUTSCOM(C_CPLT_CONF0_CLEAR, core, BIT64(34));
+ // Allow queued scoms to complete to Core EPS before switching to Core PPM
+ sync();
+
PK_TRACE("Copy PECE CME sample to PPM Shadow via PECES");
if (core & CME_MASK_C0)
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