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| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-03-20 03:37:12 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:25:34 -0500 |
| commit | ce4e8636be13384f738d3844bcf52dbae7ba23e8 (patch) | |
| tree | 8e3cd7b00404e540df28cc15a4f7edd5c2ebb38b /import/chips/p9/procedures | |
| parent | 0d77c70e95fa35195075c6be0a784d099d00b321 (diff) | |
| download | talos-hcode-ce4e8636be13384f738d3844bcf52dbae7ba23e8.tar.gz talos-hcode-ce4e8636be13384f738d3844bcf52dbae7ba23e8.zip | |
PM: Added support for PBI EQ async boundary crossing latches
Adds support for eq_inex ring buckets in hardware image.
commit intends to avoid co-req between hardware image and
hcode image build.
Change-Id: I732032d02ae1ffdc6614233020e1ca3286897bba
RTC: 165533
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38138
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures')
| -rwxr-xr-x | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H index 73b64956..a7fc6894 100755 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H @@ -51,7 +51,7 @@ typedef enum eq_fure = 0, eq_gptr = 1, eq_time = 2, - eq_mode = 3, + eq_inex = 3, ex_l3_fure = 4, ex_l3_gptr = 5, ex_l3_time = 6, @@ -151,7 +151,7 @@ typedef enum RingOffset EQ_FURE = 0, EQ_GPTR = 1, EQ_TIME = 2, - EQ_MODE = 3, + EQ_INEX = 3, EX_L3_FURE = 4, EX_L3_GPTR = 5, EX_L3_TIME = 6, @@ -240,7 +240,7 @@ static const struct ringProperties_t RING_PROPERTIES[P9_NUM_RINGS] = {EQ_FURE}, //0 {EQ_GPTR}, //1 {EQ_TIME}, //2 - {EQ_MODE}, //3 + {EQ_INEX}, //3 {EX_L3_FURE}, //4 {EX_L3_GPTR}, //5 {EX_L3_TIME}, //6 |
