diff options
4 files changed, 36 insertions, 13 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H index 73b64956..a7fc6894 100755 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/utils/p9_ringid_sgpe.H @@ -51,7 +51,7 @@ typedef enum eq_fure = 0, eq_gptr = 1, eq_time = 2, - eq_mode = 3, + eq_inex = 3, ex_l3_fure = 4, ex_l3_gptr = 5, ex_l3_time = 6, @@ -151,7 +151,7 @@ typedef enum RingOffset EQ_FURE = 0, EQ_GPTR = 1, EQ_TIME = 2, - EQ_MODE = 3, + EQ_INEX = 3, EX_L3_FURE = 4, EX_L3_GPTR = 5, EX_L3_TIME = 6, @@ -240,7 +240,7 @@ static const struct ringProperties_t RING_PROPERTIES[P9_NUM_RINGS] = {EQ_FURE}, //0 {EQ_GPTR}, //1 {EQ_TIME}, //2 - {EQ_MODE}, //3 + {EQ_INEX}, //3 {EX_L3_FURE}, //4 {EX_L3_GPTR}, //5 {EX_L3_TIME}, //6 diff --git a/import/chips/p9/utils/imageProcs/p9_ringId.C b/import/chips/p9/utils/imageProcs/p9_ringId.C index 718d0139..492c01bb 100644 --- a/import/chips/p9/utils/imageProcs/p9_ringId.C +++ b/import/chips/p9/utils/imageProcs/p9_ringId.C @@ -354,7 +354,7 @@ const GenRingIdList RING_ID_LIST_COMMON[] = {"eq_fure" , 0x00, 0x10, 0x10, EKB_RING , 0x1003608F}, {"eq_gptr" , 0x01, 0x10, 0x10, EKB_RING , 0x10036082}, {"eq_time" , 0x02, 0x10, 0x10, VPD_RING , 0x10036087}, - {"eq_mode" , 0x03, 0x10, 0x10, EKB_RING , 0x10036081}, + {"eq_inex" , 0x03, 0x10, 0x10, EKB_RING , 0x1003608B}, {"ex_l3_fure" , 0x04, 0x10, 0x10, EKB_RING , 0x1003100F}, {"ex_l3_gptr" , 0x05, 0x10, 0x10, EKB_RING , 0x10031002}, {"ex_l3_time" , 0x06, 0x10, 0x10, VPD_RING , 0x10031007}, @@ -413,14 +413,18 @@ const GenRingIdList RING_ID_LIST_COMMON[] = {"eq_ana_bndy_bucket_39" , 0x3b, 0x10, 0x10, EKB_FSM_RING, 0x10030108}, {"eq_ana_bndy_bucket_40" , 0x3c, 0x10, 0x10, EKB_FSM_RING, 0x10030108}, {"eq_ana_bndy_bucket_41" , 0x3d, 0x10, 0x10, EKB_FSM_RING, 0x10030108}, + {"eq_inex_bucket_1" , 0x3e, 0x10, 0x10, EKB_RING , 0x1003608B}, + {"eq_inex_bucket_2" , 0x3f, 0x10, 0x10, EKB_RING , 0x1003608B}, + {"eq_inex_bucket_3" , 0x40, 0x10, 0x10, EKB_RING , 0x1003608B}, + {"eq_inex_bucket_4" , 0x41, 0x10, 0x10, EKB_RING , 0x1003608B}, }; const GenRingIdList RING_ID_LIST_INSTANCE[] = { - {"eq_repr" , 0x3e, 0x10, 0x1b, VPD_RING , 0x10036086}, - {"ex_l3_repr" , 0x3f, 0x10, 0x1b, VPD_RING , 0x10031006}, - {"ex_l2_repr" , 0x40, 0x10, 0x1b, VPD_RING , 0x10030406}, - {"ex_l3_refr_repr" , 0x41, 0x10, 0x1b, VPD_RING , 0x10030046}, - {"ex_l3_refr_time" , 0x42, 0x10, 0x1b, VPD_RING , 0x10030047}, + {"eq_repr" , 0x42, 0x10, 0x1b, VPD_RING , 0x10036086}, + {"ex_l3_repr" , 0x43, 0x10, 0x1b, VPD_RING , 0x10031006}, + {"ex_l2_repr" , 0x44, 0x10, 0x1b, VPD_RING , 0x10030406}, + {"ex_l3_refr_repr" , 0x45, 0x10, 0x1b, VPD_RING , 0x10030046}, + {"ex_l3_refr_time" , 0x46, 0x10, 0x1b, VPD_RING , 0x10030047}, }; const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL }; }; diff --git a/import/chips/p9/utils/imageProcs/p9_ringId.H b/import/chips/p9/utils/imageProcs/p9_ringId.H index d3b5f51d..29579858 100644 --- a/import/chips/p9/utils/imageProcs/p9_ringId.H +++ b/import/chips/p9/utils/imageProcs/p9_ringId.H @@ -737,6 +737,7 @@ enum RingOffset eq_fure = 0, eq_gptr = 1, eq_time = 2, + eq_inex = 3, eq_mode = 3, ex_l3_fure = 4, ex_l3_gptr = 5, @@ -797,6 +798,10 @@ enum RingOffset eq_ana_bndy_bucket_39 = 59, eq_ana_bndy_bucket_40 = 60, eq_ana_bndy_bucket_41 = 61, + eq_inex_bucket_1 = 62, + eq_inex_bucket_2 = 63, + eq_inex_bucket_3 = 64, + eq_inex_bucket_4 = 65, // Instance Rings eq_repr = (0 | INSTANCE_RING_MARK), @@ -809,7 +814,7 @@ enum RingOffset static const CHIPLET_DATA g_eqData = { 16, // Quad Chiplet ID range is 16 - 21. The base ID is 16. - 62, // 62 common rings for Quad chiplet. + 66, // 66 common rings for Quad chiplet. 5, // 5 instance specific rings for each EQ chiplet 9 // 9 different rings since 2 per EX ring and 1 per EQ }; @@ -1043,7 +1048,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { EQ::eq_fure , "eq_fure" , EQ_TYPE }, // 172 { EQ::eq_gptr , "eq_gptr" , EQ_TYPE }, // 173 { EQ::eq_time , "eq_time" , EQ_TYPE }, // 174 - { EQ::eq_mode , "eq_mode" , EQ_TYPE }, // 175 + { EQ::eq_inex , "eq_inex" , EQ_TYPE }, // 175 { EQ::ex_l3_fure , "ex_l3_fure" , EQ_TYPE }, // 176 { EQ::ex_l3_gptr , "ex_l3_gptr" , EQ_TYPE }, // 177 { EQ::ex_l3_time , "ex_l3_time" , EQ_TYPE }, // 178 @@ -1116,6 +1121,10 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { EQ::eq_ana_bndy_bucket_39 , "eq_ana_bndy_bucket_39" , EQ_TYPE }, // 245 { EQ::eq_ana_bndy_bucket_40 , "eq_ana_bndy_bucket_40" , EQ_TYPE }, // 246 { EQ::eq_ana_bndy_bucket_41 , "eq_ana_bndy_bucket_41" , EQ_TYPE }, // 247 + { EQ::eq_inex_bucket_1 , "eq_inex_bucket_1" , EQ_TYPE }, // 248 + { EQ::eq_inex_bucket_2 , "eq_inex_bucket_2" , EQ_TYPE }, // 249 + { EQ::eq_inex_bucket_3 , "eq_inex_bucket_3" , EQ_TYPE }, // 250 + { EQ::eq_inex_bucket_4 , "eq_inex_bucket_4" , EQ_TYPE } // 251 }; #endif #ifdef __PPE__ @@ -1296,7 +1305,7 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { EQ::eq_fure , EQ_TYPE }, // 172 { EQ::eq_gptr , EQ_TYPE }, // 173 { EQ::eq_time , EQ_TYPE }, // 174 - { EQ::eq_mode , EQ_TYPE }, // 175 + { EQ::eq_inex , EQ_TYPE }, // 175 { EQ::ex_l3_fure , EQ_TYPE }, // 176 { EQ::ex_l3_gptr , EQ_TYPE }, // 177 { EQ::ex_l3_time , EQ_TYPE }, // 178 @@ -1369,6 +1378,10 @@ static const ringProperties_t RING_PROPERTIES[NUM_RING_IDS] = { EQ::eq_ana_bndy_bucket_39 , EQ_TYPE }, // 245 { EQ::eq_ana_bndy_bucket_40 , EQ_TYPE }, // 246 { EQ::eq_ana_bndy_bucket_41 , EQ_TYPE }, // 247 + { EQ::eq_inex_bucket_1 , EQ_TYPE }, // 248 + { EQ::eq_inex_bucket_2 , EQ_TYPE }, // 249 + { EQ::eq_inex_bucket_3 , EQ_TYPE }, // 250 + { EQ::eq_inex_bucket_4 , EQ_TYPE } // 251 }; #endif diff --git a/import/chips/p9/utils/imageProcs/p9_ring_id.h b/import/chips/p9/utils/imageProcs/p9_ring_id.h index ac013acd..10ea9281 100644 --- a/import/chips/p9/utils/imageProcs/p9_ring_id.h +++ b/import/chips/p9/utils/imageProcs/p9_ring_id.h @@ -256,7 +256,8 @@ enum RingID eq_fure = 172, eq_gptr = 173, eq_time = 174, - eq_mode = 175, + eq_inex = 175, + eq_mode = 175, // FIXME will be removed once Hcode image Build changes are in place ex_l3_fure = 176, ex_l3_gptr = 177, ex_l3_time = 178, @@ -344,6 +345,11 @@ enum RingID eq_ana_bndy_bucket_40 = 246, eq_ana_bndy_bucket_41 = 247, + //EQ Inex ring bucket + eq_inex_bucket_1 = 248, + eq_inex_bucket_2 = 249, + eq_inex_bucket_3 = 250, + eq_inex_bucket_4 = 251, //*************************** // Rings needed for SBE - End //*************************** |