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| author | Rahul Batra <rbatra@us.ibm.com> | 2017-01-20 14:43:23 -0600 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:05:14 -0500 |
| commit | e38420fa4c65636789b8e2de9646eeb76c1b88aa (patch) | |
| tree | 627f7594cda0bcb246b648ceadf39e264ad6d253 /import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h | |
| parent | b6670a83315557c24d345308266742cf3dc17590 (diff) | |
| download | talos-hcode-e38420fa4c65636789b8e2de9646eeb76c1b88aa.tar.gz talos-hcode-e38420fa4c65636789b8e2de9646eeb76c1b88aa.zip | |
PGPE Boot Fixes
- Setup OCC SRAM pointers
- Performed read-mod-write to OCC SCRATCH2 reg
- Fixed debug trap insertion
- Refined some traces for debug
- Added linker script fix for .pgpe_image_header
Change-Id: Id49de48d1cb1ca9ffc1cb343f3a8cb99a7803eca
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35181
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h index 818abb00..b4e73f1e 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h @@ -38,7 +38,7 @@ #define EPM_P9_TUNING 1 #define SIMICS_TUNING 0 #define GEN_PSTATE_TBL 0 -#define USE_BOOT_TEMP 1 +#define USE_BOOT_TEMP 0 #define BOOT_TEMP_SET_FULL_OCC_IPC_FUNC 1 #define DEV_DEBUG 1 #define PGPE_UNIT_TEST 1 |
