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| author | Rahul Batra <rbatra@us.ibm.com> | 2018-03-18 12:03:32 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-05-09 10:32:50 -0500 |
| commit | 7a3d7a468a9f0a636ae18308c8a7e4e9e684202e (patch) | |
| tree | a6d46b68062687befcabde0c10a9ee8b1a20f368 /import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c | |
| parent | e128f9d1c104203229e6458d4b5f19b28c9ca7bf (diff) | |
| download | talos-hcode-7a3d7a468a9f0a636ae18308c8a7e4e9e684202e.tar.gz talos-hcode-7a3d7a468a9f0a636ae18308c8a7e4e9e684202e.zip | |
PGPE: Use PGPE Header from p9_hcode_images_defines.h
Key_Cronus_Test=PM_REGRESS
Change-Id: Ie72b0d588b4da9eadf93625227a3d0cd519e9e6e
CQ: SW421711
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56043
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c index 03db491e..058229af 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HCODE Project */ /* */ -/* COPYRIGHT 2016,2017 */ +/* COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -25,6 +25,7 @@ #include "p9_pgpe_gppb.h" #include "p9_pgpe_header.h" +#include "p9_hcode_image_defines.H" //Globals and externs GlobalPstateParmBlock* G_gppb;//Global pointer to GlobalPstateParmBlock @@ -45,7 +46,7 @@ uint8_t p9_pgpe_gppb_get_ps_region(Pstate ps, uint8_t vpt_pt_set); // void p9_pgpe_gppb_init() { - void* gppb_sram_offset = G_pgpe_header_data->g_pgpe_gppb_sram_addr;//GPPB Sram Offset + void* gppb_sram_offset = (void*)G_pgpe_header_data->g_pgpe_gppb_sram_addr;//GPPB Sram Offset G_gppb = (GlobalPstateParmBlock*)gppb_sram_offset; PK_TRACE_INF("INIT: DPLL0Value=0x%x", G_gppb->dpll_pstate0_value); |
