diff options
author | Christopher M. Riedl <cmriedl@us.ibm.com> | 2017-08-02 20:12:04 -0500 |
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committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 18:59:24 -0500 |
commit | cedb9f7c0bf170c7148f87ab34379cd003db20b1 (patch) | |
tree | b624e7c00465e10a26a884b503e00da2a5a3c6a9 /import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c | |
parent | 6ee6de82fe4acd95698b90c9555565fdfab0624b (diff) | |
download | talos-hcode-cedb9f7c0bf170c7148f87ab34379cd003db20b1.tar.gz talos-hcode-cedb9f7c0bf170c7148f87ab34379cd003db20b1.zip |
IOTA
- implement iota panic ("dead") codes
- fix uih interrupt window condition leading to iota machine stack
overflow and/or phantom interrupt detection
- fix iota static machine stack init value
- refactor UIH for both IOTA and PK to pull the priority table from a
common source
- the entire INTERCME0 IRQ handler in PK is executed with EE=0, for IOTA
this can only be emulated by masking all higher priorities in the UIH
for that particular task/interrupt priority group
Change-Id: I8357518b02922d3328aff4d80003ac3030fdd5e7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44135
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c')
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c index b54bb458..c03a7537 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c @@ -79,12 +79,9 @@ p9_cme_stop_pcwu_handler(void* arg, PkIrqId irq) { out32(CME_LCL_EIMR_OR, BITS32(12, 10)); #if defined(__IOTA__) - wrteei(1); p9_cme_stop_exit(); - // re-evaluate g_eimr_override then restore eimr p9_cme_stop_eval_eimr_override(); - iota_uih_irq_vec_restore(); #else pk_semaphore_post((PkSemaphore*)arg); #endif @@ -179,12 +176,9 @@ p9_cme_stop_spwu_handler(void* arg, PkIrqId irq) out32(CME_LCL_EIMR_OR, BITS32(12, 10)); PK_TRACE_INF("Launching exit thread"); #if defined(__IOTA__) - wrteei(1); p9_cme_stop_exit(); - // re-evaluate g_eimr_override then restore eimr p9_cme_stop_eval_eimr_override(); - iota_uih_irq_vec_restore(); #else pk_semaphore_post((PkSemaphore*)arg); #endif @@ -204,12 +198,9 @@ p9_cme_stop_rgwu_handler(void* arg, PkIrqId irq) PK_TRACE_INF("RGWU Handler Trigger %d", irq); out32(CME_LCL_EIMR_OR, BITS32(12, 10)); #if defined(__IOTA__) - wrteei(1); p9_cme_stop_exit(); - // re-evaluate g_eimr_override then restore eimr p9_cme_stop_eval_eimr_override(); - iota_uih_irq_vec_restore(); #else pk_semaphore_post((PkSemaphore*)arg); #endif @@ -224,14 +215,10 @@ p9_cme_stop_enter_handler(void* arg, PkIrqId irq) PK_TRACE_INF("PM_ACTIVE Handler Trigger %d", irq); out32(CME_LCL_EIMR_OR, BITS32(12, 10)); #if defined(__IOTA__) - wrteei(1); - // The actual entry sequence p9_cme_stop_entry(); - // re-evaluate g_eimr_override then restore eimr p9_cme_stop_eval_eimr_override(); - iota_uih_irq_vec_restore(); #else pk_semaphore_post((PkSemaphore*)arg); #endif |