CME/SGPE: yet another updating commit for stop images

patchset 1: fix EISTR in stop interrupt handler
patchset 2: add QPMMR[21-26] setup in sgpe(for John)
patchset 3: add DD1 VCS workaround to sgpe
patchset 4: add common header file change for patch3
patchset 5: fix an error in vcs workaround
patchset 6: reorganize the compiler flags
patchset 7: fix a typo in 6, and rebase to fix jenkins
patchset 8: reorganize the compiler flags(cme)
            remove ppm write protection of cme
patchset 9: fix a typo in sgpe_exit qssr reporting
patchset 10:add extra dd1 vcs workaround
patchset 11:rebase
patchset 12:fix cme interrupt handler(marker changed)
patchset 13:fix compiler error in 12
            turn on sgpe kernel trace
patchset 14:fix again
patchset 15:fix wake/stop priority group
patchset 16:fix markers for EPM
patchset 17:reformat CME PK_TRACEs
patchset 18:reformat SGPE PK_TRACEs
patchset 19:fix some typo in 18
patchset 20:fix VDM scom fail via INTERPPM settings
patchset 21:core hist in sgpe based on partial good
            fix vcs workaround in stop image
            add qloop limiter in sgpe exit
            add stop level mapping support
patchset 22:enable vcs workaround by default
patchset 23:add dpll_initf
            fix dpll_setup bit(9)
            make epm skip workaround doesnt need
patchset 24:fix stop2 exit express
            fix some old compiler flags
patchset 25:add dd1 doorbell workaround
            add comment on serialize quad PFETs
patchset 26:fix cme_boot() on repeat booting one CME
patchset 27:increase sgpe_exit_thread stack size
patchset 28:sdis_n set/reset becomes permanent
patchset 29:add skewadjust procedures
patchset 30:add queue scom mode init
patchset 31:using ppe_scom instead of fapi_scom
patchset 32:continue protect cme on partial bad core
patchset 33:add support for EX_L3_MODE_REG1 setup
patchset 34:using real time qcsr for l3-lco victem
patchset 35:fix a bug in patchset 32
patchset 36:Increased the CME/SGPE Hcode defines.

Change-Id: Id3fd4d4e0d9740a7903c913fa8fc80b6cee55ff9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30925
Dev-Ready: YUE DU <daviddu@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

1 files changed, 14 insertions, 33 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
index 624e1513..fcd938ee 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
@@ -29,41 +29,22 @@
 
 extern CmeStopRecord G_cme_stop_record;
 
-// Important: g_eimr_override at any time should mask wakeup interrupts of
-//            running core(s), the override vector should change after each
-//            entry and exit as core state is changed.
-// For Entry, mask the following interrupts via unified interrupt handler:
-//   lower priority interrupts than pm_active, and both pm_active (catchup)
-//   wakeup interrupts of the entering core(s) should still be masked
-//   via g_eimr_override (abortion), stopped core can still exit any time
-//   as their wakeup interrupts should be unmasked
-// After Entry, unmask the following interrupts via pk_irq_vec_restore:
-//   priority group on stack, likely at least both pm_active unmasked
-//   (stopped core cannot get extra pm_active, untouched core can enter)
-//   here needs to use g_eimr_override to mask wakeup of running core(s)
-//   wakeup of the stopped core(s) should be already unmasked by default
-//   (when restored, previous masked wakeups are being unmasked as well)
-// For Exit, mask the following interrupts via unified interrupt handler:
-//   lower priority interrupts than wakeup, including DB2+pm_active(catchup)
-// After Exit, unmask the following interrupts via pk_irq_vec_restore:
-//   priority group on stack, likely at least wakeup and DB2 unmasked
-//   here needs to use g_eimr_override to mask wakeup of exited core(s)
 void
-p9_cme_stop_event_handler(void* arg, PkIrqId irq)
+p9_cme_stop_exit_handler(void* arg, PkIrqId irq)
 {
-    MARK_TRAP(STOP_EVENT_HANDLER)
-    PK_TRACE("STOP-IRQ: %d", irq);
+    MARK_TRAP(STOP_EXIT_HANDLER)
+    PK_TRACE_INF("SX-IRQ: %d", irq);
+    out32(CME_LCL_EIMR_OR, BITS32(12, 6) | BITS32(20, 2));
+    pk_semaphore_post((PkSemaphore*)arg);
+}
 
-    if (in32(CME_LCL_EISR) & BITS32(12, 6))
-    {
-        PK_TRACE("lanuch exit");
-        pk_semaphore_post((PkSemaphore*)(&(G_cme_stop_record.sem[1])));
-    }
-    else if (in32(CME_LCL_EISR) & BITS32(20, 2))
-    {
-        PK_TRACE("lanuch entry");
-        pk_semaphore_post((PkSemaphore*)(&(G_cme_stop_record.sem[0])));
-    }
+void
+p9_cme_stop_enter_handler(void* arg, PkIrqId irq)
+{
+    MARK_TRAP(STOP_ENTER_HANDLER)
+    PK_TRACE_INF("SE-IRQ: %d", irq);
+    out32(CME_LCL_EIMR_OR, BITS32(12, 6) | BITS32(20, 2));
+    pk_semaphore_post((PkSemaphore*)arg);
 }
 
 void
@@ -71,7 +52,7 @@ p9_cme_stop_db1_handler(void* arg, PkIrqId irq)
 {
     PkMachineContext ctx;
     MARK_TRAP(STOP_DB1_HANDLER)
-    PK_TRACE("DB1-IRQ: %d", irq);
+    PK_TRACE_INF("DB1-IRQ: %d", irq);
     pk_irq_vec_restore(&ctx);
 }