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author | Rahul Batra <rbatra@us.ibm.com> | 2017-08-24 16:44:00 -0500 |
---|---|---|
committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 19:10:32 -0500 |
commit | 46ac80391d6fd81a7219c5fd9d6b79ff07ffd2bb (patch) | |
tree | c1a47675e577d0b0146c0c8c6006ad010c6a942b /import/chips/p9/procedures/ppe_closed/cme/pstate_cme | |
parent | 387b1772caa4f272b812b355862ce8e8ca6caa57 (diff) | |
download | talos-hcode-46ac80391d6fd81a7219c5fd9d6b79ff07ffd2bb.tar.gz talos-hcode-46ac80391d6fd81a7219c5fd9d6b79ff07ffd2bb.zip |
PSTATE/STOP: Pstate-Stop interaction fixes
Change-Id: Ifbbecdffc7a18382217b3c0a691912f311407336
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45138
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/pstate_cme')
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c | 2 | ||||
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c | 88 |
2 files changed, 44 insertions, 46 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c index 3467d98b..fdfd0e90 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c +++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c @@ -105,8 +105,6 @@ void p9_cme_pstate_intercme_in0_handler(void* arg, PkIrqId irq) p9_cme_pstate_pmsr_updt(G_cme_record.core_enabled); //Clear any pending PMCR interrupts - out32_sh(CME_LCL_EISR_CLR, G_cme_record.core_enabled << 28); - out32_sh(CME_LCL_EIMR_CLR, G_cme_record.core_enabled << 28);//Enable PMCR0/1 g_eimr_override |= BITS64(34, 2); g_eimr_override &= ~(uint64_t)(G_cme_record.core_enabled << 28); diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c index 4c8f0b9a..483e572f 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c +++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c @@ -375,54 +375,57 @@ inline void p9_cme_pstate_process_db0() PK_TRACE_INF("DB_TH: DB0 0x%x\n"dbData.value); - //Process DB0 - //Start Pstates and Pstates NOT enabled - if(G_dbData.fields.cme_message_number0 == MSGID_DB0_START_PSTATE_BROADCAST && - !(G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED))) + if (in32(CME_LCL_SRTCH0) & BIT32(CME_SCRATCH_DB0_PROCESSING_ENABLE)) { - p9_cme_pstate_db0_start(); - } - //Global Actual Broadcast and Pstates enabled - else if(G_dbData.fields.cme_message_number0 == MSGID_DB0_GLOBAL_ACTUAL_BROADCAST) - { - //Process Global Bcast only if Pstates are enabled. - //Otherwise, ignore. The reason is PGPE multicasts Global Bcast, and doorbell0 - //can be written while this CME is powered-off. For Pstate Start and Stop - //PGPE only unicasts. - if (G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED)) + //Process DB0 + //Start Pstates and Pstates NOT enabled + if(G_dbData.fields.cme_message_number0 == MSGID_DB0_START_PSTATE_BROADCAST && + !(G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED))) { - p9_cme_pstate_db0_glb_bcast(); + p9_cme_pstate_db0_start(); } - } - //Stop Pstates and Pstates enabled - else if(G_dbData.fields.cme_message_number0 == MSGID_DB0_STOP_PSTATE_BROADCAST && - (G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED))) - { - p9_cme_pstate_db0_suspend(); - } - //Pmin or Pmax Update - else if(G_dbData.fields.cme_message_number0 == MSGID_DB0_CLIP_BROADCAST && - (G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED))) - { - p9_cme_pstate_db0_clip_bcast(); - } - //Otherwise, send an ERR ACK to PGPE and Halt - else - { - ppmPigData.value = 0; - ppmPigData.fields.req_intr_type = 4; - ppmPigData.fields.req_intr_payload = MSGID_PCB_TYPE4_ACK_ERROR; - send_pig_packet(ppmPigData.value, G_cme_pstate_record.cmeMaskGoodCore); - PK_TRACE_INF("DB_TH: Bad DB0=0x%x Pstate=0x%x", G_dbData.fields.cme_message_number0, G_cme_flags); - - if(G_dbData.fields.cme_message_number0 < MSGID_DB0_VALID_START || - G_dbData.fields.cme_message_number0 > MSGID_DB0_VALID_END) + //Global Actual Broadcast and Pstates enabled + else if(G_dbData.fields.cme_message_number0 == MSGID_DB0_GLOBAL_ACTUAL_BROADCAST) + { + //Process Global Bcast only if Pstates are enabled. + //Otherwise, ignore. The reason is PGPE multicasts Global Bcast, and doorbell0 + //can be written while this CME is powered-off. For Pstate Start and Stop + //PGPE only unicasts. + if (G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED)) + { + p9_cme_pstate_db0_glb_bcast(); + } + } + //Stop Pstates and Pstates enabled + else if(G_dbData.fields.cme_message_number0 == MSGID_DB0_STOP_PSTATE_BROADCAST && + (G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED))) + { + p9_cme_pstate_db0_suspend(); + } + //Pmin or Pmax Update + else if(G_dbData.fields.cme_message_number0 == MSGID_DB0_CLIP_BROADCAST && + (G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED))) { - PK_PANIC(CME_PSTATE_UNEXPECTED_DB0_MSGID); + p9_cme_pstate_db0_clip_bcast(); } + //Otherwise, send an ERR ACK to PGPE and Halt else { - PK_PANIC(CME_PSTATE_INVALID_DB0_MSGID); + ppmPigData.value = 0; + ppmPigData.fields.req_intr_type = 4; + ppmPigData.fields.req_intr_payload = MSGID_PCB_TYPE4_ACK_ERROR; + send_pig_packet(ppmPigData.value, G_cme_pstate_record.cmeMaskGoodCore); + PK_TRACE_INF("DB_TH: Bad DB0=0x%x Pstate=0x%x", G_dbData.fields.cme_message_number0, G_cme_flags); + + if(G_dbData.fields.cme_message_number0 < MSGID_DB0_VALID_START || + G_dbData.fields.cme_message_number0 > MSGID_DB0_VALID_END) + { + PK_PANIC(CME_PSTATE_UNEXPECTED_DB0_MSGID); + } + else + { + PK_PANIC(CME_PSTATE_INVALID_DB0_MSGID); + } } } @@ -478,12 +481,9 @@ inline void p9_cme_pstate_db0_start() send_pig_packet(ppmPigData.value, G_cme_pstate_record.cmeMaskGoodCore); //Clear Pending PMCR interrupts and Enable PMCR Interrupts (for good cores) - out32_sh(CME_LCL_EISR_CLR, G_cme_record.core_enabled << 28 ); - out32_sh(CME_LCL_EIMR_CLR, G_cme_record.core_enabled << 28 ); g_eimr_override |= BITS64(34, 2); g_eimr_override &= ~(uint64_t)(G_cme_record.core_enabled << 28); - //Clear Core GPMMR RESET_STATE_INDICATOR bit to show pstates have started CME_PUTSCOM(PPM_GPMMR_CLR, G_cme_record.core_enabled, BIT64(15)); |