diff options
| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-06-13 00:11:29 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:58:22 -0500 |
| commit | f2d08e0ca809fd6f124a097cefccfaa0af9ddd50 (patch) | |
| tree | 8de46ef0dbd82612da6c6441c2005622767498c6 | |
| parent | cd3b267a88d91517f8dc64abd17b1ef7da604df6 (diff) | |
| download | talos-hcode-f2d08e0ca809fd6f124a097cefccfaa0af9ddd50.tar.gz talos-hcode-f2d08e0ca809fd6f124a097cefccfaa0af9ddd50.zip | |
PM: Added core throttle assert and deassert count in PGPE Image Header.
Change-Id: Ie6ba97a29ef109ff3b50ea8ace34701830d876ba
RTC: 174995
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41745
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H index 52357f14..8523279a 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H +++ b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H @@ -351,6 +351,8 @@ HCD_HDR_UINT32(g_pgpe_wof_state_address, 0 ); // SRAM address wher HCD_HDR_UINT32(g_pgpe_req_active_quad_address, 0 ); // SRAM address where requested quad status is located HCD_HDR_UINT32(g_wof_table_addr, 0 ); // SRAM address where WOF Table is Located HCD_HDR_UINT32(g_wof_table_length, 0 ); // WOF Table length in bytes +HCD_HDR_UINT32(g_pgpe_core_throttle_assert_cnt, 0 ); // Core throttle assert count +HCD_HDR_UINT32(g_pgpe_core_throttle_deassert_cnt, 0 ); // Core throttle de-aasert count #ifdef __ASSEMBLER__ .endm #else |
