From f2d08e0ca809fd6f124a097cefccfaa0af9ddd50 Mon Sep 17 00:00:00 2001 From: Prem Shanker Jha Date: Tue, 13 Jun 2017 00:11:29 -0500 Subject: PM: Added core throttle assert and deassert count in PGPE Image Header. Change-Id: Ie6ba97a29ef109ff3b50ea8ace34701830d876ba RTC: 174995 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41745 Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: BRIAN D. VICTOR Reviewed-by: Adam S. Hale Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA Reviewed-by: Gregory S. Still --- import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H | 2 ++ 1 file changed, 2 insertions(+) diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H index 52357f14..8523279a 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H +++ b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H @@ -351,6 +351,8 @@ HCD_HDR_UINT32(g_pgpe_wof_state_address, 0 ); // SRAM address wher HCD_HDR_UINT32(g_pgpe_req_active_quad_address, 0 ); // SRAM address where requested quad status is located HCD_HDR_UINT32(g_wof_table_addr, 0 ); // SRAM address where WOF Table is Located HCD_HDR_UINT32(g_wof_table_length, 0 ); // WOF Table length in bytes +HCD_HDR_UINT32(g_pgpe_core_throttle_assert_cnt, 0 ); // Core throttle assert count +HCD_HDR_UINT32(g_pgpe_core_throttle_deassert_cnt, 0 ); // Core throttle de-aasert count #ifdef __ASSEMBLER__ .endm #else -- cgit v1.2.3