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authorYue Du <daviddu@us.ibm.com>2017-01-25 22:23:15 -0600
committerhostboot <hostboot@us.ibm.com>2018-08-22 17:54:51 -0500
commitdbc5a4d2778995b0a29827915dab7deac3e6e3b8 (patch)
tree8fc79c95572c5b65e2bbf7d41dce2e044b270703
parentb46f051b988499b3f18a48f23ec4e469daf6e17a (diff)
downloadtalos-hcode-dbc5a4d2778995b0a29827915dab7deac3e6e3b8.tar.gz
talos-hcode-dbc5a4d2778995b0a29827915dab7deac3e6e3b8.zip
STOP: Fix FABRIC_PUMP_MODE plumbing in stop images
Change-Id: I47f4b810a3815f2ca52949d9d5039d06d60396ec Original-Change-Id: Id0d10d56e421bb0cae2f02f2da54e11bd349ac1f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35443 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
-rwxr-xr-ximport/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c60
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c34
2 files changed, 48 insertions, 46 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
index 27b4c7d5..02530e7d 100755
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
@@ -46,6 +46,7 @@
#include "p9_cme_stop.h"
#include "p9_cme_stop_enter_marks.h"
#include "p9_cme_pstate.h"
+#include "p9_hcode_image_defines.H"
extern CmeStopRecord G_cme_stop_record;
@@ -213,30 +214,31 @@ void p9_cme_pcbmux_savior_epilogue(uint32_t core)
void
p9_cme_stop_entry()
{
- int catchup_ongoing = 0;
- int entry_ongoing = 1;
- uint8_t target_level = 0;
- uint8_t deeper_level = 0;
- uint8_t origin_level = 0;
- uint32_t origin_core = 0;
- uint32_t deeper_core = 0;
- uint32_t core_aborted = 0;
- uint32_t core_catchup = 0;
- uint32_t core_stop1 = 0;
- uint32_t core_index = 0;
- uint32_t core_mask = 0;
- uint32_t core_raw = 0;
- uint32_t core = 0;
- uint32_t pm_states = 0;
- uint32_t lclr_data = 0;
- data64_t scom_data = {0};
- ppm_pig_t pig = {0};
+ int catchup_ongoing = 0;
+ int entry_ongoing = 1;
+ uint8_t target_level = 0;
+ uint8_t deeper_level = 0;
+ uint8_t origin_level = 0;
+ uint32_t origin_core = 0;
+ uint32_t deeper_core = 0;
+ uint32_t core_aborted = 0;
+ uint32_t core_catchup = 0;
+ uint32_t core_stop1 = 0;
+ uint32_t core_index = 0;
+ uint32_t core_mask = 0;
+ uint32_t core_raw = 0;
+ uint32_t core = 0;
+ uint32_t pm_states = 0;
+ uint32_t lclr_data = 0;
+ data64_t scom_data = {0};
+ ppm_pig_t pig = {0};
+ cmeHeader_t* pCmeImgHdr = (cmeHeader_t*)(CME_SRAM_HEADER_ADDR);
#if HW402407_NDD1_TLBIE_STOP_WORKAROUND
- uint32_t thread = 0;
- uint16_t lpid_c0[4] = {0, 0, 0, 0};
- uint16_t lpid_c1[4] = {0, 0, 0, 0};
+ uint32_t thread = 0;
+ uint16_t lpid_c0[4] = {0, 0, 0, 0};
+ uint16_t lpid_c1[4] = {0, 0, 0, 0};
#endif // tlbie stop workaround
@@ -327,26 +329,26 @@ p9_cme_stop_entry()
core_stop1 |= core_mask;
}
- if ((G_cme_stop_record.header_flags & MAP_11_TO_8) &&
- (G_cme_stop_record.req_level[core_index] == STOP_LEVEL_11))
+ if ((pCmeImgHdr->g_cme_mode_flags & CME_STOP_11_TO_8_BIT_POS) &&
+ (G_cme_stop_record.req_level[core_index] >= STOP_LEVEL_11))
{
G_cme_stop_record.req_level[core_index] = STOP_LEVEL_8;
}
- if ((G_cme_stop_record.header_flags & MAP_8_TO_5) &&
- (G_cme_stop_record.req_level[core_index] == STOP_LEVEL_8))
+ if ((pCmeImgHdr->g_cme_mode_flags & CME_STOP_8_TO_5_BIT_POS) &&
+ (G_cme_stop_record.req_level[core_index] >= STOP_LEVEL_8))
{
G_cme_stop_record.req_level[core_index] = STOP_LEVEL_5;
}
- if ((G_cme_stop_record.header_flags & MAP_5_TO_4) &&
- (G_cme_stop_record.req_level[core_index] == STOP_LEVEL_5))
+ if ((pCmeImgHdr->g_cme_mode_flags & CME_STOP_5_TO_4_BIT_POS) &&
+ (G_cme_stop_record.req_level[core_index] >= STOP_LEVEL_5))
{
G_cme_stop_record.req_level[core_index] = STOP_LEVEL_4;
}
- if ((G_cme_stop_record.header_flags & MAP_4_TO_2) &&
- (G_cme_stop_record.req_level[core_index] == STOP_LEVEL_4))
+ if ((pCmeImgHdr->g_cme_mode_flags & CME_STOP_4_TO_2_BIT_POS) &&
+ (G_cme_stop_record.req_level[core_index] >= STOP_LEVEL_4))
{
G_cme_stop_record.req_level[core_index] = STOP_LEVEL_2;
}
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
index c0cc0236..1b095949 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
@@ -47,26 +47,26 @@ extern SgpeStopRecord G_sgpe_stop_record;
void
p9_sgpe_stop_entry()
{
- int entry_ongoing[2] = {0, 0};
- int l3_purge_aborted = 0;
- uint32_t ex = 0;
- uint32_t ex_mask = 0;
- uint32_t ex_index = 0;
- uint32_t bitloc = 0;
- uint32_t qloop = 0;
- uint32_t cloop = 0;
- uint32_t climit = 0;
- uint32_t xentry = 0;
- uint32_t qentry = 0;
- uint64_t host_attn = 0;
- uint64_t local_xstop = 0;
- data64_t scom_data = {0};
- data64_t temp_data = {0};
+ int entry_ongoing[2] = {0, 0};
+ int l3_purge_aborted = 0;
+ uint32_t ex = 0;
+ uint32_t ex_mask = 0;
+ uint32_t ex_index = 0;
+ uint32_t bitloc = 0;
+ uint32_t qloop = 0;
+ uint32_t cloop = 0;
+ uint32_t climit = 0;
+ uint32_t xentry = 0;
+ uint32_t qentry = 0;
+ uint64_t host_attn = 0;
+ uint64_t local_xstop = 0;
+ data64_t scom_data = {0};
+ data64_t temp_data = {0};
#if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX
- uint32_t spin = 0;
+ uint32_t spin = 0;
#endif
#if !SKIP_IPC
- uint32_t rc = 0;
+ uint32_t rc = 0;
#endif
//--------------------------------------------------------------------------
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