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| author | Greg Still <stillgs@us.ibm.com> | 2018-07-03 08:56:28 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-08-22 17:56:03 -0500 |
| commit | d11796515369999cf5bf26da48798c94de59c16d (patch) | |
| tree | 41685f65b630adabc3610c405eb9a949de6631b5 | |
| parent | 64f1e841cc6647e73adb105269553da05dc75a92 (diff) | |
| download | talos-hcode-d11796515369999cf5bf26da48798c94de59c16d.tar.gz talos-hcode-d11796515369999cf5bf26da48798c94de59c16d.zip | |
SMF: SBE updates for SMF (URMOR set and CPMMR[Runtime Wakeup Mode] clear)
- set URMOR if MSR[S] bit is set in p9_sbe_load_bootloader
- clear CPMMR[Runtime Wakeup Mode] in all cores in p9_sbe_select_ex to ensure
Hostboot starts from known state
Change-Id: I572a1d9e0ebf8e194c811e2b8c176d145b7361e3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61812
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h index 0a485a72..13509e17 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h @@ -168,6 +168,8 @@ enum PM_CPPM_CSAR_DEFS enum PM_PPM_FW_FLAGS { CPPM_CPMMR_DISABLE_PERIODIC_CORE_QUIESCE = 2, + CPPM_CPMMR_RUNTIME_WAKEUP_MODE = 3, + CPPM_CPMMR_WAKEUP_ERROR_INJECT_MODE = 8, QPPM_QCCR_IGNORE_QUAD_STOP_EXITS = 10, QPPM_QCCR_IGNORE_QUAD_STOP_ENTRIES = 11 }; |
