PM: Design changes in SGPE Boot copier and boot loader.

    - Use of consolidated SRAM Image Size to load SGPE Image.
    - Use of trap instead of self loop for interrupts.
    - Incorporation of SGPE Progress code debug of SGPE Booting

Change-Id: I898f0966a727b76b31f3a737f91cdaa26b71558e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34220
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

5 files changed, 215 insertions, 174 deletions

diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
index aee54b37..66922333 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
+++ b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
@@ -161,6 +161,8 @@ HCD_CONST(QPMR_AUX_DATA_OFFSET_BYTE,            0x50)
 HCD_CONST(QPMR_AUX_DATA_LENGTH_BYTE,            0x54)
 HCD_CONST(QPMR_STOP_FFDC_OFFSET_BYTE,           0x58)
 HCD_CONST(QPMR_STOP_FFDC_LENGTH_BYTE,           0x5C)
+HCD_CONST(QPMR_SGPE_BOOT_PROG_CODE,             0x60)
+HCD_CONST(QPMR_SGPE_IMAGE_SIZE,                 0x64)
 
 /// SGPE Boot
 
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_occ_sram.H b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_occ_sram.H
index db0b6216..7b479f50 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_occ_sram.H
+++ b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_occ_sram.H
@@ -94,8 +94,20 @@ HCD_CONST(OCC_SRAM_PGPE_IMAGE_LENGTH_ADDR,
 
 //--------------------------------------------------------------------------------------
 
-/// SGPE Base
+// Misc constants used in SGPE boot loader and boot copier.
+HCD_CONST(DIVDE_BY_8,  3)
+HCD_CONST(DOUBLE_WORD_SIZE,  8)
+HCD_CONST(SGPE_BOOT_PROG_CODE_POS,  QPMR_SGPE_BOOT_PROG_CODE)
+HCD_CONST(SGPE_SRAM_IMG_SIZE_POS,   QPMR_SGPE_IMAGE_SIZE)
+HCD_CONST(SGPE_IMG_OFFSET_POS,      40)
+HCD_CONST(BOOT_COPIER_LEN_ZERO,     0)
+HCD_CONST(ENABLE_TRAP,              0)
+HCD_CONST(SGPE_BOOT_COPY_SUCCESS,   0x42432d53 ) // ASCII code for BC-S
+HCD_CONST(SGPE_BOOT_COPIER_FAIL,    0x42432d46 ) // ASCII code for BC-F
+HCD_CONST(SGPE_BOOT_LOADER_SUCCESS, 0x424c2d53 ) // ASCII code for BL-S
+HCD_CONST(SGPE_BOOT_LOADER_FAIL,    0x424c2d46 ) // ASCII code for BL-F
 
+/// SGPE Base
 HCD_CONST(OCC_SRAM_SGPE_BASE_ADDR,
           (OCC_SRAM_BASE_ADDR + OCC_SRAM_BEFORE_PGPE_REGION_SIZE_TOTAL + OCC_SRAM_PGPE_REGION_SIZE))
 HCD_CONST(OCC_SRAM_SGPE_END_ADDR,
@@ -122,6 +134,7 @@ HCD_CONST(OCC_SRAM_SGPE_BOOT_LOADER_RESET_ADDR,
 HCD_CONST(OCC_SRAM_SGPE_QPMR_HEADER_ADDR,
           (OCC_SRAM_SGPE_BOOT_LOADER_ADDR - OCC_SRAM_SGPE_COPY_QPMR_HEADER_SIZE))
 
+
 /// SGPE Copy
 
 HCD_CONST(OCC_SRAM_SGPE_HCODE_OFFSET_ADDR,
@@ -138,4 +151,5 @@ HCD_CONST(OCC_SRAM_QUAD_SPECIFIC_RINGS_LENGTH_ADDR,
           (OCC_SRAM_SGPE_QPMR_HEADER_ADDR + QPMR_QUAD_SPECIFIC_RINGS_LENGTH_BYTE))
 
 
+
 #endif /* __P9_HCD_MEMMAP_OCC_SRAM_H__ */
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
index 36d08b4c..69529f76 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
+++ b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
@@ -94,6 +94,8 @@ HCD_HDR_UINT32( quadAuxOffset, 0);
 HCD_HDR_UINT32( quadAuxLength, 0);
 HCD_HDR_UINT32( stopFfdcOffset, 0);
 HCD_HDR_UINT32( stopFfdcLength, 0);
+HCD_HDR_UINT32( sgpeBootProgCode, 0 );
+HCD_HDR_UINT32( sgpeSramImageSize, 0 );
 HCD_HDR_PAD(512);
 #ifdef __ASSEMBLER__
 .endm
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_copier.S b/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_copier.S
index 90c66de0..b9948a34 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_copier.S
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_copier.S
@@ -27,16 +27,33 @@
 #include <ppe42_asm.h>
 #include <p9_hcd_memmap_homer.H>
 #include <p9_hcd_memmap_occ_sram.H>
+#include <gpe_register_addresses.h>
         .list
 
-    .section .loader_text, "ax", @progbits
+//Boot copier GPR usage
+#define   BL_LEN_HOMER_ADR_REG              r3
+#define   BL_SRAM_ADR_REG                   r4
+#define   BL_LEN_REG                        r5
+#define   TEMP_REG                          r6
+#define   BL_OFFSET_HOMER_ADR_REG           r7
+#define   BL_HOMER_ADR_REG                  r8
+#define   QPMR_HDR_HOMER_ADR_REG            r9
+#define   PROG_CODE_REG                     r10
+#define   HCODE_DOUBLE_WORD_REG             r28
+
+
+###############################################################################
+##
+##                          Interrupts
+##
+###############################################################################
 
     .global __vectors
 __vectors:
 
     .org __vectors + 0x0000
 __machine_check:
-        b .
+        trap
 
     .org __vectors + 0x0040
     .global __system_reset
@@ -45,68 +62,104 @@ __system_reset:
 
     .org __vectors + 0x0060
 __data_storage:
-    b .
+    trap
 
     .org __vectors + 0x0080
 __instruction_storage:
-    b .
+    trap
 
     .org __vectors + 0x00A0
 __external_interrupt_vector:
-    b .
+    trap
 
     .org __vectors + 0x00C0
 __alignment_exception:
-    b .
+    trap
 
     .org __vectors + 0x00E0
 __program_exception:
-    b .
+    trap
 
     .org __vectors + 0x0100
 __dec_interrupt:
-    b .
+    trap
 
     .org __vectors + 0x0120
 __fit_interrupt:
-    b .
+    trap
 
     .org __vectors + 0x0140
 __watchdog_interrupt:
-    b .
+    trap
+
+###############################################################################
+##
+##                                  Interrupt Ends
+##
+###############################################################################
+
+//*****************************************************************************
+//
+//      Reading QPMR Header and preparing for copying boot loader to OCC SRAM
+//
+//*****************************************************************************
 
 __bootCopier:
-    //load r3 with BASE_
-    _liw    %r3, HOMER_SGPE_BOOT_LOADER_LENGTH_ADDR
+    ##load BL_LEN_HOMER_ADR_REG with BASE_
+    _liw    BL_LEN_HOMER_ADR_REG, HOMER_SGPE_BOOT_LOADER_LENGTH_ADDR
 
-    _liw    %r7, HOMER_SGPE_BOOT_LOADER_OFFSET_ADDR
+    _liw    BL_OFFSET_HOMER_ADR_REG, HOMER_SGPE_BOOT_LOADER_OFFSET_ADDR
 
-    //load r4 with address where bootLoader will be loaded in SRAM e.g 0xFFFE8000 (Destination address)
-    _liw    %r4, OCC_SRAM_SGPE_BOOT_LOADER_ADDR # dest
+    //load BL_SRAM_ADR_REG with address where bootLoader will be loaded in SRAM e.g 0xFFFE8000 (Destination address)
+    _liw    BL_SRAM_ADR_REG, OCC_SRAM_SGPE_BOOT_LOADER_ADDR
 
-    //load r9 with QPMR header address
-    _liw    %r9, HOMER_QPMR_HEADER_ADDR
+    //load QPMR_HDR_HOMER_ADR_REG with QPMR header address
+    _liw    QPMR_HDR_HOMER_ADR_REG, HOMER_QPMR_HEADER_ADDR
 
     //size of image in bytes
-    lwz     r5, 0(r3)
-    li      r6, 3
-    srw     r5, r5, r6    # r5 contains number of bytes, divide by 8 will give number of double words
-    addi    r5, r5, 1
-    mtctr   r5          # set the counter for loop
+    lwz     BL_LEN_REG, 0(BL_LEN_HOMER_ADR_REG)
+
+    bwz   BL_LEN_REG,  boot_copier_len_err
+
+    # BL_LEN_REG contains number of bytes, divide by 8 will give number of double words
+    srwi     BL_LEN_REG, BL_LEN_REG, DIVDE_BY_8
+    addi    BL_LEN_REG, BL_LEN_REG, 1
+    mtctr   BL_LEN_REG          # set the counter for loop
 
     // calculating bootLoader image loaded address
-    lwz     r8, 0(r7)   # offset of bootLoader section  in Homer
-    add     r8, r8, r9  # add base address to offset to get absolute bootLoader address in Homer
+    lwz     BL_HOMER_ADR_REG, 0(BL_OFFSET_HOMER_ADR_REG)   # offset of bootLoader section  in Homer
+    add    BL_HOMER_ADR_REG, BL_HOMER_ADR_REG, QPMR_HDR_HOMER_ADR_REG  # add base address to offset to get absolute bootLoader address in Homer
+
+//***************************************************Boot copier copying Boot Loader **********************************
 
 copy_loop:
-    lvd    d28, 0(r8)  # Load Double word
-    stvd   d28, 0(r4)  # Destination address
-    addi   r8, r8, 8   # Increasing source address
-    addi   r4, r4, 8   # Increasing Dest address
+    lvd    HCODE_DOUBLE_WORD_REG, 0(BL_HOMER_ADR_REG)  # Load Double word
+    stvd   HCODE_DOUBLE_WORD_REG, 0(BL_SRAM_ADR_REG)  # Destination address
+    addi   BL_HOMER_ADR_REG, BL_HOMER_ADR_REG, DOUBLE_WORD_SIZE   # Increasing source address
+    addi   BL_SRAM_ADR_REG, BL_SRAM_ADR_REG, DOUBLE_WORD_SIZE   # Increasing Dest address
     bdnz   copy_loop   # Keep repeating the address.
 
+//***************************************** SGPE Boot Loader Copied ***************************************************
+    // boot loader has been copied. Let us update the Progress code in QPMR Header
+    _liw PROG_CODE_REG, SGPE_BOOT_COPY_SUCCESS
+    stw PROG_CODE_REG, SGPE_BOOT_PROG_CODE_POS(QPMR_HDR_HOMER_ADR_REG)
+
+//******************************************* Branching to SGPE Bootloader ********************************************
     ## Using blr command:
-    _liw  %r6,   OCC_SRAM_SGPE_BOOT_LOADER_RESET_ADDR
-    mtlr  r6
+    _liw  TEMP_REG, OCC_SRAM_SGPE_BOOT_LOADER_RESET_ADDR
+    mtlr  TEMP_REG
     blr
+
+// If we are here it means an Hcode Image Build Error.
+// Let us save failure code in QPMR Header of HOMER and
+// halt the PPE to save the failed state
+
+// ******************************************** Boot Copier Error Scenario *******************************************
+
+boot_copier_len_err:
+    _liw PROG_CODE_REG, SGPE_BOOT_COPIER_FAIL
+    stw  PROG_CODE_REG, SGPE_BOOT_PROG_CODE_POS(QPMR_HDR_HOMER_ADR_REG)
+
+    trap
+
     .epilogue __bootCopier
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_loader.S b/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_loader.S
index f8a5968c..49ce2b9c 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_loader.S
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/boot/sgpe_boot_loader.S
@@ -29,197 +29,167 @@
 #include <gpe_register_addresses.h>
     .list
 
+//Boot loader GPR usage
+#define BL_SRAM_ADDR_REG            r3
+#define SGPE_IMG_SRAM_ADR_REG       r4
+#define SGPE_IMG_LEN_VAL_REG        r5
+#define TEMP_REG                    r6
+#define SGPE_IMG_OFFSET_VAL_REG     r7
+#define SGPE_IMG_HOMER_ADR_REG      r8
+#define QPMR_HDR_HOMER_ADR_REG      r9
+#define SGPE_IMG_LEN_VAL_ADR_REG    r10
+#define HCODE_DOUBLE_WORD_REG       r28
+#define SGPE_SRAM_BASE_ADR_REG      r30
+#define DEBUG_CODE_REG              r31
+
+############################################################################
+##
+##                          Interrupt vectors
+##
+############################################################################
+
     .global __vectors
 __vectors:
 
     .org __vectors + 0x0000
 __machine_check:
-    b .
+    trap
 
     .org __vectors + 0x0040
     .global __system_reset
 __system_reset:
-    b   __bootLoader
+    b __bootLoader
 
     .org __vectors + 0x0060
 __data_storage:
-    b .
+    trap
 
     .org __vectors + 0x0080
 __instruction_storage:
-    b .
+    trap
 
     .org __vectors + 0x00A0
 __external_interrupt_vector:
-    b .
+    trap
 
     .org __vectors + 0x00C0
 __alignment_exception:
-    b .
+    trap
 
     .org __vectors + 0x00E0
 __program_exception:
-    b .
+    trap
 
     .org __vectors + 0x0100
 __dec_interrupt:
-    b .
+    trap
 
     .org __vectors + 0x0120
 __fit_interrupt:
-    b .
+    trap
 
     .org __vectors + 0x0140
 __watchdog_interrupt:
-    b .
+    trap
+
+###############################################################################
+##
+##                                  Interrupt Ends
+##
+###############################################################################
 
 __bootLoader:
 
-    ######################
-    ## QPMR Header Copy
-    ######################
+###############################################################################
+##
+##                      Preparing for copy of SGPE SRAM Image
+##
+###############################################################################
 
     ## Setup the IVPR for the loader context
-
-    _liw    %r9, OCC_SRAM_SGPE_BOOT_LOADER_ADDR
-    _liw    %r8, GPE_GPE3IVPR
-    stw     r9, 0(r8)
+    _liw    BL_SRAM_ADDR_REG, OCC_SRAM_SGPE_BOOT_LOADER_ADDR
+    _liw    TEMP_REG, GPE_GPE3IVPR
+    stw     BL_SRAM_ADDR_REG, 0(TEMP_REG)
 
     ## Enable halt on trap
-    lis     %r3, 0x0100
-    li      %r3, 0
-    mtdbcr  %r3
-
-    ## cal source Address
-    _liw    %r3, HOMER_QPMR_HEADER_ADDR
-
-    ## Calculate Destination Address(in r4)
-    _liw    %r4, OCC_SRAM_SGPE_QPMR_HEADER_ADDR
-
-    ## Find double words(in r5).
-    _liw    %r5, QPMR_HEADER_SIZE
-    li      r6, 3
-    srw     r5, r5, r6
-
-    ## start copying
-    mtctr   r5
-
-qpmr_header_copy_loop:
-    lvd     d28, 0(r3)
-    stvd    d28, 0(r4)
-    addi    r3, r3, 8
-    addi    r4, r4, 8
-    bdnz    qpmr_header_copy_loop
-
-    #########################
-    ## Copy SGPE Header/Exe
-    #########################
-    ## Calculate Source address(in r8)
-    _liw    %r6, OCC_SRAM_SGPE_HCODE_OFFSET_ADDR
-    lwz     r7, 0(r6)
-    _liw    %r9, HOMER_QPMR_HEADER_ADDR
-    add     r8,r9,r7
-
-    ## Calculate Destination address
-    _liw    %r4, OCC_SRAM_SGPE_BASE_ADDR
-
-    ## Calculate the double word count to copy and place in R5
-    ##
-    ## The copy is from the beginning of the SGPE Hcode until the last scan ring
-    ## section found that is found.  For each section, the copy amount will be
-    ## updated to the offset + length (eg the end) of that section.  Once the
-    ## Hcode, Common Rings, and Instance Rings entries in the QPMR are looked
-    ## at, then subtract the QPMR header size as all offsets are based on the
-    ## beginning of the QPMR
-    ##
-    ## R3 : ending QPMR offset to to determine count
-    ## R4 : destination SRAM address
-    ## R5 : final doubleword count
-    ## R6 : scratch
-    ## R7 : offset of the start of the HCode
-    ## R10: address for accessing the QPMR Header entries
-    ## R28: offset of the begining of a section
-    ## R29: length of a section
-    ## R31: scratch
-
-    ## Separate registers are used for debug as they will be blown away upon
-    ## branching to the HCODE anyway
-
-    ## Compute the ending offset of the Hcode section.  Note: the beginning is
-    ## R7
-    _liw    %r10, OCC_SRAM_SGPE_HCODE_LENGTH_ADDR
-    lwz     r29, 0(r10)
-    add     r3, r7, r29
-    lis     r31, 0xB00F
-    ori     r31, r31, 0x0001
-    mtsprg0 r31
-
-    ## Compute the end of the common rings section.
-    ## If not present (eg Offset or length = 0), use the end of the Hcode section
-    _liw    %r10, OCC_SRAM_QUAD_COMMON_RINGS_OFFSET_ADDR
-    lwz     r28, 0(r10)
-    bwz     r28, end_common_rings
-
-    _liw    %r10, OCC_SRAM_QUAD_COMMON_RINGS_LENGTH_ADDR
-    lwz     r29, 0(r10)
-    bwz     r29, end_common_rings
-
-    add     r3, r28, r29
-    lis     r31, 0xB00F
-    ori     r31, r31, 0x0002
-    mtsprg0 r31
-
-end_common_rings:
-
-    ## Compute the end of the specific rings section.
-    ## If not present (eg Offset or length = 0), use the end of the common section
-    _liw    %r10, OCC_SRAM_QUAD_SPECIFIC_RINGS_OFFSET_ADDR
-    lwz     r28, 0(r10)
-    bwz     r28, end_specific_rings
-
-    _liw    %r10, OCC_SRAM_QUAD_SPECIFIC_RINGS_LENGTH_ADDR
-    lwz     r29, 0(r10)
-    bwz     r29, end_specific_rings
-
-    add     r3, r28, r29
-    lis     r31, 0xB00F
-    ori     r31, r31, 0x0003
-    mtsprg0 r31
-
-end_specific_rings:
-
-    ## Subtract the offset of the beginning of the Hcode
-    sub     r31, r3, r7
-    nop
-    srwi    r5,r31,3  ## Divide by 8 for doublewords
-
-    ## start copying
-    mtctr   r5
-    nop
 
+    lis     TEMP_REG, ENABLE_TRAP
+    mtdbcr  TEMP_REG
+
+    ## calculate source Address in HOMER
+
+    _liw    QPMR_HDR_HOMER_ADR_REG, HOMER_QPMR_HEADER_ADDR
+    lwz SGPE_IMG_OFFSET_VAL_REG, SGPE_IMG_OFFSET_POS( QPMR_HDR_HOMER_ADR_REG )
+    add SGPE_IMG_HOMER_ADR_REG, QPMR_HDR_HOMER_ADR_REG, SGPE_IMG_OFFSET_VAL_REG
+
+    ## Calculate Destination Address in OCC SRAM
+
+    _liw    SGPE_IMG_SRAM_ADR_REG, OCC_SRAM_SGPE_BASE_ADDR
+
+    ## Find double words(in SGPE_IMG_LEN_VAL_REG).
+
+    lwz   SGPE_IMG_LEN_VAL_REG, SGPE_SRAM_IMG_SIZE_POS ( QPMR_HDR_HOMER_ADR_REG )
+    bwz   SGPE_IMG_LEN_VAL_REG, sgpe_sram_img_size_bad
+    srwi  SGPE_IMG_LEN_VAL_REG, SGPE_IMG_LEN_VAL_REG, DIVDE_BY_8
+    mtctr SGPE_IMG_LEN_VAL_REG
+
+############################################################################
+##
+##          Copying SGPE's Hcode to OCC SRAM
+##
+############################################################################
 payload_copy_loop:
-    lvd     d28, 0(r8)
-    stvd    d28, 0(r4)
-    addi    r8, r8, 8
-    addi    r4, r4, 8
+
+    lvd     HCODE_DOUBLE_WORD_REG, 0( SGPE_IMG_HOMER_ADR_REG )
+    stvd    HCODE_DOUBLE_WORD_REG, 0( SGPE_IMG_SRAM_ADR_REG )
+    addi    SGPE_IMG_HOMER_ADR_REG, SGPE_IMG_HOMER_ADR_REG, DOUBLE_WORD_SIZE
+    addi    SGPE_IMG_SRAM_ADR_REG, SGPE_IMG_SRAM_ADR_REG, DOUBLE_WORD_SIZE
     bdnz    payload_copy_loop
 
-    ########################
-    ## branch to hcode
-    ########################
-    lis     r31, 0xB00F
-    ori     r31, r31, 0x0004
-    mtsprg0 r31
+############################################################################
+##
+##          Copy is complete. Branching to hcode
+##
+############################################################################
+
+    lis     DEBUG_CODE_REG, 0xB00F
+    ori     DEBUG_CODE_REG, DEBUG_CODE_REG, 0x0002
+    mtsprg0 DEBUG_CODE_REG
 
     ## Load the branch address
-    _liw    %r6, OCC_SRAM_SGPE_HCODE_RESET_ADDR
-    mtlr    r6
+    _liw    TEMP_REG, OCC_SRAM_SGPE_HCODE_RESET_ADDR
+    mtlr    TEMP_REG
 
     ## Setup the IVPR for the Hcode
-    _liw    %r9, OCC_SRAM_SGPE_BASE_ADDR
-    _liw    %r8, GPE_GPE3IVPR
-    stw     r9, 0(r8)
+    _liw    SGPE_SRAM_BASE_ADR_REG, OCC_SRAM_SGPE_BASE_ADDR
+    _liw    TEMP_REG, GPE_GPE3IVPR
+    stw     SGPE_SRAM_BASE_ADR_REG, 0( TEMP_REG )
+
+    _liw TEMP_REG, SGPE_BOOT_LOADER_SUCCESS
+    stw TEMP_REG, SGPE_BOOT_PROG_CODE_POS( QPMR_HDR_HOMER_ADR_REG )
+
+############################################################################
+##
+## Jumping to SGPE's Reset address. Updating Progress Code in QPMR to SUCCESS
+##
+############################################################################
 
     blr
 
-    .epilogue __bootLoader
+############################################################################
+##
+## SGPE Image Size Error. Updating Progress Code in QPMR to FAIL
+##
+############################################################################
+
+sgpe_sram_img_size_bad:
+
+   _liw TEMP_REG, SGPE_BOOT_LOADER_FAIL
+   stw TEMP_REG, SGPE_BOOT_PROG_CODE_POS( QPMR_HDR_HOMER_ADR_REG )
+
+   ## Halting SGPE when Boot Loader fails
+   trap
+
+   .epilogue __bootLoader
+
+######################### SGPE Boot Loaders Ends  #########################